1 // Copyright 2023 The Pigweed Authors
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License"); you may not
4 // use this file except in compliance with the License. You may obtain a copy of
5 // the License at
6 //
7 // https://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
11 // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
12 // License for the specific language governing permissions and limitations under
13 // the License.
14
15 #include <stdbool.h>
16
17 #include "pw_boot/boot.h"
18 #include "pw_boot_cortex_m/boot.h"
19 #include "pw_preprocessor/compiler.h"
20
21 // Default handler to insert into the ARMv7-M vector table (below).
22 // This function exists for convenience. If a device isn't doing what you
23 // expect, it might have hit a fault and ended up here.
DefaultFaultHandler(void)24 static void DefaultFaultHandler(void) {
25 while (true) {
26 // Wait for debugger to attach.
27 }
28 }
29
30 // This typedef is for convenience when building the vector table. With the
31 // exception of SP_main (0th entry in the vector table), all the entries of the
32 // vector table are function pointers.
33 typedef void (*InterruptHandler)(void);
34
35 void SVC_Handler(void) PW_ALIAS(DefaultFaultHandler);
36 void PendSV_Handler(void) PW_ALIAS(DefaultFaultHandler);
37 void SysTick_Handler(void) PW_ALIAS(DefaultFaultHandler);
38
39 void MemManage_Handler(void) PW_ALIAS(DefaultFaultHandler);
40 void BusFault_Handler(void) PW_ALIAS(DefaultFaultHandler);
41 void UsageFault_Handler(void) PW_ALIAS(DefaultFaultHandler);
42 void DebugMon_Handler(void) PW_ALIAS(DefaultFaultHandler);
43
44 void am_brownout_isr(void) PW_ALIAS(DefaultFaultHandler);
45 void am_watchdog_isr(void) PW_ALIAS(DefaultFaultHandler);
46 void am_rtc_isr(void) PW_ALIAS(DefaultFaultHandler);
47 void am_vcomp_isr(void) PW_ALIAS(DefaultFaultHandler);
48 void am_ioslave_ios_isr(void) PW_ALIAS(DefaultFaultHandler);
49 void am_ioslave_acc_isr(void) PW_ALIAS(DefaultFaultHandler);
50 void am_iomaster0_isr(void) PW_ALIAS(DefaultFaultHandler);
51 void am_iomaster1_isr(void) PW_ALIAS(DefaultFaultHandler);
52 void am_iomaster2_isr(void) PW_ALIAS(DefaultFaultHandler);
53 void am_iomaster3_isr(void) PW_ALIAS(DefaultFaultHandler);
54 void am_iomaster4_isr(void) PW_ALIAS(DefaultFaultHandler);
55 void am_iomaster5_isr(void) PW_ALIAS(DefaultFaultHandler);
56 void am_iomaster6_isr(void) PW_ALIAS(DefaultFaultHandler);
57 void am_iomaster7_isr(void) PW_ALIAS(DefaultFaultHandler);
58 void am_ctimer_isr(void) PW_ALIAS(DefaultFaultHandler);
59 void am_uart_isr(void) PW_ALIAS(DefaultFaultHandler);
60 void am_uart1_isr(void) PW_ALIAS(DefaultFaultHandler);
61 void am_uart2_isr(void) PW_ALIAS(DefaultFaultHandler);
62 void am_uart3_isr(void) PW_ALIAS(DefaultFaultHandler);
63 void am_adc_isr(void) PW_ALIAS(DefaultFaultHandler);
64 void am_mspi0_isr(void) PW_ALIAS(DefaultFaultHandler);
65 void am_mspi1_isr(void) PW_ALIAS(DefaultFaultHandler);
66 void am_mspi2_isr(void) PW_ALIAS(DefaultFaultHandler);
67 void am_clkgen_isr(void) PW_ALIAS(DefaultFaultHandler);
68 void am_cryptosec_isr(void) PW_ALIAS(DefaultFaultHandler);
69 void am_sdio_isr(void) PW_ALIAS(DefaultFaultHandler);
70 void am_usb_isr(void) PW_ALIAS(DefaultFaultHandler);
71 void am_gpu_isr(void) PW_ALIAS(DefaultFaultHandler);
72 void am_disp_isr(void) PW_ALIAS(DefaultFaultHandler);
73 void am_dsi_isr(void) PW_ALIAS(DefaultFaultHandler);
74 void am_stimer_cmpr0_isr(void) PW_ALIAS(DefaultFaultHandler);
75 void am_stimer_cmpr1_isr(void) PW_ALIAS(DefaultFaultHandler);
76 void am_stimer_cmpr2_isr(void) PW_ALIAS(DefaultFaultHandler);
77 void am_stimer_cmpr3_isr(void) PW_ALIAS(DefaultFaultHandler);
78 void am_stimer_cmpr4_isr(void) PW_ALIAS(DefaultFaultHandler);
79 void am_stimer_cmpr5_isr(void) PW_ALIAS(DefaultFaultHandler);
80 void am_stimer_cmpr6_isr(void) PW_ALIAS(DefaultFaultHandler);
81 void am_stimer_cmpr7_isr(void) PW_ALIAS(DefaultFaultHandler);
82 void am_stimerof_isr(void) PW_ALIAS(DefaultFaultHandler);
83 void am_audadc0_isr(void) PW_ALIAS(DefaultFaultHandler);
84 void am_dspi2s0_isr(void) PW_ALIAS(DefaultFaultHandler);
85 void am_dspi2s1_isr(void) PW_ALIAS(DefaultFaultHandler);
86 void am_dspi2s2_isr(void) PW_ALIAS(DefaultFaultHandler);
87 void am_dspi2s3_isr(void) PW_ALIAS(DefaultFaultHandler);
88 void am_pdm0_isr(void) PW_ALIAS(DefaultFaultHandler);
89 void am_pdm1_isr(void) PW_ALIAS(DefaultFaultHandler);
90 void am_pdm2_isr(void) PW_ALIAS(DefaultFaultHandler);
91 void am_pdm3_isr(void) PW_ALIAS(DefaultFaultHandler);
92 void am_gpio0_001f_isr(void) PW_ALIAS(DefaultFaultHandler);
93 void am_gpio0_203f_isr(void) PW_ALIAS(DefaultFaultHandler);
94 void am_gpio0_405f_isr(void) PW_ALIAS(DefaultFaultHandler);
95 void am_gpio0_607f_isr(void) PW_ALIAS(DefaultFaultHandler);
96 void am_gpio1_001f_isr(void) PW_ALIAS(DefaultFaultHandler);
97 void am_gpio1_203f_isr(void) PW_ALIAS(DefaultFaultHandler);
98 void am_gpio1_405f_isr(void) PW_ALIAS(DefaultFaultHandler);
99 void am_gpio1_607f_isr(void) PW_ALIAS(DefaultFaultHandler);
100 void am_timer00_isr(void) PW_ALIAS(DefaultFaultHandler);
101 void am_timer01_isr(void) PW_ALIAS(DefaultFaultHandler);
102 void am_timer02_isr(void) PW_ALIAS(DefaultFaultHandler);
103 void am_timer03_isr(void) PW_ALIAS(DefaultFaultHandler);
104 void am_timer04_isr(void) PW_ALIAS(DefaultFaultHandler);
105 void am_timer05_isr(void) PW_ALIAS(DefaultFaultHandler);
106 void am_timer06_isr(void) PW_ALIAS(DefaultFaultHandler);
107 void am_timer07_isr(void) PW_ALIAS(DefaultFaultHandler);
108 void am_timer08_isr(void) PW_ALIAS(DefaultFaultHandler);
109 void am_timer09_isr(void) PW_ALIAS(DefaultFaultHandler);
110 void am_timer10_isr(void) PW_ALIAS(DefaultFaultHandler);
111 void am_timer11_isr(void) PW_ALIAS(DefaultFaultHandler);
112 void am_timer12_isr(void) PW_ALIAS(DefaultFaultHandler);
113 void am_timer13_isr(void) PW_ALIAS(DefaultFaultHandler);
114 void am_timer14_isr(void) PW_ALIAS(DefaultFaultHandler);
115 void am_timer15_isr(void) PW_ALIAS(DefaultFaultHandler);
116 void am_cachecpu_isr(void) PW_ALIAS(DefaultFaultHandler);
117
118 PW_KEEP_IN_SECTION(".vector_table")
119 const InterruptHandler vector_table[] = {
120 // Cortex-M CPU specific interrupt handlers.
121 (InterruptHandler)(&pw_boot_stack_high_addr),
122 pw_boot_Entry, // The reset handler
123 DefaultFaultHandler, // The NMI handler
124 DefaultFaultHandler, // The hard fault handler
125 DefaultFaultHandler, // The MemManage_Handler
126 DefaultFaultHandler, // The BusFault_Handler
127 DefaultFaultHandler, // The UsageFault_Handler
128 0, // Reserved
129 0, // Reserved
130 0, // Reserved
131 0, // Reserved
132 SVC_Handler, // SVCall handler
133 DefaultFaultHandler, // Debug monitor handler
134 0, // Reserved
135 PendSV_Handler, // The PendSV handler
136 SysTick_Handler, // The SysTick handler
137 // Vendor specific peripheral interrupt handlers.
138 am_brownout_isr, // 0: Brownout (rstgen)
139 am_watchdog_isr, // 1: Watchdog (WDT)
140 am_rtc_isr, // 2: RTC
141 am_vcomp_isr, // 3: Voltage Comparator
142 am_ioslave_ios_isr, // 4: I/O Responder general
143 am_ioslave_acc_isr, // 5: I/O Responder access
144 am_iomaster0_isr, // 6: I/O Controller 0
145 am_iomaster1_isr, // 7: I/O Controller 1
146 am_iomaster2_isr, // 8: I/O Controller 2
147 am_iomaster3_isr, // 9: I/O Controller 3
148 am_iomaster4_isr, // 10: I/O Controller 4
149 am_iomaster5_isr, // 11: I/O Controller 5
150 am_iomaster6_isr, // 12: I/O Controller 6 (I3C/I2C/SPI)
151 am_iomaster7_isr, // 13: I/O Controller 7 (I3C/I2C/SPI)
152 am_ctimer_isr, // 14: OR of all timerX interrupts
153 am_uart_isr, // 15: UART0
154 am_uart1_isr, // 16: UART1
155 am_uart2_isr, // 17: UART2
156 am_uart3_isr, // 18: UART3
157 am_adc_isr, // 19: ADC
158 am_mspi0_isr, // 20: MSPI0
159 am_mspi1_isr, // 21: MSPI1
160 am_mspi2_isr, // 22: MSPI2
161 am_clkgen_isr, // 23: ClkGen
162 am_cryptosec_isr, // 24: Crypto Secure
163 DefaultFaultHandler, // 25: Reserved
164 am_sdio_isr, // 26: SDIO
165 am_usb_isr, // 27: USB
166 am_gpu_isr, // 28: GPU
167 am_disp_isr, // 29: DISP
168 am_dsi_isr, // 30: DSI
169 DefaultFaultHandler, // 31: Reserved
170 am_stimer_cmpr0_isr, // 32: System Timer Compare0
171 am_stimer_cmpr1_isr, // 33: System Timer Compare1
172 am_stimer_cmpr2_isr, // 34: System Timer Compare2
173 am_stimer_cmpr3_isr, // 35: System Timer Compare3
174 am_stimer_cmpr4_isr, // 36: System Timer Compare4
175 am_stimer_cmpr5_isr, // 37: System Timer Compare5
176 am_stimer_cmpr6_isr, // 38: System Timer Compare6
177 am_stimer_cmpr7_isr, // 39: System Timer Compare7
178 am_stimerof_isr, // 40: System Timer Cap Overflow
179 DefaultFaultHandler, // 41: Reserved
180 am_audadc0_isr, // 42: Audio ADC
181 DefaultFaultHandler, // 43: Reserved
182 am_dspi2s0_isr, // 44: I2S0
183 am_dspi2s1_isr, // 45: I2S1
184 am_dspi2s2_isr, // 46: I2S2
185 am_dspi2s3_isr, // 47: I2S3
186 am_pdm0_isr, // 48: PDM0
187 am_pdm1_isr, // 49: PDM1
188 am_pdm2_isr, // 50: PDM2
189 am_pdm3_isr, // 51: PDM3
190 DefaultFaultHandler, // 52: Reserved
191 DefaultFaultHandler, // 53: Reserved
192 DefaultFaultHandler, // 54: Reserved
193 DefaultFaultHandler, // 55: Reserved
194 am_gpio0_001f_isr, // 56: GPIO N0 pins 0-31
195 am_gpio0_203f_isr, // 57: GPIO N0 pins 32-63
196 am_gpio0_405f_isr, // 58: GPIO N0 pins 64-95
197 am_gpio0_607f_isr, // 59: GPIO N0 pins 96-104, virtual 105-127
198 am_gpio1_001f_isr, // 60: GPIO N1 pins 0-31
199 am_gpio1_203f_isr, // 61: GPIO N1 pins 32-63
200 am_gpio1_405f_isr, // 62: GPIO N1 pins 64-95
201 am_gpio1_607f_isr, // 63: GPIO N1 pins 96-104, virtual 105-127
202 DefaultFaultHandler, // 64: Reserved
203 DefaultFaultHandler, // 65: Reserved
204 DefaultFaultHandler, // 66: Reserved
205 am_timer00_isr, // 67: timer0
206 am_timer01_isr, // 68: timer1
207 am_timer02_isr, // 69: timer2
208 am_timer03_isr, // 70: timer3
209 am_timer04_isr, // 71: timer4
210 am_timer05_isr, // 72: timer5
211 am_timer06_isr, // 73: timer6
212 am_timer07_isr, // 74: timer7
213 am_timer08_isr, // 75: timer8
214 am_timer09_isr, // 76: timer9
215 am_timer10_isr, // 77: timer10
216 am_timer11_isr, // 78: timer11
217 am_timer12_isr, // 79: timer12
218 am_timer13_isr, // 80: timer13
219 am_timer14_isr, // 81: timer14
220 am_timer15_isr, // 82: timer15
221 am_cachecpu_isr // 83: CPU cache
222 };
223