xref: /aosp_15_r20/external/musl/arch/riscv32/atomic_arch.h (revision c9945492fdd68bbe62686c5b452b4dc1be3f8453)
1 #define a_barrier a_barrier
a_barrier()2 static inline void a_barrier()
3 {
4 	__asm__ __volatile__ ("fence rw,rw" : : : "memory");
5 }
6 
7 #define a_cas a_cas
a_cas(volatile int * p,int t,int s)8 static inline int a_cas(volatile int *p, int t, int s)
9 {
10 	int old, tmp;
11 	__asm__ __volatile__ (
12 		"\n1:	lr.w.aqrl %0, (%2)\n"
13 		"	bne %0, %3, 1f\n"
14 		"	sc.w.aqrl %1, %4, (%2)\n"
15 		"	bnez %1, 1b\n"
16 		"1:"
17 		: "=&r"(old), "=&r"(tmp)
18 		: "r"(p), "r"((long)t), "r"((long)s)
19 		: "memory");
20 	return old;
21 }
22