xref: /aosp_15_r20/external/mesa3d/src/vulkan/runtime/vk_limits.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2022 Collabora, LTD
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 #ifndef VK_LIMITS_H
25 #define VK_LIMITS_H
26 
27 /* Maximun number of shader stages in a single graphics pipeline */
28 #define MESA_VK_MAX_GRAPHICS_PIPELINE_STAGES 5
29 
30 #define MESA_VK_MAX_DESCRIPTOR_SETS 32
31 
32 /* From the Vulkan 1.3.274 spec:
33  *
34  *    VUID-VkPipelineLayoutCreateInfo-pPushConstantRanges-00292
35  *
36  *    "Any two elements of pPushConstantRanges must not include the same
37  *    stage in stageFlags"
38  *
39  * and
40  *
41  *    VUID-VkPushConstantRange-stageFlags-requiredbitmask
42  *
43  *    "stageFlags must not be 0"
44  *
45  * This means that the number of push constant ranges is effectively bounded
46  * by the number of possible shader stages.  Not the number of stages that can
47  * be compiled together (a pipeline layout can be used in multiple pipelnes
48  * wth different sets of shaders) but the total number of stage bits supported
49  * by the implementation.  Currently, those are
50  *
51  *    - VK_SHADER_STAGE_VERTEX_BIT
52  *    - VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT
53  *    - VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT
54  *    - VK_SHADER_STAGE_GEOMETRY_BIT
55  *    - VK_SHADER_STAGE_FRAGMENT_BIT
56  *    - VK_SHADER_STAGE_COMPUTE_BIT
57  *    - VK_SHADER_STAGE_RAYGEN_BIT_KHR
58  *    - VK_SHADER_STAGE_ANY_HIT_BIT_KHR
59  *    - VK_SHADER_STAGE_CLOSEST_HIT_BIT_KHR
60  *    - VK_SHADER_STAGE_MISS_BIT_KHR
61  *    - VK_SHADER_STAGE_INTERSECTION_BIT_KHR
62  *    - VK_SHADER_STAGE_CALLABLE_BIT_KHR
63  *    - VK_SHADER_STAGE_TASK_BIT_EXT
64  *    - VK_SHADER_STAGE_MESH_BIT_EXT
65  */
66 #define MESA_VK_MAX_PUSH_CONSTANT_RANGES 14
67 
68 #define MESA_VK_MAX_VERTEX_BINDINGS 32
69 #define MESA_VK_MAX_VERTEX_ATTRIBUTES 32
70 
71 /* As of June 29, 2022, according to vulkan.gpuinfo.org, 99% of all reports
72  * listed a max vertex stride that fits in 16 bits.
73  */
74 #define MESA_VK_MAX_VERTEX_BINDING_STRIDE UINT16_MAX
75 
76 #define MESA_VK_MAX_VIEWPORTS 16
77 #define MESA_VK_MAX_SCISSORS 16
78 #define MESA_VK_MAX_DISCARD_RECTANGLES 4
79 
80 /* As of June 29, 2022, according to vulkan.gpuinfo.org, no reports list more
81  * than 16 samples for framebufferColorSampleCounts except one layer running
82  * on top of WARP on Windows.
83  */
84 #define MESA_VK_MAX_SAMPLES 16
85 
86 /* As of June 29, 2022, according to vulkan.gpuinfo.org, the only GPUs
87  * claiming support for maxSampleLocationGridSize greater than 1x1 is AMD
88  * which supports 2x2 but only up to 8 samples.
89  */
90 #define MESA_VK_MAX_SAMPLE_LOCATIONS 32
91 
92 #define MESA_VK_MAX_COLOR_ATTACHMENTS 8
93 
94 /* Since VkSubpassDescription2::viewMask is a 32-bit integer, there are a
95  * maximum of 32 possible views.
96  */
97 #define MESA_VK_MAX_MULTIVIEW_VIEW_COUNT 32
98 
99 #endif /* VK_LIMITS_H */
100