1 /*
2 * Copyright (C) 2019 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <[email protected]>
25 */
26
27 #include "compiler.h"
28
29 /* When we're 'squeezing down' the values in the IR, we maintain a hash
30 * as such */
31
32 static unsigned
find_or_allocate_temp(compiler_context * ctx,struct hash_table_u64 * map,unsigned hash)33 find_or_allocate_temp(compiler_context *ctx, struct hash_table_u64 *map,
34 unsigned hash)
35 {
36 if (hash >= SSA_FIXED_MINIMUM)
37 return hash;
38
39 unsigned temp = (uintptr_t)_mesa_hash_table_u64_search(map, hash + 1);
40
41 if (temp)
42 return temp - 1;
43
44 /* If no temp is find, allocate one */
45 temp = ctx->temp_count++;
46 ctx->max_hash = MAX2(ctx->max_hash, hash);
47
48 _mesa_hash_table_u64_insert(map, hash + 1, (void *)((uintptr_t)temp + 1));
49
50 return temp;
51 }
52
53 /* Reassigns numbering to get rid of gaps in the indices and to prioritize
54 * smaller register classes */
55
56 void
mir_squeeze_index(compiler_context * ctx)57 mir_squeeze_index(compiler_context *ctx)
58 {
59 struct hash_table_u64 *map = _mesa_hash_table_u64_create(NULL);
60
61 /* Reset */
62 ctx->temp_count = 0;
63
64 /* We need to prioritize texture registers on older GPUs so we don't
65 * fail RA trying to assign to work registers r0/r1 when a work
66 * register is already there */
67
68 mir_foreach_instr_global(ctx, ins) {
69 if (ins->type == TAG_TEXTURE_4)
70 ins->dest = find_or_allocate_temp(ctx, map, ins->dest);
71 }
72
73 mir_foreach_instr_global(ctx, ins) {
74 if (ins->type != TAG_TEXTURE_4)
75 ins->dest = find_or_allocate_temp(ctx, map, ins->dest);
76
77 for (unsigned i = 0; i < ARRAY_SIZE(ins->src); ++i)
78 ins->src[i] = find_or_allocate_temp(ctx, map, ins->src[i]);
79 }
80
81 ctx->blend_input = find_or_allocate_temp(ctx, map, ctx->blend_input);
82 ctx->blend_src1 = find_or_allocate_temp(ctx, map, ctx->blend_src1);
83
84 _mesa_hash_table_u64_destroy(map);
85 }
86