1 /* 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef _cl_nv50_compute_h_ 24 #define _cl_nv50_compute_h_ 25 26 /* This file is generated - do not edit. */ 27 28 #include "nvtypes.h" 29 30 #define NV50_COMPUTE 0x50C0 31 32 #define NV50C0_SET_OBJECT 0x0000 33 #define NV50C0_SET_OBJECT_POINTER 15:0 34 35 #define NV50C0_NO_OPERATION 0x0100 36 #define NV50C0_NO_OPERATION_V 31:0 37 38 #define NV50C0_NOTIFY 0x0104 39 #define NV50C0_NOTIFY_TYPE 31:0 40 #define NV50C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 41 #define NV50C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 42 43 #define NV50C0_WAIT_FOR_IDLE 0x0110 44 #define NV50C0_WAIT_FOR_IDLE_V 31:0 45 46 #define NV50C0_PM_TRIGGER 0x0140 47 #define NV50C0_PM_TRIGGER_V 31:0 48 49 #define NV50C0_SET_CONTEXT_DMA_NOTIFY 0x0180 50 #define NV50C0_SET_CONTEXT_DMA_NOTIFY_HANDLE 31:0 51 52 #define NV50C0_SET_CTX_DMA_GLOBAL_MEM 0x01a0 53 #define NV50C0_SET_CTX_DMA_GLOBAL_MEM_HANDLE 31:0 54 55 #define NV50C0_SET_CTX_DMA_SEMAPHORE 0x01a4 56 #define NV50C0_SET_CTX_DMA_SEMAPHORE_HANDLE 31:0 57 58 #define NV50C0_SET_CTX_DMA_SHADER_THREAD_MEMORY 0x01b8 59 #define NV50C0_SET_CTX_DMA_SHADER_THREAD_MEMORY_HANDLE 31:0 60 61 #define NV50C0_SET_CTX_DMA_SHADER_THREAD_STACK 0x01bc 62 #define NV50C0_SET_CTX_DMA_SHADER_THREAD_STACK_HANDLE 31:0 63 64 #define NV50C0_SET_CTX_DMA_SHADER_PROGRAM 0x01c0 65 #define NV50C0_SET_CTX_DMA_SHADER_PROGRAM_HANDLE 31:0 66 67 #define NV50C0_SET_CTX_DMA_TEXTURE_SAMPLER 0x01c4 68 #define NV50C0_SET_CTX_DMA_TEXTURE_SAMPLER_HANDLE 31:0 69 70 #define NV50C0_SET_CTX_DMA_TEXTURE_HEADERS 0x01c8 71 #define NV50C0_SET_CTX_DMA_TEXTURE_HEADERS_HANDLE 31:0 72 73 #define NV50C0_SET_CTX_DMA_TEXTURE 0x01cc 74 #define NV50C0_SET_CTX_DMA_TEXTURE_HANDLE 31:0 75 76 #define NV50C0_DECRYPTION_CONTROL(j) (0x0200+(j)*16) 77 #define NV50C0_DECRYPTION_CONTROL_ALGORITHM 15:0 78 #define NV50C0_DECRYPTION_CONTROL_ALGORITHM_NV17_COMPATIBLE 0x00000000 79 #define NV50C0_DECRYPTION_CONTROL_KEY_COUNT 23:16 80 81 #define NV50C0_DECRYPTION_QUERY_SESSION_KEY(j) (0x0204+(j)*16) 82 #define NV50C0_DECRYPTION_QUERY_SESSION_KEY_V 31:0 83 84 #define NV50C0_DECRYPTION_GET_SESSION_KEY(j) (0x0208+(j)*16) 85 #define NV50C0_DECRYPTION_GET_SESSION_KEY_V 31:0 86 87 #define NV50C0_DECRYPTION_SET_ENCRYPTION(j) (0x020c+(j)*16) 88 #define NV50C0_DECRYPTION_SET_ENCRYPTION_V 31:0 89 90 #define NV50C0_SET_CTA_PROGRAM_A 0x0210 91 #define NV50C0_SET_CTA_PROGRAM_A_OFFSET_UPPER 7:0 92 93 #define NV50C0_SET_CTA_PROGRAM_B 0x0214 94 #define NV50C0_SET_CTA_PROGRAM_B_OFFSET_LOWER 31:0 95 96 #define NV50C0_SET_SHADER_THREAD_STACK_A 0x0218 97 #define NV50C0_SET_SHADER_THREAD_STACK_A_OFFSET_UPPER 7:0 98 99 #define NV50C0_SET_SHADER_THREAD_STACK_B 0x021c 100 #define NV50C0_SET_SHADER_THREAD_STACK_B_OFFSET_LOWER 31:0 101 102 #define NV50C0_SET_SHADER_THREAD_STACK_C 0x0220 103 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE 3:0 104 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__0 0x00000000 105 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__1 0x00000001 106 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__2 0x00000002 107 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__4 0x00000003 108 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__8 0x00000004 109 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__16 0x00000005 110 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__32 0x00000006 111 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__64 0x00000007 112 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__128 0x00000008 113 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__256 0x00000009 114 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__512 0x0000000A 115 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__1024 0x0000000B 116 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__2048 0x0000000C 117 #define NV50C0_SET_SHADER_THREAD_STACK_C_SIZE__4096 0x0000000D 118 119 #define NV50C0_SET_API_CALL_LIMIT 0x0224 120 #define NV50C0_SET_API_CALL_LIMIT_CTA 3:0 121 #define NV50C0_SET_API_CALL_LIMIT_CTA__0 0x00000000 122 #define NV50C0_SET_API_CALL_LIMIT_CTA__1 0x00000001 123 #define NV50C0_SET_API_CALL_LIMIT_CTA__2 0x00000002 124 #define NV50C0_SET_API_CALL_LIMIT_CTA__4 0x00000003 125 #define NV50C0_SET_API_CALL_LIMIT_CTA__8 0x00000004 126 #define NV50C0_SET_API_CALL_LIMIT_CTA__16 0x00000005 127 #define NV50C0_SET_API_CALL_LIMIT_CTA__32 0x00000006 128 #define NV50C0_SET_API_CALL_LIMIT_CTA__64 0x00000007 129 #define NV50C0_SET_API_CALL_LIMIT_CTA__128 0x00000008 130 #define NV50C0_SET_API_CALL_LIMIT_CTA_NO_CHECK 0x0000000F 131 132 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL 0x0228 133 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 134 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 135 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 136 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_ICACHE_PIXEL_ASSOCIATIVITY 7:4 137 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_ICACHE_NONPIXEL_ASSOCIATIVITY 11:8 138 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_DCACHE_PIXEL_ASSOCIATIVITY 15:12 139 #define NV50C0_SET_SHADER_L1_CACHE_CONTROL_DCACHE_NONPIXEL_ASSOCIATIVITY 19:16 140 141 #define NV50C0_SET_TEX_SAMPLER_POOL_A 0x022c 142 #define NV50C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 143 144 #define NV50C0_SET_TEX_SAMPLER_POOL_B 0x0230 145 #define NV50C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 146 147 #define NV50C0_SET_TEX_SAMPLER_POOL_C 0x0234 148 #define NV50C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 149 150 #define NV50C0_LOAD_CONSTANT_SELECTOR 0x0238 151 #define NV50C0_LOAD_CONSTANT_SELECTOR_TABLE_INDEX 7:0 152 #define NV50C0_LOAD_CONSTANT_SELECTOR_CONSTANT_INDEX 23:8 153 154 #define NV50C0_LOAD_CONSTANT(i) (0x023c+(i)*4) 155 #define NV50C0_LOAD_CONSTANT_V 31:0 156 157 #define NV50C0_INVALIDATE_SAMPLER_CACHE 0x027c 158 #define NV50C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 159 #define NV50C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 160 #define NV50C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 161 #define NV50C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 162 163 #define NV50C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x0280 164 #define NV50C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 165 #define NV50C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 166 #define NV50C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 167 #define NV50C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 168 169 #define NV50C0_SET_SM_TIMEOUT_INTERVAL 0x0288 170 #define NV50C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 171 172 #define NV50C0_TEST_FOR_COMPUTE 0x028c 173 #define NV50C0_TEST_FOR_COMPUTE_V 31:0 174 175 #define NV50C0_SET_SHADER_SCHEDULING 0x0290 176 #define NV50C0_SET_SHADER_SCHEDULING_MODE 0:0 177 #define NV50C0_SET_SHADER_SCHEDULING_MODE_OLDEST_THREAD_FIRST 0x00000000 178 #define NV50C0_SET_SHADER_SCHEDULING_MODE_ROUND_ROBIN 0x00000001 179 180 #define NV50C0_SET_SHADER_THREAD_MEMORY_A 0x0294 181 #define NV50C0_SET_SHADER_THREAD_MEMORY_A_OFFSET_UPPER 7:0 182 183 #define NV50C0_SET_SHADER_THREAD_MEMORY_B 0x0298 184 #define NV50C0_SET_SHADER_THREAD_MEMORY_B_OFFSET_LOWER 31:0 185 186 #define NV50C0_SET_SHADER_THREAD_MEMORY_C 0x029c 187 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE 3:0 188 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__0 0x00000000 189 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__1 0x00000001 190 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__2 0x00000002 191 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__4 0x00000003 192 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__8 0x00000004 193 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__16 0x00000005 194 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__32 0x00000006 195 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__64 0x00000007 196 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__128 0x00000008 197 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__256 0x00000009 198 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__512 0x0000000A 199 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__1024 0x0000000B 200 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__2048 0x0000000C 201 #define NV50C0_SET_SHADER_THREAD_MEMORY_C_SIZE__4096 0x0000000D 202 203 #define NV50C0_SET_WORK_DISTRIBUTION 0x02a0 204 #define NV50C0_SET_WORK_DISTRIBUTION_V 3:0 205 #define NV50C0_SET_WORK_DISTRIBUTION_V_HARDWARE_POLICY 0x00000000 206 #define NV50C0_SET_WORK_DISTRIBUTION_V_WIDE_DYNAMIC 0x00000001 207 #define NV50C0_SET_WORK_DISTRIBUTION_V_DEEP_DYNAMIC 0x00000002 208 #define NV50C0_SET_WORK_DISTRIBUTION_V_WIDE_FIXED 0x00000003 209 #define NV50C0_SET_WORK_DISTRIBUTION_V_DEEP_FIXED 0x00000004 210 #define NV50C0_SET_WORK_DISTRIBUTION_V_FILL_WIDE_DYNAMIC 0x00000005 211 #define NV50C0_SET_WORK_DISTRIBUTION_V_FILL_DEEP_DYNAMIC 0x00000006 212 #define NV50C0_SET_WORK_DISTRIBUTION_V_FILL_WIDE_FIXED 0x00000007 213 #define NV50C0_SET_WORK_DISTRIBUTION_V_FILL_DEEP_FIXED 0x00000008 214 215 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_A 0x02a4 216 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_A_OFFSET_UPPER 7:0 217 218 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_B 0x02a8 219 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_B_OFFSET_LOWER 31:0 220 221 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_C 0x02ac 222 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_C_SIZE 15:0 223 #define NV50C0_LOAD_CONSTANT_BUFFER_TABLE_C_ENTRY 23:16 224 225 #define NV50C0_SET_SHADER_ERROR_TRAP_CONTROL 0x02b0 226 #define NV50C0_SET_SHADER_ERROR_TRAP_CONTROL_MASTER_MASK 0:0 227 #define NV50C0_SET_SHADER_ERROR_TRAP_CONTROL_MASTER_MASK_FALSE 0x00000000 228 #define NV50C0_SET_SHADER_ERROR_TRAP_CONTROL_MASTER_MASK_TRUE 0x00000001 229 #define NV50C0_SET_SHADER_ERROR_TRAP_CONTROL_SUBSET_MASK 31:1 230 231 #define NV50C0_SET_CTA_RESOURCE_ALLOCATION 0x02b4 232 #define NV50C0_SET_CTA_RESOURCE_ALLOCATION_THREAD_COUNT 15:0 233 #define NV50C0_SET_CTA_RESOURCE_ALLOCATION_BARRIER_COUNT 23:16 234 235 #define NV50C0_SET_CTA_THREAD_CONTROL 0x02b8 236 #define NV50C0_SET_CTA_THREAD_CONTROL_ALLOW_CONVOY_LAUNCH 0:0 237 #define NV50C0_SET_CTA_THREAD_CONTROL_ALLOW_CONVOY_LAUNCH_FALSE 0x00000000 238 #define NV50C0_SET_CTA_THREAD_CONTROL_ALLOW_CONVOY_LAUNCH_TRUE 0x00000001 239 240 #define NV50C0_SET_PHASE_ID_CONTROL 0x02bc 241 #define NV50C0_SET_PHASE_ID_CONTROL_WINDOW_SIZE 2:0 242 #define NV50C0_SET_PHASE_ID_CONTROL_LOCK_PHASE 6:4 243 244 #define NV50C0_SET_CTA_REGISTER_COUNT 0x02c0 245 #define NV50C0_SET_CTA_REGISTER_COUNT_V 7:0 246 247 #define NV50C0_SET_TEX_HEADER_POOL_A 0x02c4 248 #define NV50C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 249 250 #define NV50C0_SET_TEX_HEADER_POOL_B 0x02c8 251 #define NV50C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 252 253 #define NV50C0_SET_TEX_HEADER_POOL_C 0x02cc 254 #define NV50C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 255 256 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x02d0+(i)*4) 257 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 258 259 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL(i) (0x02e0+(i)*4) 260 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_EDGE 0:0 261 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK 6:4 262 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_ACE 0x00000000 263 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_DIS 0x00000001 264 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_DSM 0x00000002 265 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_PIC 0x00000003 266 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_STP 0x00000004 267 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_BLOCK_XIU 0x00000005 268 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_FUNC 23:8 269 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_EVENT 31:24 270 271 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x02f0 272 #define NV50C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 3:0 273 274 #define NV50C0_RESET_CTA_TRACKING_RAM 0x02f4 275 #define NV50C0_RESET_CTA_TRACKING_RAM_V 31:0 276 277 #define NV50C0_INITIALIZE 0x02f8 278 #define NV50C0_INITIALIZE_INIT_CTA_SHAPE 0:0 279 #define NV50C0_INITIALIZE_INIT_CTA_SHAPE_FALSE 0x00000000 280 #define NV50C0_INITIALIZE_INIT_CTA_SHAPE_TRUE 0x00000001 281 282 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE 0x02fc 283 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM 2:0 284 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM__1 0x00000000 285 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM__2 0x00000001 286 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM__4 0x00000002 287 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM__8 0x00000003 288 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM__16 0x00000004 289 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_MAX_TIDS_PER_SM_HW_MAX 0x00000007 290 291 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_CONTROL 0x0300 292 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_CONTROL_V 2:0 293 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_CONTROL_V_USE_THROTTLE_MAX 0x00000000 294 #define NV50C0_SET_SHADER_THREAD_MEMORY_THROTTLE_CONTROL_V_USE_HW_MAX 0x00000001 295 296 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE 0x0304 297 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM 2:0 298 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM__1 0x00000000 299 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM__2 0x00000001 300 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM__4 0x00000002 301 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM__8 0x00000003 302 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM__16 0x00000004 303 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_MAX_TIDS_PER_SM_HW_MAX 0x00000007 304 305 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_CONTROL 0x0308 306 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_CONTROL_V 2:0 307 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_CONTROL_V_USE_THROTTLE_MAX 0x00000000 308 #define NV50C0_SET_SHADER_THREAD_STACK_THROTTLE_CONTROL_V_USE_HW_MAX 0x00000001 309 310 #define NV50C0_PREFETCH_SHADER_INSTRUCTIONS 0x030c 311 #define NV50C0_PREFETCH_SHADER_INSTRUCTIONS_CTA 0:0 312 #define NV50C0_PREFETCH_SHADER_INSTRUCTIONS_CTA_FALSE 0x00000000 313 #define NV50C0_PREFETCH_SHADER_INSTRUCTIONS_CTA_TRUE 0x00000001 314 315 #define NV50C0_SET_REPORT_SEMAPHORE_A 0x0310 316 #define NV50C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 317 318 #define NV50C0_SET_REPORT_SEMAPHORE_B 0x0314 319 #define NV50C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 320 321 #define NV50C0_SET_REPORT_SEMAPHORE_C 0x0318 322 #define NV50C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 323 324 #define NV50C0_SET_REPORT_SEMAPHORE_D 0x031c 325 #define NV50C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 326 #define NV50C0_SET_REPORT_SEMAPHORE_D_OPERATION_UNUSED 0x00000000 327 #define NV50C0_SET_REPORT_SEMAPHORE_D_RELEASE 2:2 328 #define NV50C0_SET_REPORT_SEMAPHORE_D_RELEASE_UNUSED 0x00000000 329 #define NV50C0_SET_REPORT_SEMAPHORE_D_ACQUIRE 3:3 330 #define NV50C0_SET_REPORT_SEMAPHORE_D_ACQUIRE_UNUSED 0x00000000 331 #define NV50C0_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 7:4 332 #define NV50C0_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_UNUSED 0x00000000 333 #define NV50C0_SET_REPORT_SEMAPHORE_D_COMPARISON 8:8 334 #define NV50C0_SET_REPORT_SEMAPHORE_D_COMPARISON_UNUSED 0x00000000 335 #define NV50C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 9:9 336 #define NV50C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 337 #define NV50C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 338 #define NV50C0_SET_REPORT_SEMAPHORE_D_REPORT 14:10 339 #define NV50C0_SET_REPORT_SEMAPHORE_D_REPORT_UNUSED 0x00000000 340 #define NV50C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 15:15 341 #define NV50C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 342 #define NV50C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 343 344 #define NV50C0_SET_LAUNCH_ENABLE_A 0x0320 345 #define NV50C0_SET_LAUNCH_ENABLE_A_OFFSET_UPPER 7:0 346 347 #define NV50C0_SET_LAUNCH_ENABLE_B 0x0324 348 #define NV50C0_SET_LAUNCH_ENABLE_B_OFFSET_LOWER 31:0 349 350 #define NV50C0_SET_LAUNCH_ENABLE_C 0x0328 351 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE 2:0 352 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE_FALSE 0x00000000 353 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE_TRUE 0x00000001 354 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE_CONDITIONAL 0x00000002 355 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 356 #define NV50C0_SET_LAUNCH_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 357 358 #define NV50C0_SET_CUBEMAP_ADDRESS_MODE_OVERRIDE 0x032c 359 #define NV50C0_SET_CUBEMAP_ADDRESS_MODE_OVERRIDE_ENABLE 31:0 360 #define NV50C0_SET_CUBEMAP_ADDRESS_MODE_OVERRIDE_ENABLE_FALSE 0x00000000 361 #define NV50C0_SET_CUBEMAP_ADDRESS_MODE_OVERRIDE_ENABLE_TRUE 0x00000001 362 363 #define NV50C0_PIPE_NOP 0x0330 364 #define NV50C0_PIPE_NOP_V 31:0 365 366 #define NV50C0_SET_SPARE00 0x0340 367 #define NV50C0_SET_SPARE00_V 31:0 368 369 #define NV50C0_SET_SPARE01 0x0344 370 #define NV50C0_SET_SPARE01_V 31:0 371 372 #define NV50C0_SET_SPARE02 0x0348 373 #define NV50C0_SET_SPARE02_V 31:0 374 375 #define NV50C0_SET_SPARE03 0x034c 376 #define NV50C0_SET_SPARE03_V 31:0 377 378 #define NV50C0_SET_GLOBAL_COLOR_KEY 0x0358 379 #define NV50C0_SET_GLOBAL_COLOR_KEY_ENABLE 31:0 380 #define NV50C0_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 381 #define NV50C0_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 382 383 #define NV50C0_RESET_REF_COUNT 0x035c 384 #define NV50C0_RESET_REF_COUNT_REF_CNT 3:0 385 386 #define NV50C0_WAIT_REF_COUNT 0x0360 387 #define NV50C0_WAIT_REF_COUNT_COMPARE 7:4 388 #define NV50C0_WAIT_REF_COUNT_COMPARE_COUNT_QUIESENT 0x00000000 389 #define NV50C0_WAIT_REF_COUNT_COMPARE_VALUE_EQUAL 0x00000001 390 #define NV50C0_WAIT_REF_COUNT_COMPARE_VALUE_CLOCKHAND 0x00000002 391 #define NV50C0_WAIT_REF_COUNT_REF_CNT 11:8 392 393 #define NV50C0_SET_REF_COUNT_VALUE 0x0364 394 #define NV50C0_SET_REF_COUNT_VALUE_V 31:0 395 396 #define NV50C0_LAUNCH 0x0368 397 #define NV50C0_LAUNCH_V 31:0 398 399 #define NV50C0_SET_LAUNCH_ID 0x036c 400 #define NV50C0_SET_LAUNCH_ID_REF_CNT 3:0 401 402 #define NV50C0_SET_LAUNCH_CONTROL 0x0370 403 #define NV50C0_SET_LAUNCH_CONTROL_LAUNCH 7:0 404 #define NV50C0_SET_LAUNCH_CONTROL_LAUNCH_MANUAL_LAUNCH 0x00000000 405 #define NV50C0_SET_LAUNCH_CONTROL_LAUNCH_AUTO_LAUNCH 0x00000001 406 407 #define NV50C0_SET_PARAMETER_SIZE 0x0374 408 #define NV50C0_SET_PARAMETER_SIZE_AUTO_LAUNCH_INDEX 7:0 409 #define NV50C0_SET_PARAMETER_SIZE_COUNT 15:8 410 411 #define NV50C0_SET_SAMPLER_BINDING 0x0378 412 #define NV50C0_SET_SAMPLER_BINDING_V 0:0 413 #define NV50C0_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 414 #define NV50C0_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 415 416 #define NV50C0_SET_SHADER_CONTROL 0x037c 417 #define NV50C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 418 #define NV50C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 419 #define NV50C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 420 #define NV50C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO 16:16 421 #define NV50C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 422 #define NV50C0_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 423 424 #define NV50C0_INVALIDATE_SHADER_CACHE 0x0380 425 #define NV50C0_INVALIDATE_SHADER_CACHE_V 1:0 426 #define NV50C0_INVALIDATE_SHADER_CACHE_V_ALL 0x00000000 427 #define NV50C0_INVALIDATE_SHADER_CACHE_V_L1 0x00000001 428 #define NV50C0_INVALIDATE_SHADER_CACHE_V_L1_DATA 0x00000002 429 #define NV50C0_INVALIDATE_SHADER_CACHE_V_L1_INSTRUCTION 0x00000003 430 431 #define NV50C0_SET_RASTER_CONTROL 0x0384 432 #define NV50C0_SET_RASTER_CONTROL_PROGRAM 7:0 433 #define NV50C0_SET_RASTER_CONTROL_PROGRAM_DISABLE 0x00000000 434 #define NV50C0_SET_RASTER_CONTROL_FIXED 15:8 435 #define NV50C0_SET_RASTER_CONTROL_FIXED_DISABLE 0x00000000 436 #define NV50C0_SET_RASTER_CONTROL_FIXED_SIMPLE 0x00000001 437 #define NV50C0_SET_RASTER_CONTROL_FIXED_DXVA_RUN_CODED 0x00000002 438 #define NV50C0_SET_RASTER_CONTROL_DECRYPTION 23:16 439 #define NV50C0_SET_RASTER_CONTROL_DECRYPTION_DISABLE 0x00000000 440 #define NV50C0_SET_RASTER_CONTROL_DECRYPTION_ENABLE 0x00000001 441 442 #define NV50C0_SET_CTA_FLAGS 0x0388 443 #define NV50C0_SET_CTA_FLAGS_V 15:0 444 445 #define NV50C0_SET_CTA_RASTER_SIZE 0x03a4 446 #define NV50C0_SET_CTA_RASTER_SIZE_WIDTH 15:0 447 #define NV50C0_SET_CTA_RASTER_SIZE_HEIGHT 31:16 448 449 #define NV50C0_SET_CTA_GRF_SIZE 0x03a8 450 #define NV50C0_SET_CTA_GRF_SIZE_V 31:0 451 452 #define NV50C0_SET_CTA_THREAD_DIMENSION_A 0x03ac 453 #define NV50C0_SET_CTA_THREAD_DIMENSION_A_D0 15:0 454 #define NV50C0_SET_CTA_THREAD_DIMENSION_A_D1 31:16 455 456 #define NV50C0_SET_CTA_THREAD_DIMENSION_B 0x03b0 457 #define NV50C0_SET_CTA_THREAD_DIMENSION_B_D2 15:0 458 459 #define NV50C0_SET_CTA_PROGRAM_START 0x03b4 460 #define NV50C0_SET_CTA_PROGRAM_START_OFFSET 23:0 461 462 #define NV50C0_SET_CTA_REGISTER_ALLOCATION 0x03b8 463 #define NV50C0_SET_CTA_REGISTER_ALLOCATION_V 31:0 464 #define NV50C0_SET_CTA_REGISTER_ALLOCATION_V_THICK 0x00000001 465 #define NV50C0_SET_CTA_REGISTER_ALLOCATION_V_THIN 0x00000002 466 467 #define NV50C0_SET_CTA_TEXTURE 0x03bc 468 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS 3:0 469 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS__1 0x00000000 470 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS__2 0x00000001 471 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS__4 0x00000002 472 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS__8 0x00000003 473 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_SAMPLERS__16 0x00000004 474 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS 7:4 475 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__1 0x00000000 476 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__2 0x00000001 477 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__4 0x00000002 478 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__8 0x00000003 479 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__16 0x00000004 480 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__32 0x00000005 481 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__64 0x00000006 482 #define NV50C0_SET_CTA_TEXTURE_MAX_ACTIVE_HEADERS__128 0x00000007 483 484 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER 0x03c0 485 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER_VALID 0:0 486 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER_VALID_FALSE 0x00000000 487 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER_VALID_TRUE 0x00000001 488 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER_SAMPLER_SLOT 11:4 489 #define NV50C0_BIND_CTA_TEXTURE_SAMPLER_INDEX 24:12 490 491 #define NV50C0_BIND_CTA_TEXTURE_HEADER 0x03c4 492 #define NV50C0_BIND_CTA_TEXTURE_HEADER_VALID 0:0 493 #define NV50C0_BIND_CTA_TEXTURE_HEADER_VALID_FALSE 0x00000000 494 #define NV50C0_BIND_CTA_TEXTURE_HEADER_VALID_TRUE 0x00000001 495 #define NV50C0_BIND_CTA_TEXTURE_HEADER_TEXTURE_SLOT 8:1 496 #define NV50C0_BIND_CTA_TEXTURE_HEADER_INDEX 30:9 497 498 #define NV50C0_BIND_CONSTANT_BUFFER 0x03c8 499 #define NV50C0_BIND_CONSTANT_BUFFER_VALID 3:0 500 #define NV50C0_BIND_CONSTANT_BUFFER_VALID_FALSE 0x00000000 501 #define NV50C0_BIND_CONSTANT_BUFFER_VALID_TRUE 0x00000001 502 #define NV50C0_BIND_CONSTANT_BUFFER_SHADER_TYPE 7:4 503 #define NV50C0_BIND_CONSTANT_BUFFER_SHADER_TYPE_CTA 0x00000000 504 #define NV50C0_BIND_CONSTANT_BUFFER_SHADER_SLOT 11:8 505 #define NV50C0_BIND_CONSTANT_BUFFER_TABLE_ENTRY 19:12 506 507 #define NV50C0_PREFETCH_TEXTURE_SAMPLER 0x03cc 508 #define NV50C0_PREFETCH_TEXTURE_SAMPLER_INDEX 21:0 509 510 #define NV50C0_INVALIDATE_TEXTURE_DATA_CACHE 0x03d0 511 #define NV50C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS 5:4 512 #define NV50C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS_L1_ONLY 0x00000000 513 #define NV50C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS_L2_ONLY 0x00000001 514 #define NV50C0_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS_L1_AND_L2 0x00000002 515 516 #define NV50C0_SET_SHADER_EXCEPTIONS 0x03ec 517 #define NV50C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 518 #define NV50C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 519 #define NV50C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 520 521 #define NV50C0_SET_GLOBAL_MEM_A(j) (0x0400+(j)*32) 522 #define NV50C0_SET_GLOBAL_MEM_A_OFFSET_UPPER 7:0 523 524 #define NV50C0_SET_GLOBAL_MEM_B(j) (0x0404+(j)*32) 525 #define NV50C0_SET_GLOBAL_MEM_B_OFFSET_LOWER 31:0 526 527 #define NV50C0_SET_GLOBAL_MEM_SIZE(j) (0x0408+(j)*32) 528 #define NV50C0_SET_GLOBAL_MEM_SIZE_BLOCK_PITCH 31:0 529 530 #define NV50C0_SET_GLOBAL_MEM_LIMIT(j) (0x040c+(j)*32) 531 #define NV50C0_SET_GLOBAL_MEM_LIMIT_MAX 31:0 532 533 #define NV50C0_SET_GLOBAL_MEM_FORMAT(j) (0x0410+(j)*32) 534 #define NV50C0_SET_GLOBAL_MEM_FORMAT_MEM_LAYOUT 0:0 535 #define NV50C0_SET_GLOBAL_MEM_FORMAT_MEM_LAYOUT_BLOCKLINEAR 0x00000000 536 #define NV50C0_SET_GLOBAL_MEM_FORMAT_MEM_LAYOUT_PITCH 0x00000001 537 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_WIDTH 7:4 538 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_WIDTH_ONE_GOB 0x00000000 539 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT 11:8 540 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_ONE_GOB 0x00000000 541 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_TWO_GOBS 0x00000001 542 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_FOUR_GOBS 0x00000002 543 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_EIGHT_GOBS 0x00000003 544 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_SIXTEEN_GOBS 0x00000004 545 #define NV50C0_SET_GLOBAL_MEM_FORMAT_BLOCK_LINEAR_HEIGHT_THIRTYTWO_GOBS 0x00000005 546 547 #define NV50C0_PARAMETER(i) (0x0600+(i)*4) 548 #define NV50C0_PARAMETER_V 31:0 549 550 #define NV50C0_SET_SPARE_NOOP00 0x0700 551 #define NV50C0_SET_SPARE_NOOP00_V 31:0 552 553 #define NV50C0_SET_SPARE_NOOP01 0x0704 554 #define NV50C0_SET_SPARE_NOOP01_V 31:0 555 556 #define NV50C0_SET_SPARE_NOOP02 0x0708 557 #define NV50C0_SET_SPARE_NOOP02_V 31:0 558 559 #define NV50C0_SET_SPARE_NOOP03 0x070c 560 #define NV50C0_SET_SPARE_NOOP03_V 31:0 561 562 #define NV50C0_SET_SPARE_NOOP04 0x0710 563 #define NV50C0_SET_SPARE_NOOP04_V 31:0 564 565 #define NV50C0_SET_SPARE_NOOP05 0x0714 566 #define NV50C0_SET_SPARE_NOOP05_V 31:0 567 568 #define NV50C0_SET_SPARE_NOOP06 0x0718 569 #define NV50C0_SET_SPARE_NOOP06_V 31:0 570 571 #define NV50C0_SET_SPARE_NOOP07 0x071c 572 #define NV50C0_SET_SPARE_NOOP07_V 31:0 573 574 #define NV50C0_SET_SPARE_NOOP08 0x0720 575 #define NV50C0_SET_SPARE_NOOP08_V 31:0 576 577 #define NV50C0_SET_SPARE_NOOP09 0x0724 578 #define NV50C0_SET_SPARE_NOOP09_V 31:0 579 580 #define NV50C0_SET_SPARE_NOOP10 0x0728 581 #define NV50C0_SET_SPARE_NOOP10_V 31:0 582 583 #define NV50C0_SET_SPARE_NOOP11 0x072c 584 #define NV50C0_SET_SPARE_NOOP11_V 31:0 585 586 #define NV50C0_SET_SPARE_NOOP12 0x0730 587 #define NV50C0_SET_SPARE_NOOP12_V 31:0 588 589 #define NV50C0_SET_SPARE_NOOP13 0x0734 590 #define NV50C0_SET_SPARE_NOOP13_V 31:0 591 592 #define NV50C0_SET_SPARE_NOOP14 0x0738 593 #define NV50C0_SET_SPARE_NOOP14_V 31:0 594 595 #define NV50C0_SET_SPARE_NOOP15 0x073c 596 #define NV50C0_SET_SPARE_NOOP15_V 31:0 597 598 #endif /* _cl_nv50_compute_h_ */ 599