xref: /aosp_15_r20/external/mesa3d/src/intel/compiler/brw_private.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /* -*- c++ -*- */
2 /*
3  * Copyright © 2021 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 
25 #ifndef BRW_PRIVATE_H
26 #define BRW_PRIVATE_H
27 
28 #include "brw_compiler.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
34 /* brw_fs_reg_allocate.cpp */
35 void brw_fs_alloc_reg_sets(struct brw_compiler *compiler);
36 
37 /* brw_disasm.c */
38 extern const char *const conditional_modifier[16];
39 extern const char *const pred_ctrl_align16[16];
40 
41 #ifdef __cplusplus
42 }
43 #endif
44 
45 #ifdef __cplusplus
46 
47 #include <variant>
48 
49 unsigned brw_required_dispatch_width(const struct shader_info *info);
50 
51 static constexpr int SIMD_COUNT = 3;
52 
53 struct brw_simd_selection_state {
54    const struct intel_device_info *devinfo;
55 
56    std::variant<struct brw_cs_prog_data *,
57                 struct brw_bs_prog_data *> prog_data;
58 
59    unsigned required_width;
60 
61    const char *error[SIMD_COUNT];
62 
63    bool compiled[SIMD_COUNT];
64    bool spilled[SIMD_COUNT];
65 };
66 
brw_simd_first_compiled(const brw_simd_selection_state & state)67 inline int brw_simd_first_compiled(const brw_simd_selection_state &state)
68 {
69    for (int i = 0; i < SIMD_COUNT; i++) {
70       if (state.compiled[i])
71          return i;
72    }
73    return -1;
74 }
75 
brw_simd_any_compiled(const brw_simd_selection_state & state)76 inline bool brw_simd_any_compiled(const brw_simd_selection_state &state)
77 {
78    return brw_simd_first_compiled(state) >= 0;
79 }
80 
81 unsigned brw_geometry_stage_dispatch_width(const struct intel_device_info *devinfo);
82 
83 bool brw_simd_should_compile(brw_simd_selection_state &state, unsigned simd);
84 
85 void brw_simd_mark_compiled(brw_simd_selection_state &state, unsigned simd, bool spilled);
86 
87 int brw_simd_select(const brw_simd_selection_state &state);
88 
89 int brw_simd_select_for_workgroup_size(const struct intel_device_info *devinfo,
90                                        const struct brw_cs_prog_data *prog_data,
91                                        const unsigned *sizes);
92 
93 bool brw_should_print_shader(const nir_shader *shader, uint64_t debug_flag);
94 
95 #endif // __cplusplus
96 
97 #endif // BRW_PRIVATE_H
98