1 /************************************************************************** 2 * 3 * Copyright 2009 Younes Manton. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_VIDEO_STATE_H 29 #define PIPE_VIDEO_STATE_H 30 31 #include "pipe/p_defines.h" 32 #include "util/format/u_formats.h" 33 #include "pipe/p_state.h" 34 #include "pipe/p_screen.h" 35 #include "util/u_hash_table.h" 36 #include "util/u_inlines.h" 37 #include "util/u_rect.h" 38 #include "util/u_dynarray.h" 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #define PIPE_H264_MAX_NUM_LIST_REF 32 45 #define PIPE_H264_MAX_DPB_SIZE 33 46 #define PIPE_H265_MAX_NUM_LIST_REF 15 47 #define PIPE_H265_MAX_DPB_SIZE 16 48 #define PIPE_H265_MAX_SLICES 128 49 #define PIPE_H264_MAX_REFERENCES 16 50 #define PIPE_H265_MAX_REFERENCES 15 51 #define PIPE_AV1_MAX_REFERENCES 8 52 #define PIPE_DEFAULT_FRAME_RATE_DEN 1 53 #define PIPE_DEFAULT_FRAME_RATE_NUM 30 54 #define PIPE_DEFAULT_INTRA_IDR_PERIOD 30 55 #define PIPE_H2645_EXTENDED_SAR 255 56 #define PIPE_ENC_ROI_REGION_NUM_MAX 32 57 #define PIPE_DEFAULT_DECODER_FEEDBACK_TIMEOUT_NS 1000000000 58 #define PIPE_H2645_LIST_REF_INVALID_ENTRY 0xff 59 #define PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS 32 60 #define PIPE_H265_MAX_LONG_TERM_PICS 16 61 #define PIPE_H265_MAX_DELTA_POC 48 62 #define PIPE_H265_MAX_DPB_SIZE 16 63 #define PIPE_H265_MAX_NUM_LIST_REF 15 64 #define PIPE_H265_MAX_ST_REF_PIC_SETS 64 65 #define PIPE_H265_MAX_SUB_LAYERS 7 66 67 /* 68 * see table 6-12 in the spec 69 */ 70 enum pipe_mpeg12_picture_coding_type 71 { 72 PIPE_MPEG12_PICTURE_CODING_TYPE_I = 0x01, 73 PIPE_MPEG12_PICTURE_CODING_TYPE_P = 0x02, 74 PIPE_MPEG12_PICTURE_CODING_TYPE_B = 0x03, 75 PIPE_MPEG12_PICTURE_CODING_TYPE_D = 0x04 76 }; 77 78 /* 79 * see table 6-14 in the spec 80 */ 81 enum pipe_mpeg12_picture_structure 82 { 83 PIPE_MPEG12_PICTURE_STRUCTURE_RESERVED = 0x00, 84 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_TOP = 0x01, 85 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_BOTTOM = 0x02, 86 PIPE_MPEG12_PICTURE_STRUCTURE_FRAME = 0x03 87 }; 88 89 /* 90 * flags for macroblock_type, see section 6.3.17.1 in the spec 91 */ 92 enum pipe_mpeg12_macroblock_type 93 { 94 PIPE_MPEG12_MB_TYPE_QUANT = 0x01, 95 PIPE_MPEG12_MB_TYPE_MOTION_FORWARD = 0x02, 96 PIPE_MPEG12_MB_TYPE_MOTION_BACKWARD = 0x04, 97 PIPE_MPEG12_MB_TYPE_PATTERN = 0x08, 98 PIPE_MPEG12_MB_TYPE_INTRA = 0x10 99 }; 100 101 /* 102 * flags for motion_type, see table 6-17 and 6-18 in the spec 103 */ 104 enum pipe_mpeg12_motion_type 105 { 106 PIPE_MPEG12_MO_TYPE_RESERVED = 0x00, 107 PIPE_MPEG12_MO_TYPE_FIELD = 0x01, 108 PIPE_MPEG12_MO_TYPE_FRAME = 0x02, 109 PIPE_MPEG12_MO_TYPE_16x8 = 0x02, 110 PIPE_MPEG12_MO_TYPE_DUAL_PRIME = 0x03 111 }; 112 113 /* 114 * see section 6.3.17.1 and table 6-19 in the spec 115 */ 116 enum pipe_mpeg12_dct_type 117 { 118 PIPE_MPEG12_DCT_TYPE_FRAME = 0, 119 PIPE_MPEG12_DCT_TYPE_FIELD = 1 120 }; 121 122 enum pipe_mpeg12_field_select 123 { 124 PIPE_MPEG12_FS_FIRST_FORWARD = 0x01, 125 PIPE_MPEG12_FS_FIRST_BACKWARD = 0x02, 126 PIPE_MPEG12_FS_SECOND_FORWARD = 0x04, 127 PIPE_MPEG12_FS_SECOND_BACKWARD = 0x08 128 }; 129 130 enum pipe_h264_nal_unit_type 131 { 132 PIPE_H264_NAL_SLICE = 1, 133 PIPE_H264_NAL_IDR_SLICE= 5, 134 PIPE_H264_NAL_SPS = 7, 135 PIPE_H264_NAL_PPS = 8, 136 PIPE_H264_NAL_AUD = 9, 137 }; 138 139 enum pipe_h264_slice_type 140 { 141 PIPE_H264_SLICE_TYPE_P = 0x0, 142 PIPE_H264_SLICE_TYPE_B = 0x1, 143 PIPE_H264_SLICE_TYPE_I = 0x2, 144 PIPE_H264_SLICE_TYPE_SP = 0x3, 145 PIPE_H264_SLICE_TYPE_SI = 0x4 146 }; 147 148 enum pipe_h265_nal_unit_type 149 { 150 PIPE_H265_NAL_TRAIL_N = 0, 151 PIPE_H265_NAL_TRAIL_R = 1, 152 PIPE_H265_NAL_TSA_N = 2, 153 PIPE_H265_NAL_TSA_R = 3, 154 PIPE_H265_NAL_BLA_W_LP = 16, 155 PIPE_H265_NAL_IDR_W_RADL = 19, 156 PIPE_H265_NAL_IDR_N_LP = 20, 157 PIPE_H265_NAL_CRA_NUT = 21, 158 PIPE_H265_NAL_RSV_IRAP_VCL23 = 23, 159 PIPE_H265_NAL_VPS = 32, 160 PIPE_H265_NAL_SPS = 33, 161 PIPE_H265_NAL_PPS = 34, 162 PIPE_H265_NAL_AUD = 35, 163 PIPE_H265_NAL_PREFIX_SEI = 39, 164 }; 165 166 enum pipe_h265_slice_type 167 { 168 /* Values match Table 7-7 in HEVC spec 169 for Name association of slice_type */ 170 PIPE_H265_SLICE_TYPE_B = 0x0, 171 PIPE_H265_SLICE_TYPE_P = 0x1, 172 PIPE_H265_SLICE_TYPE_I = 0x2, 173 }; 174 175 /* To be used on each encoding feature bit field */ 176 enum pipe_enc_feature 177 { 178 PIPE_ENC_FEATURE_NOT_SUPPORTED = 0x0, 179 PIPE_ENC_FEATURE_SUPPORTED = 0x1, 180 PIPE_ENC_FEATURE_REQUIRED = 0x2, 181 }; 182 183 /* Same enum for h264/h265 */ 184 enum pipe_h2645_enc_picture_type 185 { 186 PIPE_H2645_ENC_PICTURE_TYPE_P = 0x00, 187 PIPE_H2645_ENC_PICTURE_TYPE_B = 0x01, 188 PIPE_H2645_ENC_PICTURE_TYPE_I = 0x02, 189 PIPE_H2645_ENC_PICTURE_TYPE_IDR = 0x03, 190 PIPE_H2645_ENC_PICTURE_TYPE_SKIP = 0x04 191 }; 192 193 enum pipe_av1_enc_frame_type 194 { 195 PIPE_AV1_ENC_FRAME_TYPE_KEY = 0x00, 196 PIPE_AV1_ENC_FRAME_TYPE_INTER = 0x01, 197 PIPE_AV1_ENC_FRAME_TYPE_INTRA_ONLY = 0x02, 198 PIPE_AV1_ENC_FRAME_TYPE_SWITCH = 0x03, 199 PIPE_AV1_ENC_FRAME_TYPE_SHOW_EXISTING = 0x04 200 }; 201 202 enum pipe_h2645_enc_rate_control_method 203 { 204 PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00, 205 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01, 206 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02, 207 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03, 208 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04, 209 PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE = 0x05 210 }; 211 212 enum pipe_slice_buffer_placement_type 213 { 214 /* whole slice is in the buffer */ 215 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_WHOLE = 0x0, 216 /* The beginning of the slice is in the buffer but the end is not */ 217 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_BEGIN = 0x1, 218 /* Neither beginning nor end of the slice is in the buffer */ 219 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_MIDDLE = 0x2, 220 /* end of the slice is in the buffer */ 221 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_END = 0x3, 222 }; 223 224 struct pipe_picture_desc 225 { 226 enum pipe_video_profile profile; 227 enum pipe_video_entrypoint entry_point; 228 bool protected_playback; 229 uint8_t *decrypt_key; 230 uint32_t key_size; 231 enum pipe_format input_format; 232 bool input_full_range; 233 enum pipe_format output_format; 234 /* Flush flags for pipe_video_codec::end_frame */ 235 unsigned flush_flags; 236 /* A fence for pipe_video_codec::end_frame to signal job completion */ 237 struct pipe_fence_handle **fence; 238 }; 239 240 struct pipe_quant_matrix 241 { 242 enum pipe_video_format codec; 243 }; 244 245 struct pipe_macroblock 246 { 247 enum pipe_video_format codec; 248 }; 249 250 struct pipe_mpeg12_picture_desc 251 { 252 struct pipe_picture_desc base; 253 254 unsigned picture_coding_type; 255 unsigned picture_structure; 256 unsigned frame_pred_frame_dct; 257 unsigned q_scale_type; 258 unsigned alternate_scan; 259 unsigned intra_vlc_format; 260 unsigned concealment_motion_vectors; 261 unsigned intra_dc_precision; 262 unsigned f_code[2][2]; 263 unsigned top_field_first; 264 unsigned full_pel_forward_vector; 265 unsigned full_pel_backward_vector; 266 unsigned num_slices; 267 268 const uint8_t *intra_matrix; 269 const uint8_t *non_intra_matrix; 270 271 struct pipe_video_buffer *ref[2]; 272 }; 273 274 struct pipe_mpeg12_macroblock 275 { 276 struct pipe_macroblock base; 277 278 /* see section 6.3.17 in the spec */ 279 unsigned short x, y; 280 281 /* see section 6.3.17.1 in the spec */ 282 unsigned char macroblock_type; 283 284 union { 285 struct { 286 /* see table 6-17 in the spec */ 287 unsigned int frame_motion_type:2; 288 289 /* see table 6-18 in the spec */ 290 unsigned int field_motion_type:2; 291 292 /* see table 6-19 in the spec */ 293 unsigned int dct_type:1; 294 } bits; 295 unsigned int value; 296 } macroblock_modes; 297 298 /* see section 6.3.17.2 in the spec */ 299 unsigned char motion_vertical_field_select; 300 301 /* see Table 7-7 in the spec */ 302 short PMV[2][2][2]; 303 304 /* see figure 6.10-12 in the spec */ 305 unsigned short coded_block_pattern; 306 307 /* see figure 6.10-12 in the spec */ 308 short *blocks; 309 310 /* Number of skipped macroblocks after this macroblock */ 311 unsigned short num_skipped_macroblocks; 312 }; 313 314 struct pipe_mpeg4_picture_desc 315 { 316 struct pipe_picture_desc base; 317 318 int32_t trd[2]; 319 int32_t trb[2]; 320 uint16_t vop_time_increment_resolution; 321 uint8_t vop_coding_type; 322 uint8_t vop_fcode_forward; 323 uint8_t vop_fcode_backward; 324 uint8_t resync_marker_disable; 325 uint8_t interlaced; 326 uint8_t quant_type; 327 uint8_t quarter_sample; 328 uint8_t short_video_header; 329 uint8_t rounding_control; 330 uint8_t alternate_vertical_scan_flag; 331 uint8_t top_field_first; 332 333 const uint8_t *intra_matrix; 334 const uint8_t *non_intra_matrix; 335 336 struct pipe_video_buffer *ref[2]; 337 }; 338 339 struct pipe_vc1_picture_desc 340 { 341 struct pipe_picture_desc base; 342 343 uint32_t slice_count; 344 uint8_t picture_type; 345 uint8_t frame_coding_mode; 346 uint8_t postprocflag; 347 uint8_t pulldown; 348 uint8_t interlace; 349 uint8_t tfcntrflag; 350 uint8_t finterpflag; 351 uint8_t psf; 352 uint8_t dquant; 353 uint8_t panscan_flag; 354 uint8_t refdist_flag; 355 uint8_t quantizer; 356 uint8_t extended_mv; 357 uint8_t extended_dmv; 358 uint8_t overlap; 359 uint8_t vstransform; 360 uint8_t loopfilter; 361 uint8_t fastuvmc; 362 uint8_t range_mapy_flag; 363 uint8_t range_mapy; 364 uint8_t range_mapuv_flag; 365 uint8_t range_mapuv; 366 uint8_t multires; 367 uint8_t syncmarker; 368 uint8_t rangered; 369 uint8_t maxbframes; 370 uint8_t deblockEnable; 371 uint8_t pquant; 372 373 struct pipe_video_buffer *ref[2]; 374 }; 375 376 struct pipe_h264_sps 377 { 378 uint8_t level_idc; 379 uint8_t chroma_format_idc; 380 uint8_t separate_colour_plane_flag; 381 uint8_t bit_depth_luma_minus8; 382 uint8_t bit_depth_chroma_minus8; 383 uint8_t seq_scaling_matrix_present_flag; 384 uint8_t ScalingList4x4[6][16]; 385 uint8_t ScalingList8x8[6][64]; 386 uint8_t log2_max_frame_num_minus4; 387 uint8_t pic_order_cnt_type; 388 uint8_t log2_max_pic_order_cnt_lsb_minus4; 389 uint8_t delta_pic_order_always_zero_flag; 390 int32_t offset_for_non_ref_pic; 391 int32_t offset_for_top_to_bottom_field; 392 uint8_t num_ref_frames_in_pic_order_cnt_cycle; 393 int32_t offset_for_ref_frame[256]; 394 uint8_t max_num_ref_frames; 395 uint8_t frame_mbs_only_flag; 396 uint8_t mb_adaptive_frame_field_flag; 397 uint8_t direct_8x8_inference_flag; 398 uint8_t MinLumaBiPredSize8x8; 399 }; 400 401 struct pipe_h264_pps 402 { 403 struct pipe_h264_sps *sps; 404 405 uint8_t entropy_coding_mode_flag; 406 uint8_t bottom_field_pic_order_in_frame_present_flag; 407 uint8_t num_slice_groups_minus1; 408 uint8_t slice_group_map_type; 409 uint8_t slice_group_change_rate_minus1; 410 uint8_t num_ref_idx_l0_default_active_minus1; 411 uint8_t num_ref_idx_l1_default_active_minus1; 412 uint8_t weighted_pred_flag; 413 uint8_t weighted_bipred_idc; 414 int8_t pic_init_qp_minus26; 415 int8_t pic_init_qs_minus26; 416 int8_t chroma_qp_index_offset; 417 uint8_t deblocking_filter_control_present_flag; 418 uint8_t constrained_intra_pred_flag; 419 uint8_t redundant_pic_cnt_present_flag; 420 uint8_t ScalingList4x4[6][16]; 421 uint8_t ScalingList8x8[6][64]; 422 uint8_t transform_8x8_mode_flag; 423 int8_t second_chroma_qp_index_offset; 424 }; 425 426 struct pipe_h264_picture_desc 427 { 428 struct pipe_picture_desc base; 429 430 struct pipe_h264_pps *pps; 431 432 /* slice header */ 433 uint32_t frame_num; 434 uint8_t field_pic_flag; 435 uint8_t bottom_field_flag; 436 uint8_t num_ref_idx_l0_active_minus1; 437 uint8_t num_ref_idx_l1_active_minus1; 438 439 uint32_t slice_count; 440 int32_t field_order_cnt[2]; 441 bool is_reference; 442 uint8_t num_ref_frames; 443 444 bool is_long_term[16]; 445 bool top_is_reference[16]; 446 bool bottom_is_reference[16]; 447 uint32_t field_order_cnt_list[16][2]; 448 uint32_t frame_num_list[16]; 449 450 struct pipe_video_buffer *ref[16]; 451 452 struct 453 { 454 bool slice_info_present; 455 uint8_t slice_type[128]; 456 uint32_t slice_data_size[128]; 457 uint32_t slice_data_offset[128]; 458 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 459 } slice_parameter; 460 }; 461 462 struct pipe_enc_quality_modes 463 { 464 unsigned int level; 465 unsigned int preset_mode; 466 unsigned int pre_encode_mode; 467 unsigned int vbaq_mode; 468 }; 469 470 /* 471 * intra refresh supports row or column only, it doens't support 472 * row and column mixed, if mixed it will pick up column mode. 473 * Also the assumption is the first row/column since the offset 474 * is zero, and it marks the start of intra-refresh, it will need 475 * to have headers at this point. 476 */ 477 struct pipe_enc_intra_refresh 478 { 479 unsigned int mode; 480 unsigned int region_size; 481 unsigned int offset; 482 unsigned int need_sequence_header; 483 }; 484 485 /* 486 * In AVC, unit is MB, HEVC (CTB) and AV1(SB) 487 */ 488 enum 489 { 490 INTRA_REFRESH_MODE_NONE, 491 INTRA_REFRESH_MODE_UNIT_ROWS, 492 INTRA_REFRESH_MODE_UNIT_COLUMNS, 493 }; 494 495 /* All the values are in pixels, driver converts it into 496 * different units for different codecs, for example: h264 497 * is in 16x16 block, hevc/av1 is in 64x64 block. 498 * x, y means the location of region start, width/height defines 499 * the region size; the qp value carries the qp_delta. 500 */ 501 struct pipe_enc_region_in_roi 502 { 503 bool valid; 504 int32_t qp_value; 505 unsigned int x, y; 506 unsigned int width, height; 507 }; 508 /* It does not support prioirty only qp_delta. 509 * The priority is implied by the region sequence number. 510 * Region 0 is most significant one, and region 1 is less 511 * significant, and lesser significant when region number 512 * grows. It allows region overlapping, and lower 513 * priority region would be overwritten by the higher one. 514 */ 515 struct pipe_enc_roi 516 { 517 unsigned int num; 518 struct pipe_enc_region_in_roi region[PIPE_ENC_ROI_REGION_NUM_MAX]; 519 }; 520 521 struct pipe_enc_raw_header 522 { 523 uint8_t type; /* nal_unit_type or obu_type */ 524 bool is_slice; /* slice or frame header */ 525 uint32_t size; 526 uint8_t *buffer; 527 }; 528 529 struct pipe_h264_enc_rate_control 530 { 531 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 532 unsigned target_bitrate; 533 unsigned peak_bitrate; 534 unsigned frame_rate_num; 535 unsigned frame_rate_den; 536 unsigned vbv_buffer_size; 537 unsigned vbv_buf_lv; 538 unsigned vbv_buf_initial_size; 539 bool app_requested_hrd_buffer; 540 unsigned fill_data_enable; 541 unsigned skip_frame_enable; 542 unsigned enforce_hrd; 543 unsigned max_au_size; 544 unsigned max_qp; 545 unsigned min_qp; 546 bool app_requested_qp_range; 547 548 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 549 unsigned vbr_quality_factor; 550 }; 551 552 struct pipe_h264_enc_motion_estimation 553 { 554 unsigned motion_est_quarter_pixel; 555 unsigned enc_disable_sub_mode; 556 unsigned lsmvert; 557 unsigned enc_en_ime_overw_dis_subm; 558 unsigned enc_ime_overw_dis_subm_no; 559 unsigned enc_ime2_search_range_x; 560 unsigned enc_ime2_search_range_y; 561 }; 562 563 struct pipe_h264_enc_pic_control 564 { 565 unsigned enc_cabac_enable; 566 unsigned enc_cabac_init_idc; 567 struct { 568 uint32_t entropy_coding_mode_flag : 1; 569 uint32_t weighted_pred_flag : 1; 570 uint32_t deblocking_filter_control_present_flag : 1; 571 uint32_t constrained_intra_pred_flag : 1; 572 uint32_t redundant_pic_cnt_present_flag : 1; 573 uint32_t transform_8x8_mode_flag : 1; 574 }; 575 uint8_t nal_ref_idc; 576 uint8_t nal_unit_type; 577 uint8_t num_ref_idx_l0_default_active_minus1; 578 uint8_t num_ref_idx_l1_default_active_minus1; 579 uint8_t weighted_bipred_idc; 580 int8_t pic_init_qp_minus26; 581 int8_t pic_init_qs_minus26; 582 int8_t chroma_qp_index_offset; 583 int8_t second_chroma_qp_index_offset; 584 uint8_t temporal_id; 585 }; 586 587 struct pipe_h264_enc_dbk_param 588 { 589 unsigned disable_deblocking_filter_idc; 590 signed alpha_c0_offset_div2; 591 signed beta_offset_div2; 592 }; 593 594 struct h264_slice_descriptor 595 { 596 /** Starting MB address for this slice. */ 597 uint32_t macroblock_address; 598 /** Number of macroblocks in this slice. */ 599 uint32_t num_macroblocks; 600 /** slice type. */ 601 enum pipe_h264_slice_type slice_type; 602 }; 603 604 struct h265_slice_descriptor 605 { 606 /** Starting CTU address for this slice. */ 607 uint32_t slice_segment_address; 608 /** Number of CTUs in this slice. */ 609 uint32_t num_ctu_in_slice; 610 /** slice type. */ 611 enum pipe_h265_slice_type slice_type; 612 }; 613 614 struct pipe_enc_hdr_cll { 615 uint16_t max_cll; 616 uint16_t max_fall; 617 }; 618 619 struct pipe_enc_hdr_mdcv { 620 uint16_t primary_chromaticity_x[3]; 621 uint16_t primary_chromaticity_y[3]; 622 uint16_t white_point_chromaticity_x; 623 uint16_t white_point_chromaticity_y; 624 uint32_t luminance_max; 625 uint32_t luminance_min; 626 }; 627 628 typedef struct pipe_h264_enc_hrd_params 629 { 630 uint32_t cpb_cnt_minus1; 631 uint32_t bit_rate_scale; 632 uint32_t cpb_size_scale; 633 uint32_t bit_rate_value_minus1[32]; 634 uint32_t cpb_size_value_minus1[32]; 635 uint32_t cbr_flag[32]; 636 uint32_t initial_cpb_removal_delay_length_minus1; 637 uint32_t cpb_removal_delay_length_minus1; 638 uint32_t dpb_output_delay_length_minus1; 639 uint32_t time_offset_length; 640 } pipe_h264_enc_hrd_params; 641 642 struct pipe_h264_enc_seq_param 643 { 644 struct { 645 uint32_t enc_frame_cropping_flag : 1; 646 uint32_t vui_parameters_present_flag : 1; 647 uint32_t video_full_range_flag : 1; 648 uint32_t direct_8x8_inference_flag : 1; 649 uint32_t gaps_in_frame_num_value_allowed_flag : 1; 650 }; 651 unsigned profile_idc; 652 unsigned enc_constraint_set_flags; 653 unsigned level_idc; 654 unsigned bit_depth_luma_minus8; 655 unsigned bit_depth_chroma_minus8; 656 unsigned enc_frame_crop_left_offset; 657 unsigned enc_frame_crop_right_offset; 658 unsigned enc_frame_crop_top_offset; 659 unsigned enc_frame_crop_bottom_offset; 660 unsigned pic_order_cnt_type; 661 unsigned log2_max_frame_num_minus4; 662 unsigned log2_max_pic_order_cnt_lsb_minus4; 663 unsigned num_temporal_layers; 664 struct { 665 uint32_t aspect_ratio_info_present_flag: 1; 666 uint32_t timing_info_present_flag: 1; 667 uint32_t video_signal_type_present_flag: 1; 668 uint32_t colour_description_present_flag: 1; 669 uint32_t chroma_loc_info_present_flag: 1; 670 uint32_t overscan_info_present_flag: 1; 671 uint32_t overscan_appropriate_flag: 1; 672 uint32_t fixed_frame_rate_flag: 1; 673 uint32_t nal_hrd_parameters_present_flag: 1; 674 uint32_t vcl_hrd_parameters_present_flag: 1; 675 uint32_t low_delay_hrd_flag: 1; 676 uint32_t pic_struct_present_flag: 1; 677 uint32_t bitstream_restriction_flag: 1; 678 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 679 } vui_flags; 680 uint32_t aspect_ratio_idc; 681 uint32_t sar_width; 682 uint32_t sar_height; 683 uint32_t num_units_in_tick; 684 uint32_t time_scale; 685 uint32_t video_format; 686 uint32_t colour_primaries; 687 uint32_t transfer_characteristics; 688 uint32_t matrix_coefficients; 689 uint32_t chroma_sample_loc_type_top_field; 690 uint32_t chroma_sample_loc_type_bottom_field; 691 uint32_t max_num_reorder_frames; 692 pipe_h264_enc_hrd_params nal_hrd_parameters; 693 pipe_h264_enc_hrd_params vcl_hrd_parameters; 694 uint32_t max_bytes_per_pic_denom; 695 uint32_t max_bits_per_mb_denom; 696 uint32_t log2_max_mv_length_vertical; 697 uint32_t log2_max_mv_length_horizontal; 698 uint32_t max_dec_frame_buffering; 699 uint32_t max_num_ref_frames; 700 uint32_t pic_width_in_mbs_minus1; 701 uint32_t pic_height_in_map_units_minus1; 702 }; 703 704 struct pipe_h264_ref_list_mod_entry 705 { 706 uint8_t modification_of_pic_nums_idc; 707 uint32_t abs_diff_pic_num_minus1; 708 uint32_t long_term_pic_num; 709 }; 710 711 struct pipe_h264_ref_pic_marking_entry 712 { 713 uint8_t memory_management_control_operation; 714 uint32_t difference_of_pic_nums_minus1; 715 uint32_t long_term_pic_num; 716 uint32_t long_term_frame_idx; 717 uint32_t max_long_term_frame_idx_plus1; 718 }; 719 720 struct pipe_h264_enc_slice_param 721 { 722 struct { 723 uint32_t direct_spatial_mv_pred_flag : 1; 724 uint32_t num_ref_idx_active_override_flag : 1; 725 uint32_t ref_pic_list_modification_flag_l0 : 1; 726 uint32_t ref_pic_list_modification_flag_l1 : 1; 727 uint32_t no_output_of_prior_pics_flag : 1; 728 uint32_t long_term_reference_flag : 1; 729 uint32_t adaptive_ref_pic_marking_mode_flag : 1; 730 }; 731 uint8_t slice_type; 732 uint8_t colour_plane_id; 733 uint32_t frame_num; 734 uint32_t idr_pic_id; 735 uint32_t pic_order_cnt_lsb; 736 uint8_t redundant_pic_cnt; 737 uint8_t num_ref_idx_l0_active_minus1; 738 uint8_t num_ref_idx_l1_active_minus1; 739 uint8_t num_ref_list0_mod_operations; 740 struct pipe_h264_ref_list_mod_entry ref_list0_mod_operations[PIPE_H264_MAX_NUM_LIST_REF]; 741 uint8_t num_ref_list1_mod_operations; 742 struct pipe_h264_ref_list_mod_entry ref_list1_mod_operations[PIPE_H264_MAX_NUM_LIST_REF]; 743 uint8_t num_ref_pic_marking_operations; 744 struct pipe_h264_ref_pic_marking_entry ref_pic_marking_operations[PIPE_H264_MAX_NUM_LIST_REF]; 745 uint8_t cabac_init_idc; 746 int32_t slice_qp_delta; 747 uint8_t disable_deblocking_filter_idc; 748 int32_t slice_alpha_c0_offset_div2; 749 int32_t slice_beta_offset_div2; 750 }; 751 752 struct pipe_h264_enc_dpb_entry 753 { 754 uint32_t id; 755 uint32_t frame_idx; 756 uint32_t pic_order_cnt; 757 bool is_ltr; 758 struct pipe_video_buffer *buffer; 759 }; 760 761 struct pipe_h264_enc_picture_desc 762 { 763 struct pipe_picture_desc base; 764 765 struct pipe_h264_enc_seq_param seq; 766 struct pipe_h264_enc_slice_param slice; 767 struct pipe_h264_enc_pic_control pic_ctrl; 768 struct pipe_h264_enc_rate_control rate_ctrl[4]; 769 770 struct pipe_h264_enc_motion_estimation motion_est; 771 struct pipe_h264_enc_dbk_param dbk; 772 773 unsigned intra_idr_period; 774 unsigned ip_period; 775 776 unsigned init_qp; 777 unsigned quant_i_frames; 778 unsigned quant_p_frames; 779 unsigned quant_b_frames; 780 781 enum pipe_h2645_enc_picture_type picture_type; 782 unsigned frame_num; 783 unsigned frame_num_cnt; 784 unsigned p_remain; 785 unsigned i_remain; 786 unsigned idr_pic_id; 787 unsigned gop_cnt; 788 unsigned pic_order_cnt; 789 unsigned num_ref_idx_l0_active_minus1; 790 unsigned num_ref_idx_l1_active_minus1; 791 unsigned ref_idx_l0_list[PIPE_H264_MAX_NUM_LIST_REF]; 792 bool l0_is_long_term[PIPE_H264_MAX_NUM_LIST_REF]; 793 unsigned ref_idx_l1_list[PIPE_H264_MAX_NUM_LIST_REF]; 794 bool l1_is_long_term[PIPE_H264_MAX_NUM_LIST_REF]; 795 unsigned gop_size; 796 struct pipe_enc_quality_modes quality_modes; 797 struct pipe_enc_intra_refresh intra_refresh; 798 struct pipe_enc_roi roi; 799 800 bool not_referenced; 801 bool is_ltr; 802 unsigned ltr_index; 803 bool enable_vui; 804 struct hash_table *frame_idx; 805 806 enum pipe_video_slice_mode slice_mode; 807 808 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 809 unsigned num_slice_descriptors; 810 struct h264_slice_descriptor slices_descriptors[128]; 811 812 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 813 unsigned max_slice_bytes; 814 815 enum pipe_video_feedback_metadata_type requested_metadata; 816 817 struct pipe_h264_enc_dpb_entry dpb[PIPE_H264_MAX_DPB_SIZE]; 818 uint8_t dpb_size; 819 uint8_t dpb_curr_pic; /* index in dpb */ 820 uint8_t ref_list0[PIPE_H264_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 821 uint8_t ref_list1[PIPE_H264_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 822 823 struct util_dynarray raw_headers; /* struct pipe_enc_raw_header */ 824 }; 825 826 struct pipe_h265_st_ref_pic_set 827 { 828 struct { 829 uint32_t inter_ref_pic_set_prediction_flag : 1; 830 }; 831 uint32_t delta_idx_minus1; 832 uint8_t delta_rps_sign; 833 uint16_t abs_delta_rps_minus1; 834 uint8_t used_by_curr_pic_flag[PIPE_H265_MAX_DPB_SIZE]; 835 uint8_t use_delta_flag[PIPE_H265_MAX_DPB_SIZE]; 836 uint8_t num_negative_pics; 837 uint8_t num_positive_pics; 838 uint16_t delta_poc_s0_minus1[PIPE_H265_MAX_DPB_SIZE]; 839 uint8_t used_by_curr_pic_s0_flag[PIPE_H265_MAX_DPB_SIZE]; 840 uint16_t delta_poc_s1_minus1[PIPE_H265_MAX_DPB_SIZE]; 841 uint8_t used_by_curr_pic_s1_flag[PIPE_H265_MAX_DPB_SIZE]; 842 }; 843 844 struct pipe_h265_ref_pic_lists_modification 845 { 846 struct { 847 uint32_t ref_pic_list_modification_flag_l0 : 1; 848 uint32_t ref_pic_list_modification_flag_l1 : 1; 849 }; 850 uint8_t list_entry_l0[PIPE_H265_MAX_NUM_LIST_REF]; 851 uint8_t list_entry_l1[PIPE_H265_MAX_NUM_LIST_REF]; 852 }; 853 854 struct pipe_h265_enc_sublayer_hrd_params 855 { 856 uint32_t bit_rate_value_minus1[32]; 857 uint32_t cpb_size_value_minus1[32]; 858 uint32_t cpb_size_du_value_minus1[32]; 859 uint32_t bit_rate_du_value_minus1[32]; 860 uint32_t cbr_flag[32]; 861 }; 862 863 struct pipe_h265_enc_hrd_params 864 { 865 uint32_t nal_hrd_parameters_present_flag; 866 uint32_t vcl_hrd_parameters_present_flag; 867 uint32_t sub_pic_hrd_params_present_flag; 868 uint32_t tick_divisor_minus2; 869 uint32_t du_cpb_removal_delay_increment_length_minus1; 870 uint32_t sub_pic_cpb_params_in_pic_timing_sei_flag; 871 uint32_t dpb_output_delay_du_length_minus1; 872 uint32_t bit_rate_scale; 873 uint32_t cpb_rate_scale; 874 uint32_t cpb_size_du_scale; 875 uint32_t initial_cpb_removal_delay_length_minus1; 876 uint32_t au_cpb_removal_delay_length_minus1; 877 uint32_t dpb_output_delay_length_minus1; 878 uint32_t fixed_pic_rate_general_flag[PIPE_H265_MAX_SUB_LAYERS]; 879 uint32_t fixed_pic_rate_within_cvs_flag[PIPE_H265_MAX_SUB_LAYERS]; 880 uint32_t elemental_duration_in_tc_minus1[PIPE_H265_MAX_SUB_LAYERS]; 881 uint32_t low_delay_hrd_flag[PIPE_H265_MAX_SUB_LAYERS]; 882 uint32_t cpb_cnt_minus1[PIPE_H265_MAX_SUB_LAYERS]; 883 struct pipe_h265_enc_sublayer_hrd_params nal_hrd_parameters[PIPE_H265_MAX_SUB_LAYERS]; 884 struct pipe_h265_enc_sublayer_hrd_params vlc_hrd_parameters[PIPE_H265_MAX_SUB_LAYERS]; 885 }; 886 887 struct pipe_h265_profile_tier 888 { 889 struct { 890 uint32_t general_tier_flag : 1; 891 uint32_t general_progressive_source_flag : 1; 892 uint32_t general_interlaced_source_flag : 1; 893 uint32_t general_non_packed_constraint_flag : 1; 894 uint32_t general_frame_only_constraint_flag : 1; 895 }; 896 uint8_t general_profile_space; 897 uint8_t general_profile_idc; 898 uint32_t general_profile_compatibility_flag; 899 }; 900 901 struct pipe_h265_profile_tier_level 902 { 903 uint8_t general_level_idc; 904 uint8_t sub_layer_profile_present_flag[PIPE_H265_MAX_SUB_LAYERS]; 905 uint8_t sub_layer_level_present_flag[PIPE_H265_MAX_SUB_LAYERS]; 906 uint8_t sub_layer_level_idc[PIPE_H265_MAX_SUB_LAYERS]; 907 struct pipe_h265_profile_tier profile_tier; 908 struct pipe_h265_profile_tier sub_layer_profile_tier[PIPE_H265_MAX_SUB_LAYERS]; 909 }; 910 911 struct pipe_h265_enc_vid_param 912 { 913 struct { 914 uint32_t vps_base_layer_internal_flag : 1; 915 uint32_t vps_base_layer_available_flag : 1; 916 uint32_t vps_temporal_id_nesting_flag : 1; 917 uint32_t vps_sub_layer_ordering_info_present_flag : 1; 918 uint32_t vps_timing_info_present_flag : 1; 919 uint32_t vps_poc_proportional_to_timing_flag : 1; 920 }; 921 uint8_t vps_max_layers_minus1; 922 uint8_t vps_max_sub_layers_minus1; 923 uint8_t vps_max_dec_pic_buffering_minus1[PIPE_H265_MAX_SUB_LAYERS]; 924 uint8_t vps_max_num_reorder_pics[PIPE_H265_MAX_SUB_LAYERS]; 925 uint32_t vps_max_latency_increase_plus1[PIPE_H265_MAX_SUB_LAYERS]; 926 uint8_t vps_max_layer_id; 927 uint32_t vps_num_layer_sets_minus1; 928 uint32_t vps_num_units_in_tick; 929 uint32_t vps_time_scale; 930 uint32_t vps_num_ticks_poc_diff_one_minus1; 931 struct pipe_h265_profile_tier_level profile_tier_level; 932 }; 933 934 struct pipe_h265_enc_seq_param 935 { 936 struct { 937 uint32_t sps_temporal_id_nesting_flag : 1; 938 uint32_t strong_intra_smoothing_enabled_flag : 1; 939 uint32_t amp_enabled_flag : 1; 940 uint32_t sample_adaptive_offset_enabled_flag : 1; 941 uint32_t pcm_enabled_flag : 1; 942 uint32_t sps_temporal_mvp_enabled_flag : 1; 943 uint32_t conformance_window_flag : 1; 944 uint32_t vui_parameters_present_flag : 1; 945 uint32_t video_full_range_flag : 1; 946 uint32_t long_term_ref_pics_present_flag : 1; 947 uint32_t sps_sub_layer_ordering_info_present_flag : 1; 948 }; 949 uint8_t general_profile_idc; 950 uint8_t general_level_idc; 951 uint8_t general_tier_flag; 952 uint32_t intra_period; 953 uint32_t ip_period; 954 uint16_t pic_width_in_luma_samples; 955 uint16_t pic_height_in_luma_samples; 956 uint32_t chroma_format_idc; 957 uint32_t bit_depth_luma_minus8; 958 uint32_t bit_depth_chroma_minus8; 959 uint8_t log2_max_pic_order_cnt_lsb_minus4; 960 uint8_t log2_min_luma_coding_block_size_minus3; 961 uint8_t log2_diff_max_min_luma_coding_block_size; 962 uint8_t log2_min_transform_block_size_minus2; 963 uint8_t log2_diff_max_min_transform_block_size; 964 uint8_t max_transform_hierarchy_depth_inter; 965 uint8_t max_transform_hierarchy_depth_intra; 966 uint16_t conf_win_left_offset; 967 uint16_t conf_win_right_offset; 968 uint16_t conf_win_top_offset; 969 uint16_t conf_win_bottom_offset; 970 struct { 971 uint32_t aspect_ratio_info_present_flag: 1; 972 uint32_t timing_info_present_flag: 1; 973 uint32_t video_signal_type_present_flag: 1; 974 uint32_t colour_description_present_flag: 1; 975 uint32_t chroma_loc_info_present_flag: 1; 976 uint32_t overscan_info_present_flag: 1; 977 uint32_t overscan_appropriate_flag: 1; 978 uint32_t neutral_chroma_indication_flag: 1; 979 uint32_t field_seq_flag: 1; 980 uint32_t frame_field_info_present_flag: 1; 981 uint32_t default_display_window_flag: 1; 982 uint32_t poc_proportional_to_timing_flag: 1; 983 uint32_t hrd_parameters_present_flag: 1; 984 uint32_t bitstream_restriction_flag: 1; 985 uint32_t tiles_fixed_structure_flag: 1; 986 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 987 uint32_t restricted_ref_pic_lists_flag: 1; 988 } vui_flags; 989 uint32_t aspect_ratio_idc; 990 uint32_t sar_width; 991 uint32_t sar_height; 992 uint32_t num_units_in_tick; 993 uint32_t time_scale; 994 uint32_t video_format; 995 uint32_t colour_primaries; 996 uint32_t transfer_characteristics; 997 uint32_t matrix_coefficients; 998 uint32_t chroma_sample_loc_type_top_field; 999 uint32_t chroma_sample_loc_type_bottom_field; 1000 uint32_t def_disp_win_left_offset; 1001 uint32_t def_disp_win_right_offset; 1002 uint32_t def_disp_win_top_offset; 1003 uint32_t def_disp_win_bottom_offset; 1004 uint32_t num_ticks_poc_diff_one_minus1; 1005 uint32_t min_spatial_segmentation_idc; 1006 uint32_t max_bytes_per_pic_denom; 1007 uint32_t max_bits_per_min_cu_denom; 1008 uint32_t log2_max_mv_length_horizontal; 1009 uint32_t log2_max_mv_length_vertical; 1010 uint32_t num_temporal_layers; 1011 uint32_t num_short_term_ref_pic_sets; 1012 uint32_t num_long_term_ref_pics_sps; 1013 uint32_t lt_ref_pic_poc_lsb_sps[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1014 uint8_t used_by_curr_pic_lt_sps_flag[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1015 uint8_t sps_max_sub_layers_minus1; 1016 uint8_t sps_max_dec_pic_buffering_minus1[PIPE_H265_MAX_SUB_LAYERS]; 1017 uint8_t sps_max_num_reorder_pics[PIPE_H265_MAX_SUB_LAYERS]; 1018 uint32_t sps_max_latency_increase_plus1[PIPE_H265_MAX_SUB_LAYERS]; 1019 struct pipe_h265_profile_tier_level profile_tier_level; 1020 struct pipe_h265_enc_hrd_params hrd_parameters; 1021 struct pipe_h265_st_ref_pic_set st_ref_pic_set[PIPE_H265_MAX_ST_REF_PIC_SETS]; 1022 struct { 1023 uint32_t sps_range_extension_flag; 1024 uint32_t transform_skip_rotation_enabled_flag: 1; 1025 uint32_t transform_skip_context_enabled_flag: 1; 1026 uint32_t implicit_rdpcm_enabled_flag: 1; 1027 uint32_t explicit_rdpcm_enabled_flag: 1; 1028 uint32_t extended_precision_processing_flag: 1; 1029 uint32_t intra_smoothing_disabled_flag: 1; 1030 uint32_t high_precision_offsets_enabled_flag: 1; 1031 uint32_t persistent_rice_adaptation_enabled_flag: 1; 1032 uint32_t cabac_bypass_alignment_enabled_flag: 1; 1033 } sps_range_extension; 1034 uint8_t separate_colour_plane_flag; 1035 }; 1036 1037 struct pipe_h265_enc_pic_param 1038 { 1039 struct { 1040 uint32_t dependent_slice_segments_enabled_flag : 1; 1041 uint32_t output_flag_present_flag : 1; 1042 uint32_t sign_data_hiding_enabled_flag : 1; 1043 uint32_t cabac_init_present_flag : 1; 1044 uint32_t constrained_intra_pred_flag : 1; 1045 uint32_t transform_skip_enabled_flag : 1; 1046 uint32_t cu_qp_delta_enabled_flag : 1; 1047 uint32_t weighted_pred_flag : 1; 1048 uint32_t weighted_bipred_flag : 1; 1049 uint32_t transquant_bypass_enabled_flag : 1; 1050 uint32_t entropy_coding_sync_enabled_flag : 1; 1051 uint32_t pps_slice_chroma_qp_offsets_present_flag : 1; 1052 uint32_t pps_loop_filter_across_slices_enabled_flag : 1; 1053 uint32_t deblocking_filter_control_present_flag : 1; 1054 uint32_t deblocking_filter_override_enabled_flag : 1; 1055 uint32_t pps_deblocking_filter_disabled_flag : 1; 1056 uint32_t lists_modification_present_flag : 1; 1057 }; 1058 uint8_t log2_parallel_merge_level_minus2; 1059 uint8_t nal_unit_type; 1060 uint8_t temporal_id; 1061 uint8_t num_extra_slice_header_bits; 1062 uint8_t num_ref_idx_l0_default_active_minus1; 1063 uint8_t num_ref_idx_l1_default_active_minus1; 1064 int8_t init_qp_minus26; 1065 uint8_t diff_cu_qp_delta_depth; 1066 int8_t pps_cb_qp_offset; 1067 int8_t pps_cr_qp_offset; 1068 int8_t pps_beta_offset_div2; 1069 int8_t pps_tc_offset_div2; 1070 struct { 1071 uint8_t pps_range_extension_flag; 1072 uint32_t log2_max_transform_skip_block_size_minus2; 1073 uint32_t cross_component_prediction_enabled_flag: 1; 1074 uint32_t chroma_qp_offset_list_enabled_flag: 1; 1075 uint32_t diff_cu_chroma_qp_offset_depth; 1076 uint32_t chroma_qp_offset_list_len_minus1; 1077 int32_t cb_qp_offset_list[6]; 1078 int32_t cr_qp_offset_list[6]; 1079 uint32_t log2_sao_offset_scale_luma; 1080 uint32_t log2_sao_offset_scale_chroma; 1081 } pps_range_extension; 1082 }; 1083 1084 struct pipe_h265_enc_slice_param 1085 { 1086 struct { 1087 uint32_t no_output_of_prior_pics_flag : 1; 1088 uint32_t dependent_slice_segment_flag : 1; 1089 uint32_t pic_output_flag : 1; 1090 uint32_t short_term_ref_pic_set_sps_flag : 1; 1091 uint32_t slice_sao_luma_flag : 1; 1092 uint32_t slice_sao_chroma_flag : 1; 1093 uint32_t slice_temporal_mvp_enabled_flag : 1; 1094 uint32_t num_ref_idx_active_override_flag : 1; 1095 uint32_t mvd_l1_zero_flag : 1; 1096 uint32_t cabac_init_flag : 1; 1097 uint32_t collocated_from_l0_flag : 1; 1098 uint32_t cu_chroma_qp_offset_enabled_flag : 1; 1099 uint32_t deblocking_filter_override_flag : 1; 1100 uint32_t slice_deblocking_filter_disabled_flag : 1; 1101 uint32_t slice_loop_filter_across_slices_enabled_flag : 1; 1102 }; 1103 uint8_t slice_type; 1104 uint32_t slice_pic_order_cnt_lsb; 1105 uint8_t colour_plane_id; 1106 uint8_t short_term_ref_pic_set_idx; 1107 uint8_t num_long_term_sps; 1108 uint8_t num_long_term_pics; 1109 uint8_t lt_idx_sps[PIPE_H265_MAX_LONG_TERM_REF_PICS_SPS]; 1110 uint8_t poc_lsb_lt[PIPE_H265_MAX_LONG_TERM_PICS]; 1111 uint8_t used_by_curr_pic_lt_flag[PIPE_H265_MAX_LONG_TERM_PICS]; 1112 uint8_t delta_poc_msb_present_flag[PIPE_H265_MAX_DELTA_POC]; 1113 uint8_t delta_poc_msb_cycle_lt[PIPE_H265_MAX_DELTA_POC]; 1114 uint8_t num_ref_idx_l0_active_minus1; 1115 uint8_t num_ref_idx_l1_active_minus1; 1116 uint8_t collocated_ref_idx; 1117 uint8_t max_num_merge_cand; 1118 int8_t slice_qp_delta; 1119 int8_t slice_cb_qp_offset; 1120 int8_t slice_cr_qp_offset; 1121 int8_t slice_beta_offset_div2; 1122 int8_t slice_tc_offset_div2; 1123 struct pipe_h265_st_ref_pic_set st_ref_pic_set; 1124 struct pipe_h265_ref_pic_lists_modification ref_pic_lists_modification; 1125 }; 1126 1127 struct pipe_h265_enc_rate_control 1128 { 1129 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 1130 unsigned target_bitrate; 1131 unsigned peak_bitrate; 1132 unsigned frame_rate_num; 1133 unsigned frame_rate_den; 1134 unsigned init_qp; 1135 unsigned quant_i_frames; 1136 unsigned quant_p_frames; 1137 unsigned quant_b_frames; 1138 unsigned vbv_buffer_size; 1139 unsigned vbv_buf_lv; 1140 unsigned vbv_buf_initial_size; 1141 bool app_requested_hrd_buffer; 1142 unsigned fill_data_enable; 1143 unsigned skip_frame_enable; 1144 unsigned enforce_hrd; 1145 unsigned max_au_size; 1146 unsigned max_qp; 1147 unsigned min_qp; 1148 bool app_requested_qp_range; 1149 1150 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 1151 unsigned vbr_quality_factor; 1152 }; 1153 1154 struct pipe_h265_enc_dpb_entry 1155 { 1156 uint32_t id; 1157 uint32_t pic_order_cnt; 1158 bool is_ltr; 1159 struct pipe_video_buffer *buffer; 1160 }; 1161 1162 struct pipe_h265_enc_picture_desc 1163 { 1164 struct pipe_picture_desc base; 1165 1166 struct pipe_h265_enc_vid_param vid; 1167 struct pipe_h265_enc_seq_param seq; 1168 struct pipe_h265_enc_pic_param pic; 1169 struct pipe_h265_enc_slice_param slice; 1170 struct pipe_h265_enc_rate_control rc[4]; 1171 1172 enum pipe_h2645_enc_picture_type picture_type; 1173 unsigned decoded_curr_pic; 1174 unsigned reference_frames[16]; 1175 unsigned frame_num; 1176 unsigned pic_order_cnt; 1177 unsigned pic_order_cnt_type; 1178 struct pipe_enc_quality_modes quality_modes; 1179 struct pipe_enc_intra_refresh intra_refresh; 1180 struct pipe_enc_roi roi; 1181 unsigned num_ref_idx_l0_active_minus1; 1182 unsigned num_ref_idx_l1_active_minus1; 1183 unsigned ref_idx_l0_list[PIPE_H265_MAX_NUM_LIST_REF]; 1184 unsigned ref_idx_l1_list[PIPE_H265_MAX_NUM_LIST_REF]; 1185 bool not_referenced; 1186 struct hash_table *frame_idx; 1187 1188 enum pipe_video_slice_mode slice_mode; 1189 1190 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 1191 unsigned num_slice_descriptors; 1192 struct h265_slice_descriptor slices_descriptors[128]; 1193 1194 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 1195 unsigned max_slice_bytes; 1196 enum pipe_video_feedback_metadata_type requested_metadata; 1197 1198 struct pipe_enc_hdr_cll metadata_hdr_cll; 1199 struct pipe_enc_hdr_mdcv metadata_hdr_mdcv; 1200 1201 struct pipe_h265_enc_dpb_entry dpb[PIPE_H265_MAX_DPB_SIZE]; 1202 uint8_t dpb_size; 1203 uint8_t dpb_curr_pic; /* index in dpb */ 1204 uint8_t ref_list0[PIPE_H265_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1205 uint8_t ref_list1[PIPE_H265_MAX_NUM_LIST_REF]; /* index in dpb, PIPE_H2645_LIST_REF_INVALID_ENTRY invalid */ 1206 1207 struct util_dynarray raw_headers; /* struct pipe_enc_raw_header */ 1208 }; 1209 1210 struct pipe_av1_enc_rate_control 1211 { 1212 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 1213 unsigned target_bitrate; 1214 unsigned peak_bitrate; 1215 unsigned frame_rate_num; 1216 unsigned frame_rate_den; 1217 unsigned vbv_buffer_size; 1218 unsigned vbv_buf_lv; 1219 unsigned vbv_buf_initial_size; 1220 bool app_requested_hrd_buffer; 1221 unsigned fill_data_enable; 1222 unsigned skip_frame_enable; 1223 unsigned enforce_hrd; 1224 unsigned max_au_size; 1225 unsigned qp; /* Initial QP */ 1226 unsigned qp_inter; 1227 unsigned max_qp; 1228 unsigned min_qp; 1229 bool app_requested_qp_range; 1230 bool app_requested_initial_qp; 1231 1232 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 1233 unsigned vbr_quality_factor; 1234 }; 1235 1236 struct pipe_av1_enc_decoder_model_info 1237 { 1238 uint32_t buffer_delay_length_minus1; 1239 uint32_t num_units_in_decoding_tick; 1240 uint32_t buffer_removal_time_length_minus1; 1241 uint32_t frame_presentation_time_length_minus1; 1242 }; 1243 1244 struct pipe_av1_enc_color_description 1245 { 1246 uint32_t color_primaries; 1247 uint32_t transfer_characteristics; 1248 uint32_t matrix_coefficients; 1249 uint32_t color_range; 1250 uint32_t chroma_sample_position; 1251 }; 1252 struct pipe_av1_enc_seq_param 1253 { 1254 uint32_t profile; 1255 uint32_t level; 1256 uint32_t tier; 1257 uint32_t num_temporal_layers; 1258 uint32_t intra_period; 1259 uint32_t ip_period; 1260 uint32_t bit_depth_minus8; 1261 uint32_t pic_width_in_luma_samples; 1262 uint32_t pic_height_in_luma_samples; 1263 struct 1264 { 1265 uint32_t use_128x128_superblock:1; 1266 uint32_t enable_filter_intra :1; 1267 uint32_t enable_intra_edge_filter :1; 1268 uint32_t enable_interintra_compound :1; 1269 uint32_t enable_masked_compound :1; 1270 uint32_t enable_warped_motion :1; 1271 uint32_t enable_dual_filter :1; 1272 uint32_t enable_cdef:1; 1273 uint32_t enable_restoration:1; 1274 uint32_t enable_superres:1; 1275 uint32_t enable_order_hint:1; 1276 uint32_t enable_jnt_comp:1; 1277 uint32_t color_description_present_flag:1; 1278 uint32_t enable_ref_frame_mvs:1; 1279 uint32_t frame_id_number_present_flag:1; 1280 uint32_t disable_screen_content_tools:1; 1281 uint32_t timing_info_present_flag:1; 1282 uint32_t equal_picture_interval:1; 1283 uint32_t decoder_model_info_present_flag:1; 1284 uint32_t force_screen_content_tools:2; 1285 uint32_t force_integer_mv:2; 1286 } seq_bits; 1287 1288 /* timing info params */ 1289 uint32_t num_units_in_display_tick; 1290 uint32_t time_scale; 1291 uint32_t num_tick_per_picture_minus1; 1292 uint32_t delta_frame_id_length; 1293 uint32_t additional_frame_id_length; 1294 uint32_t order_hint_bits; 1295 struct pipe_av1_enc_decoder_model_info decoder_model_info; 1296 struct pipe_av1_enc_color_description color_config; 1297 uint16_t frame_width_bits_minus1; 1298 uint16_t frame_height_bits_minus1; 1299 uint16_t operating_point_idc[32]; 1300 uint8_t decoder_model_present_for_this_op[32]; 1301 }; 1302 1303 struct pipe_av1_tile_group { 1304 uint8_t tile_group_start; 1305 uint8_t tile_group_end; 1306 }; 1307 1308 struct pipe_av1_enc_picture_desc 1309 { 1310 struct pipe_picture_desc base; 1311 enum pipe_av1_enc_frame_type frame_type; 1312 struct pipe_av1_enc_seq_param seq; 1313 struct pipe_av1_enc_rate_control rc[4]; 1314 struct { 1315 uint32_t enable_frame_obu:1; 1316 uint32_t error_resilient_mode:1; 1317 uint32_t disable_cdf_update:1; 1318 uint32_t frame_size_override_flag:1; 1319 uint32_t allow_screen_content_tools:1; 1320 uint32_t allow_intrabc:1; 1321 uint32_t force_integer_mv:1; 1322 uint32_t disable_frame_end_update_cdf:1; 1323 uint32_t palette_mode_enable:1; 1324 uint32_t allow_high_precision_mv:1; 1325 uint32_t use_ref_frame_mvs; 1326 uint32_t show_existing_frame:1; 1327 uint32_t enable_render_size:1; 1328 uint32_t use_superres:1; 1329 uint32_t reduced_tx_set:1; 1330 uint32_t skip_mode_present:1; 1331 uint32_t long_term_reference:1; 1332 uint32_t uniform_tile_spacing:1; 1333 }; 1334 struct pipe_enc_quality_modes quality_modes; 1335 struct pipe_enc_intra_refresh intra_refresh; 1336 struct pipe_enc_roi roi; 1337 uint32_t tile_rows; 1338 uint32_t tile_cols; 1339 unsigned num_tile_groups; 1340 struct pipe_av1_tile_group tile_groups[256]; 1341 uint32_t context_update_tile_id; 1342 uint16_t width_in_sbs_minus_1[63]; 1343 uint16_t height_in_sbs_minus_1[63]; 1344 uint32_t frame_num; 1345 uint32_t last_key_frame_num; 1346 uint32_t number_of_skips; 1347 uint32_t temporal_id; 1348 uint32_t spatial_id; 1349 uint16_t frame_width; 1350 uint16_t frame_height; 1351 uint16_t frame_width_sb; 1352 uint16_t frame_height_sb; 1353 uint16_t upscaled_width; 1354 uint16_t render_width; 1355 uint16_t render_height; 1356 uint32_t interpolation_filter; 1357 uint8_t tx_mode; 1358 uint8_t compound_reference_mode; 1359 uint32_t order_hint; 1360 uint8_t superres_scale_denominator; 1361 uint32_t primary_ref_frame; 1362 uint8_t refresh_frame_flags; 1363 uint8_t ref_frame_idx[7]; 1364 uint32_t ref_frame_ctrl_l0; /* forward prediction only */ 1365 void *ref_list[8]; /* for tracking ref frames */ 1366 void *recon_frame; 1367 1368 struct { 1369 uint8_t cdef_damping_minus_3; 1370 uint8_t cdef_bits; 1371 uint8_t cdef_y_strengths[8]; 1372 uint8_t cdef_uv_strengths[8]; 1373 } cdef; 1374 1375 struct { 1376 uint8_t yframe_restoration_type; 1377 uint8_t cbframe_restoration_type; 1378 uint8_t crframe_restoration_type; 1379 uint8_t lr_unit_shift; 1380 uint8_t lr_uv_shift; 1381 } restoration; 1382 1383 struct { 1384 uint8_t filter_level[2]; 1385 uint8_t filter_level_u; 1386 uint8_t filter_level_v; 1387 uint8_t sharpness_level; 1388 uint8_t mode_ref_delta_enabled; 1389 uint8_t mode_ref_delta_update; 1390 int8_t ref_deltas[8]; 1391 int8_t mode_deltas[2]; 1392 uint8_t delta_lf_present; 1393 uint8_t delta_lf_res; 1394 uint8_t delta_lf_multi; 1395 } loop_filter; 1396 1397 struct { 1398 uint8_t base_qindex; 1399 int8_t y_dc_delta_q; 1400 int8_t u_dc_delta_q; 1401 int8_t u_ac_delta_q; 1402 int8_t v_dc_delta_q; 1403 int8_t v_ac_delta_q; 1404 uint8_t min_base_qindex; 1405 uint8_t max_base_qindex; 1406 uint8_t using_qmatrix; 1407 uint8_t qm_y; 1408 uint8_t qm_u; 1409 uint8_t qm_v; 1410 uint8_t delta_q_present; 1411 uint8_t delta_q_res; 1412 } quantization; 1413 1414 struct { 1415 uint8_t obu_extension_flag; 1416 uint8_t obu_has_size_field; 1417 uint8_t temporal_id; 1418 uint8_t spatial_id; 1419 } tg_obu_header; 1420 1421 enum pipe_video_feedback_metadata_type requested_metadata; 1422 1423 union { 1424 struct { 1425 uint32_t hdr_cll:1; 1426 uint32_t hdr_mdcv:1; 1427 }; 1428 uint32_t value; 1429 } metadata_flags; 1430 1431 struct pipe_enc_hdr_cll metadata_hdr_cll; 1432 struct pipe_enc_hdr_mdcv metadata_hdr_mdcv; 1433 }; 1434 1435 struct pipe_h265_sps 1436 { 1437 uint8_t chroma_format_idc; 1438 uint8_t separate_colour_plane_flag; 1439 uint32_t pic_width_in_luma_samples; 1440 uint32_t pic_height_in_luma_samples; 1441 uint8_t bit_depth_luma_minus8; 1442 uint8_t bit_depth_chroma_minus8; 1443 uint8_t log2_max_pic_order_cnt_lsb_minus4; 1444 uint8_t sps_max_dec_pic_buffering_minus1; 1445 uint8_t log2_min_luma_coding_block_size_minus3; 1446 uint8_t log2_diff_max_min_luma_coding_block_size; 1447 uint8_t log2_min_transform_block_size_minus2; 1448 uint8_t log2_diff_max_min_transform_block_size; 1449 uint8_t max_transform_hierarchy_depth_inter; 1450 uint8_t max_transform_hierarchy_depth_intra; 1451 uint8_t scaling_list_enabled_flag; 1452 uint8_t ScalingList4x4[6][16]; 1453 uint8_t ScalingList8x8[6][64]; 1454 uint8_t ScalingList16x16[6][64]; 1455 uint8_t ScalingList32x32[2][64]; 1456 uint8_t ScalingListDCCoeff16x16[6]; 1457 uint8_t ScalingListDCCoeff32x32[2]; 1458 uint8_t amp_enabled_flag; 1459 uint8_t sample_adaptive_offset_enabled_flag; 1460 uint8_t pcm_enabled_flag; 1461 uint8_t pcm_sample_bit_depth_luma_minus1; 1462 uint8_t pcm_sample_bit_depth_chroma_minus1; 1463 uint8_t log2_min_pcm_luma_coding_block_size_minus3; 1464 uint8_t log2_diff_max_min_pcm_luma_coding_block_size; 1465 uint8_t pcm_loop_filter_disabled_flag; 1466 uint8_t num_short_term_ref_pic_sets; 1467 uint8_t long_term_ref_pics_present_flag; 1468 uint8_t num_long_term_ref_pics_sps; 1469 uint8_t sps_temporal_mvp_enabled_flag; 1470 uint8_t strong_intra_smoothing_enabled_flag; 1471 uint8_t no_pic_reordering_flag; 1472 uint8_t no_bi_pred_flag; 1473 }; 1474 1475 struct pipe_h265_pps 1476 { 1477 struct pipe_h265_sps *sps; 1478 1479 uint8_t dependent_slice_segments_enabled_flag; 1480 uint8_t output_flag_present_flag; 1481 uint8_t num_extra_slice_header_bits; 1482 uint8_t sign_data_hiding_enabled_flag; 1483 uint8_t cabac_init_present_flag; 1484 uint8_t num_ref_idx_l0_default_active_minus1; 1485 uint8_t num_ref_idx_l1_default_active_minus1; 1486 int8_t init_qp_minus26; 1487 uint8_t constrained_intra_pred_flag; 1488 uint8_t transform_skip_enabled_flag; 1489 uint8_t cu_qp_delta_enabled_flag; 1490 uint8_t diff_cu_qp_delta_depth; 1491 int8_t pps_cb_qp_offset; 1492 int8_t pps_cr_qp_offset; 1493 uint8_t pps_slice_chroma_qp_offsets_present_flag; 1494 uint8_t weighted_pred_flag; 1495 uint8_t weighted_bipred_flag; 1496 uint8_t transquant_bypass_enabled_flag; 1497 uint8_t tiles_enabled_flag; 1498 uint8_t entropy_coding_sync_enabled_flag; 1499 uint8_t num_tile_columns_minus1; 1500 uint8_t num_tile_rows_minus1; 1501 uint8_t uniform_spacing_flag; 1502 uint16_t column_width_minus1[20]; 1503 uint16_t row_height_minus1[22]; 1504 uint8_t loop_filter_across_tiles_enabled_flag; 1505 uint8_t pps_loop_filter_across_slices_enabled_flag; 1506 uint8_t deblocking_filter_control_present_flag; 1507 uint8_t deblocking_filter_override_enabled_flag; 1508 uint8_t pps_deblocking_filter_disabled_flag; 1509 int8_t pps_beta_offset_div2; 1510 int8_t pps_tc_offset_div2; 1511 uint8_t lists_modification_present_flag; 1512 uint8_t log2_parallel_merge_level_minus2; 1513 uint8_t slice_segment_header_extension_present_flag; 1514 uint16_t st_rps_bits; 1515 }; 1516 1517 struct pipe_h265_picture_desc 1518 { 1519 struct pipe_picture_desc base; 1520 1521 struct pipe_h265_pps *pps; 1522 1523 uint8_t IDRPicFlag; 1524 uint8_t RAPPicFlag; 1525 /* 1526 When the current picture is an IRAP picture, IntraPicFlag shall be equal to 1. 1527 When the current picture is not an IRAP picture, the host software decoder is 1528 not required to determine whether all slices of the current picture are I slices 1529 – i.e. it may simply set IntraPicFlag to 0 in this case.... 1530 1531 Some frontends have IntraPicFlag defined (ie. VAPictureParameterBufferHEVC) 1532 and some others like VDPAU/OMX can derive it from RAPPicFlag 1533 */ 1534 uint8_t IntraPicFlag; 1535 uint8_t CurrRpsIdx; 1536 uint32_t NumPocTotalCurr; 1537 uint32_t NumDeltaPocsOfRefRpsIdx; 1538 uint32_t NumShortTermPictureSliceHeaderBits; 1539 uint32_t NumLongTermPictureSliceHeaderBits; 1540 1541 int32_t CurrPicOrderCntVal; 1542 struct pipe_video_buffer *ref[16]; 1543 int32_t PicOrderCntVal[16]; 1544 uint8_t IsLongTerm[16]; 1545 uint8_t NumPocStCurrBefore; 1546 uint8_t NumPocStCurrAfter; 1547 uint8_t NumPocLtCurr; 1548 uint8_t RefPicSetStCurrBefore[8]; 1549 uint8_t RefPicSetStCurrAfter[8]; 1550 uint8_t RefPicSetLtCurr[8]; 1551 uint8_t RefPicList[PIPE_H265_MAX_SLICES][2][15]; 1552 bool UseRefPicList; 1553 bool UseStRpsBits; 1554 1555 struct 1556 { 1557 bool slice_info_present; 1558 uint32_t slice_count; 1559 uint32_t slice_data_size[PIPE_H265_MAX_SLICES]; 1560 uint32_t slice_data_offset[PIPE_H265_MAX_SLICES]; 1561 enum pipe_slice_buffer_placement_type slice_data_flag[PIPE_H265_MAX_SLICES]; 1562 } slice_parameter; 1563 }; 1564 1565 struct pipe_mjpeg_picture_desc 1566 { 1567 struct pipe_picture_desc base; 1568 1569 struct 1570 { 1571 uint16_t picture_width; 1572 uint16_t picture_height; 1573 1574 struct { 1575 uint8_t component_id; 1576 uint8_t h_sampling_factor; 1577 uint8_t v_sampling_factor; 1578 uint8_t quantiser_table_selector; 1579 } components[255]; 1580 1581 uint8_t num_components; 1582 uint16_t crop_x; 1583 uint16_t crop_y; 1584 uint16_t crop_width; 1585 uint16_t crop_height; 1586 } picture_parameter; 1587 1588 struct 1589 { 1590 uint8_t load_quantiser_table[4]; 1591 uint8_t quantiser_table[4][64]; 1592 } quantization_table; 1593 1594 struct 1595 { 1596 uint8_t load_huffman_table[2]; 1597 1598 struct { 1599 uint8_t num_dc_codes[16]; 1600 uint8_t dc_values[12]; 1601 uint8_t num_ac_codes[16]; 1602 uint8_t ac_values[162]; 1603 uint8_t pad[2]; 1604 } table[2]; 1605 } huffman_table; 1606 1607 struct 1608 { 1609 unsigned slice_data_size; 1610 unsigned slice_data_offset; 1611 unsigned slice_data_flag; 1612 unsigned slice_horizontal_position; 1613 unsigned slice_vertical_position; 1614 1615 struct { 1616 uint8_t component_selector; 1617 uint8_t dc_table_selector; 1618 uint8_t ac_table_selector; 1619 } components[4]; 1620 1621 uint8_t num_components; 1622 1623 uint16_t restart_interval; 1624 unsigned num_mcus; 1625 } slice_parameter; 1626 }; 1627 1628 struct vp9_segment_parameter 1629 { 1630 struct { 1631 uint16_t segment_reference_enabled:1; 1632 uint16_t segment_reference:2; 1633 uint16_t segment_reference_skipped:1; 1634 } segment_flags; 1635 1636 bool alt_quant_enabled; 1637 int16_t alt_quant; 1638 1639 bool alt_lf_enabled; 1640 int16_t alt_lf; 1641 1642 uint8_t filter_level[4][2]; 1643 1644 int16_t luma_ac_quant_scale; 1645 int16_t luma_dc_quant_scale; 1646 1647 int16_t chroma_ac_quant_scale; 1648 int16_t chroma_dc_quant_scale; 1649 }; 1650 1651 struct pipe_vp9_picture_desc 1652 { 1653 struct pipe_picture_desc base; 1654 1655 struct pipe_video_buffer *ref[16]; 1656 1657 struct { 1658 uint16_t frame_width; 1659 uint16_t frame_height; 1660 uint16_t prev_frame_width; 1661 uint16_t prev_frame_height; 1662 1663 struct { 1664 uint32_t subsampling_x:1; 1665 uint32_t subsampling_y:1; 1666 uint32_t frame_type:1; 1667 uint32_t show_frame:1; 1668 uint32_t prev_show_frame:1; 1669 uint32_t error_resilient_mode:1; 1670 uint32_t intra_only:1; 1671 uint32_t allow_high_precision_mv:1; 1672 uint32_t mcomp_filter_type:3; 1673 uint32_t frame_parallel_decoding_mode:1; 1674 uint32_t reset_frame_context:2; 1675 uint32_t refresh_frame_context:1; 1676 uint32_t frame_context_idx:2; 1677 uint32_t segmentation_enabled:1; 1678 uint32_t segmentation_temporal_update:1; 1679 uint32_t segmentation_update_map:1; 1680 uint32_t last_ref_frame:3; 1681 uint32_t last_ref_frame_sign_bias:1; 1682 uint32_t golden_ref_frame:3; 1683 uint32_t golden_ref_frame_sign_bias:1; 1684 uint32_t alt_ref_frame:3; 1685 uint32_t alt_ref_frame_sign_bias:1; 1686 uint32_t lossless_flag:1; 1687 } pic_fields; 1688 1689 uint8_t filter_level; 1690 uint8_t sharpness_level; 1691 1692 uint8_t log2_tile_rows; 1693 uint8_t log2_tile_columns; 1694 1695 uint8_t frame_header_length_in_bytes; 1696 1697 uint16_t first_partition_size; 1698 1699 uint8_t mb_segment_tree_probs[7]; 1700 uint8_t segment_pred_probs[3]; 1701 1702 uint8_t profile; 1703 1704 uint8_t bit_depth; 1705 1706 bool mode_ref_delta_enabled; 1707 bool mode_ref_delta_update; 1708 1709 uint8_t base_qindex; 1710 int8_t y_dc_delta_q; 1711 int8_t uv_ac_delta_q; 1712 int8_t uv_dc_delta_q; 1713 uint8_t abs_delta; 1714 uint8_t ref_deltas[4]; 1715 uint8_t mode_deltas[2]; 1716 } picture_parameter; 1717 1718 struct { 1719 bool slice_info_present; 1720 uint32_t slice_count; 1721 uint32_t slice_data_size[128]; 1722 uint32_t slice_data_offset[128]; 1723 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 1724 struct vp9_segment_parameter seg_param[8]; 1725 } slice_parameter; 1726 }; 1727 1728 struct pipe_av1_picture_desc 1729 { 1730 struct pipe_picture_desc base; 1731 1732 struct pipe_video_buffer *ref[16]; 1733 struct pipe_video_buffer *film_grain_target; 1734 struct { 1735 uint8_t profile; 1736 uint8_t order_hint_bits_minus_1; 1737 uint8_t bit_depth_idx; 1738 1739 struct { 1740 uint32_t use_128x128_superblock:1; 1741 uint32_t enable_filter_intra:1; 1742 uint32_t enable_intra_edge_filter:1; 1743 uint32_t enable_interintra_compound:1; 1744 uint32_t enable_masked_compound:1; 1745 uint32_t enable_dual_filter:1; 1746 uint32_t enable_order_hint:1; 1747 uint32_t enable_jnt_comp:1; 1748 uint32_t enable_cdef:1; 1749 uint32_t mono_chrome:1; 1750 uint32_t ref_frame_mvs:1; 1751 uint32_t film_grain_params_present:1; 1752 } seq_info_fields; 1753 1754 uint32_t current_frame_id; 1755 1756 uint16_t frame_width; 1757 uint16_t frame_height; 1758 uint16_t max_width; 1759 uint16_t max_height; 1760 1761 uint8_t ref_frame_idx[7]; 1762 uint8_t primary_ref_frame; 1763 uint8_t order_hint; 1764 1765 struct { 1766 struct { 1767 uint32_t enabled:1; 1768 uint32_t update_map:1; 1769 uint32_t update_data:1; 1770 uint32_t temporal_update:1; 1771 } segment_info_fields; 1772 1773 int16_t feature_data[8][8]; 1774 uint8_t feature_mask[8]; 1775 } seg_info; 1776 1777 struct { 1778 struct { 1779 uint32_t apply_grain:1; 1780 uint32_t chroma_scaling_from_luma:1; 1781 uint32_t grain_scaling_minus_8:2; 1782 uint32_t ar_coeff_lag:2; 1783 uint32_t ar_coeff_shift_minus_6:2; 1784 uint32_t grain_scale_shift:2; 1785 uint32_t overlap_flag:1; 1786 uint32_t clip_to_restricted_range:1; 1787 } film_grain_info_fields; 1788 1789 uint16_t grain_seed; 1790 uint8_t num_y_points; 1791 uint8_t point_y_value[14]; 1792 uint8_t point_y_scaling[14]; 1793 uint8_t num_cb_points; 1794 uint8_t point_cb_value[10]; 1795 uint8_t point_cb_scaling[10]; 1796 uint8_t num_cr_points; 1797 uint8_t point_cr_value[10]; 1798 uint8_t point_cr_scaling[10]; 1799 int8_t ar_coeffs_y[24]; 1800 int8_t ar_coeffs_cb[25]; 1801 int8_t ar_coeffs_cr[25]; 1802 uint8_t cb_mult; 1803 uint8_t cb_luma_mult; 1804 uint16_t cb_offset; 1805 uint8_t cr_mult; 1806 uint8_t cr_luma_mult; 1807 uint16_t cr_offset; 1808 } film_grain_info; 1809 1810 uint8_t tile_cols; 1811 uint8_t tile_rows; 1812 uint32_t tile_col_start_sb[65]; 1813 uint32_t tile_row_start_sb[65]; 1814 uint16_t width_in_sbs[64]; 1815 uint16_t height_in_sbs[64]; 1816 uint16_t context_update_tile_id; 1817 1818 struct { 1819 uint32_t frame_type:2; 1820 uint32_t show_frame:1; 1821 uint32_t showable_frame:1; 1822 uint32_t error_resilient_mode:1; 1823 uint32_t disable_cdf_update:1; 1824 uint32_t allow_screen_content_tools:1; 1825 uint32_t force_integer_mv:1; 1826 uint32_t allow_intrabc:1; 1827 uint32_t use_superres:1; 1828 uint32_t allow_high_precision_mv:1; 1829 uint32_t is_motion_mode_switchable:1; 1830 uint32_t use_ref_frame_mvs:1; 1831 uint32_t disable_frame_end_update_cdf:1; 1832 uint32_t uniform_tile_spacing_flag:1; 1833 uint32_t allow_warped_motion:1; 1834 uint32_t large_scale_tile:1; 1835 } pic_info_fields; 1836 1837 uint8_t superres_scale_denominator; 1838 1839 uint8_t interp_filter; 1840 uint8_t filter_level[2]; 1841 uint8_t filter_level_u; 1842 uint8_t filter_level_v; 1843 struct { 1844 uint8_t sharpness_level:3; 1845 uint8_t mode_ref_delta_enabled:1; 1846 uint8_t mode_ref_delta_update:1; 1847 } loop_filter_info_fields; 1848 1849 int8_t ref_deltas[8]; 1850 int8_t mode_deltas[2]; 1851 1852 uint8_t base_qindex; 1853 int8_t y_dc_delta_q; 1854 int8_t u_dc_delta_q; 1855 int8_t u_ac_delta_q; 1856 int8_t v_dc_delta_q; 1857 int8_t v_ac_delta_q; 1858 1859 struct { 1860 uint16_t using_qmatrix:1; 1861 uint16_t qm_y:4; 1862 uint16_t qm_u:4; 1863 uint16_t qm_v:4; 1864 } qmatrix_fields; 1865 1866 struct { 1867 uint32_t delta_q_present_flag:1; 1868 uint32_t log2_delta_q_res:2; 1869 uint32_t delta_lf_present_flag:1; 1870 uint32_t log2_delta_lf_res:2; 1871 uint32_t delta_lf_multi:1; 1872 uint32_t tx_mode:2; 1873 uint32_t reference_select:1; 1874 uint32_t reduced_tx_set_used:1; 1875 uint32_t skip_mode_present:1; 1876 } mode_control_fields; 1877 1878 uint8_t cdef_damping_minus_3; 1879 uint8_t cdef_bits; 1880 uint8_t cdef_y_strengths[8]; 1881 uint8_t cdef_uv_strengths[8]; 1882 1883 struct { 1884 uint16_t yframe_restoration_type:2; 1885 uint16_t cbframe_restoration_type:2; 1886 uint16_t crframe_restoration_type:2; 1887 uint16_t lr_unit_shift:2; 1888 uint16_t lr_uv_shift:1; 1889 } loop_restoration_fields; 1890 1891 uint16_t lr_unit_size[3]; 1892 1893 struct { 1894 uint32_t wmtype; 1895 uint8_t invalid; 1896 int32_t wmmat[8]; 1897 } wm[7]; 1898 1899 uint32_t refresh_frame_flags; 1900 uint8_t matrix_coefficients; 1901 } picture_parameter; 1902 1903 struct { 1904 uint32_t slice_data_size[256]; 1905 uint32_t slice_data_offset[256]; 1906 uint16_t slice_data_row[256]; 1907 uint16_t slice_data_col[256]; 1908 uint8_t slice_data_anchor_frame_idx[256]; 1909 uint16_t slice_count; 1910 } slice_parameter; 1911 }; 1912 1913 struct pipe_vpp_blend 1914 { 1915 enum pipe_video_vpp_blend_mode mode; 1916 /* To be used with PIPE_VIDEO_VPP_BLEND_MODE_GLOBAL_ALPHA */ 1917 float global_alpha; 1918 }; 1919 1920 struct pipe_vpp_desc 1921 { 1922 struct pipe_picture_desc base; 1923 struct u_rect src_region; 1924 struct u_rect dst_region; 1925 enum pipe_video_vpp_orientation orientation; 1926 struct pipe_vpp_blend blend; 1927 1928 /* Fence to wait on for the src surface */ 1929 struct pipe_fence_handle *src_surface_fence; 1930 1931 uint32_t background_color; 1932 enum pipe_video_vpp_color_standard_type in_colors_standard; 1933 enum pipe_video_vpp_color_range in_color_range; 1934 enum pipe_video_vpp_chroma_siting in_chroma_siting; 1935 enum pipe_video_vpp_color_standard_type out_colors_standard; 1936 enum pipe_video_vpp_color_range out_color_range; 1937 enum pipe_video_vpp_chroma_siting out_chroma_siting; 1938 }; 1939 1940 1941 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_PREDICTION_DIRECTION */ 1942 enum pipe_h265_enc_pred_direction 1943 { 1944 /* No restrictions*/ 1945 PIPE_H265_PRED_DIRECTION_ALL = 0x0, 1946 /* P Frame*/ 1947 PIPE_H265_PRED_DIRECTION_PREVIOUS = 0x1, 1948 /* Same reference lists for B Frame*/ 1949 PIPE_H265_PRED_DIRECTION_FUTURE = 0x2, 1950 /* Low delay B frames */ 1951 PIPE_H265_PRED_DIRECTION_BI_NOT_EMPTY = 0x4, 1952 }; 1953 1954 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_FEATURE_FLAGS 1955 the config_supported bit is used to differenciate a supported 1956 config with all bits as zero and unsupported by driver with value=0 1957 */ 1958 union pipe_h265_enc_cap_features { 1959 struct { 1960 /** Separate colour planes. 1961 * 1962 * Allows setting separate_colour_plane_flag in the SPS. 1963 */ 1964 uint32_t separate_colour_planes : 2; 1965 /** Scaling lists. 1966 * 1967 * Allows scaling_list() elements to be present in both the SPS 1968 * and the PPS. The decoded form of the scaling lists must also 1969 * be supplied in a VAQMatrixBufferHEVC buffer when scaling lists 1970 * are enabled. 1971 */ 1972 uint32_t scaling_lists : 2; 1973 /** Asymmetric motion partitions. 1974 * 1975 * Allows setting amp_enabled_flag in the SPS. 1976 */ 1977 uint32_t amp : 2; 1978 /** Sample adaptive offset filter. 1979 * 1980 * Allows setting slice_sao_luma_flag and slice_sao_chroma_flag 1981 * in slice headers. 1982 */ 1983 uint32_t sao : 2; 1984 /** PCM sample blocks. 1985 * 1986 * Allows setting pcm_enabled_flag in the SPS. When enabled 1987 * PCM parameters must be supplied with the sequence parameters, 1988 * including block sizes which may be further constrained as 1989 * noted in the VAConfigAttribEncHEVCBlockSizes attribute. 1990 */ 1991 uint32_t pcm : 2; 1992 /** Temporal motion vector Prediction. 1993 * 1994 * Allows setting slice_temporal_mvp_enabled_flag in slice 1995 * headers. 1996 */ 1997 uint32_t temporal_mvp : 2; 1998 /** Strong intra smoothing. 1999 * 2000 * Allows setting strong_intra_smoothing_enabled_flag in the SPS. 2001 */ 2002 uint32_t strong_intra_smoothing : 2; 2003 /** Dependent slices. 2004 * 2005 * Allows setting dependent_slice_segment_flag in slice headers. 2006 */ 2007 uint32_t dependent_slices : 2; 2008 /** Sign data hiding. 2009 * 2010 * Allows setting sign_data_hiding_enable_flag in the PPS. 2011 */ 2012 uint32_t sign_data_hiding : 2; 2013 /** Constrained intra prediction. 2014 * 2015 * Allows setting constrained_intra_pred_flag in the PPS. 2016 */ 2017 uint32_t constrained_intra_pred : 2; 2018 /** Transform skipping. 2019 * 2020 * Allows setting transform_skip_enabled_flag in the PPS. 2021 */ 2022 uint32_t transform_skip : 2; 2023 /** QP delta within coding units. 2024 * 2025 * Allows setting cu_qp_delta_enabled_flag in the PPS. 2026 */ 2027 uint32_t cu_qp_delta : 2; 2028 /** Weighted prediction. 2029 * 2030 * Allows setting weighted_pred_flag and weighted_bipred_flag in 2031 * the PPS. The pred_weight_table() data must be supplied with 2032 * every slice header when weighted prediction is enabled. 2033 */ 2034 uint32_t weighted_prediction : 2; 2035 /** Transform and quantisation bypass. 2036 * 2037 * Allows setting transquant_bypass_enabled_flag in the PPS. 2038 */ 2039 uint32_t transquant_bypass : 2; 2040 /** Deblocking filter disable. 2041 * 2042 * Allows setting slice_deblocking_filter_disabled_flag. 2043 */ 2044 uint32_t deblocking_filter_disable : 2; 2045 /** Flag indicating this is a supported configuration 2046 * 2047 * It could be possible all the bits above are set to zero 2048 * and this is a valid configuration, so we distinguish 2049 * between get_video_param returning 0 for no support 2050 * and this case with this bit flag. 2051 */ 2052 uint32_t config_supported : 1; 2053 } bits; 2054 uint32_t value; 2055 }; 2056 2057 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_BLOCK_SIZES 2058 the config_supported bit is used to differenciate a supported 2059 config with all bits as zero and unsupported by driver with value=0 */ 2060 union pipe_h265_enc_cap_block_sizes { 2061 struct { 2062 /** Largest supported size of coding tree blocks. 2063 * 2064 * CtbLog2SizeY must not be larger than this. 2065 */ 2066 uint32_t log2_max_coding_tree_block_size_minus3 : 2; 2067 /** Smallest supported size of coding tree blocks. 2068 * 2069 * CtbLog2SizeY must not be smaller than this. 2070 * 2071 * This may be the same as the maximum size, indicating that only 2072 * one CTB size is supported. 2073 */ 2074 uint32_t log2_min_coding_tree_block_size_minus3 : 2; 2075 2076 /** Smallest supported size of luma coding blocks. 2077 * 2078 * MinCbLog2SizeY must not be smaller than this. 2079 */ 2080 uint32_t log2_min_luma_coding_block_size_minus3 : 2; 2081 2082 /** Largest supported size of luma transform blocks. 2083 * 2084 * MaxTbLog2SizeY must not be larger than this. 2085 */ 2086 uint32_t log2_max_luma_transform_block_size_minus2 : 2; 2087 /** Smallest supported size of luma transform blocks. 2088 * 2089 * MinTbLog2SizeY must not be smaller than this. 2090 */ 2091 uint32_t log2_min_luma_transform_block_size_minus2 : 2; 2092 2093 /** Largest supported transform hierarchy depth in inter 2094 * coding units. 2095 * 2096 * max_transform_hierarchy_depth_inter must not be larger 2097 * than this. 2098 */ 2099 uint32_t max_max_transform_hierarchy_depth_inter : 2; 2100 /** Smallest supported transform hierarchy depth in inter 2101 * coding units. 2102 * 2103 * max_transform_hierarchy_depth_inter must not be smaller 2104 * than this. 2105 */ 2106 uint32_t min_max_transform_hierarchy_depth_inter : 2; 2107 2108 /** Largest supported transform hierarchy depth in intra 2109 * coding units. 2110 * 2111 * max_transform_hierarchy_depth_intra must not be larger 2112 * than this. 2113 */ 2114 uint32_t max_max_transform_hierarchy_depth_intra : 2; 2115 /** Smallest supported transform hierarchy depth in intra 2116 * coding units. 2117 * 2118 * max_transform_hierarchy_depth_intra must not be smaller 2119 * than this. 2120 */ 2121 uint32_t min_max_transform_hierarchy_depth_intra : 2; 2122 2123 /** Largest supported size of PCM coding blocks. 2124 * 2125 * Log2MaxIpcmCbSizeY must not be larger than this. 2126 */ 2127 uint32_t log2_max_pcm_coding_block_size_minus3 : 2; 2128 /** Smallest supported size of PCM coding blocks. 2129 * 2130 * Log2MinIpcmCbSizeY must not be smaller than this. 2131 */ 2132 uint32_t log2_min_pcm_coding_block_size_minus3 : 2; 2133 /** Flag indicating this is a supported configuration 2134 * 2135 * It could be possible all the bits above are set to zero 2136 * and this is a valid configuration, so we distinguish 2137 * between get_video_param returning 0 for no support 2138 * and this case with this bit flag. 2139 */ 2140 uint32_t config_supported : 1; 2141 } bits; 2142 uint32_t value; 2143 }; 2144 2145 union pipe_av1_enc_cap_features { 2146 struct { 2147 /** 2148 * Use 128x128 superblock. 2149 * 2150 * Allows setting use_128x128_superblock in the SPS. 2151 */ 2152 uint32_t support_128x128_superblock : 2; 2153 /** 2154 * Intra filter. 2155 * Allows setting enable_filter_intra in the SPS. 2156 */ 2157 uint32_t support_filter_intra : 2; 2158 /** 2159 * Intra edge filter. 2160 * Allows setting enable_intra_edge_filter in the SPS. 2161 */ 2162 uint32_t support_intra_edge_filter : 2; 2163 /** 2164 * Interintra compound. 2165 * Allows setting enable_interintra_compound in the SPS. 2166 */ 2167 uint32_t support_interintra_compound : 2; 2168 /** 2169 * Masked compound. 2170 * Allows setting enable_masked_compound in the SPS. 2171 */ 2172 uint32_t support_masked_compound : 2; 2173 /** 2174 * Warped motion. 2175 * Allows setting enable_warped_motion in the SPS. 2176 */ 2177 uint32_t support_warped_motion : 2; 2178 /** 2179 * Palette mode. 2180 * Allows setting palette_mode in the PPS. 2181 */ 2182 uint32_t support_palette_mode : 2; 2183 /** 2184 * Dual filter. 2185 * Allows setting enable_dual_filter in the SPS. 2186 */ 2187 uint32_t support_dual_filter : 2; 2188 /** 2189 * Jnt compound. 2190 * Allows setting enable_jnt_comp in the SPS. 2191 */ 2192 uint32_t support_jnt_comp : 2; 2193 /** 2194 * Refrence frame mvs. 2195 * Allows setting enable_ref_frame_mvs in the SPS. 2196 */ 2197 uint32_t support_ref_frame_mvs : 2; 2198 /** 2199 * Super resolution. 2200 * Allows setting enable_superres in the SPS. 2201 */ 2202 uint32_t support_superres : 2; 2203 /** 2204 * Restoration. 2205 * Allows setting enable_restoration in the SPS. 2206 */ 2207 uint32_t support_restoration : 2; 2208 /** 2209 * Allow intraBC. 2210 * Allows setting allow_intrabc in the PPS. 2211 */ 2212 uint32_t support_allow_intrabc : 2; 2213 /** 2214 * Cdef channel strength. 2215 * Allows setting cdef_y_strengths and cdef_uv_strengths in PPS. 2216 */ 2217 uint32_t support_cdef_channel_strength : 2; 2218 /** Reserved bits for future, must be zero. */ 2219 uint32_t reserved : 4; 2220 } bits; 2221 uint32_t value; 2222 }; 2223 2224 union pipe_av1_enc_cap_features_ext1 { 2225 struct { 2226 /** 2227 * Fields indicate which types of interpolation filter are supported. 2228 * (interpolation_filter & 0x01) == 1: eight_tap filter is supported, 0: not. 2229 * (interpolation_filter & 0x02) == 1: eight_tap_smooth filter is supported, 0: not. 2230 * (interpolation_filter & 0x04) == 1: eight_sharp filter is supported, 0: not. 2231 * (interpolation_filter & 0x08) == 1: bilinear filter is supported, 0: not. 2232 * (interpolation_filter & 0x10) == 1: switchable filter is supported, 0: not. 2233 */ 2234 uint32_t interpolation_filter : 5; 2235 /** 2236 * Min segmentId block size accepted. 2237 * Application need to send seg_id_block_size in PPS equal or larger than this value. 2238 */ 2239 uint32_t min_segid_block_size_accepted : 8; 2240 /** 2241 * Type of segment feature supported. 2242 * (segment_feature_support & 0x01) == 1: SEG_LVL_ALT_Q is supported, 0: not. 2243 * (segment_feature_support & 0x02) == 1: SEG_LVL_ALT_LF_Y_V is supported, 0: not. 2244 * (segment_feature_support & 0x04) == 1: SEG_LVL_ALT_LF_Y_H is supported, 0: not. 2245 * (segment_feature_support & 0x08) == 1: SEG_LVL_ALT_LF_U is supported, 0: not. 2246 * (segment_feature_support & 0x10) == 1: SEG_LVL_ALT_LF_V is supported, 0: not. 2247 * (segment_feature_support & 0x20) == 1: SEG_LVL_REF_FRAME is supported, 0: not. 2248 * (segment_feature_support & 0x40) == 1: SEG_LVL_SKIP is supported, 0: not. 2249 * (segment_feature_support & 0x80) == 1: SEG_LVL_GLOBALMV is supported, 0: not. 2250 */ 2251 uint32_t segment_feature_support : 8; 2252 /** Reserved bits for future, must be zero. */ 2253 uint32_t reserved : 11; 2254 } bits; 2255 uint32_t value; 2256 }; 2257 2258 union pipe_av1_enc_cap_features_ext2 { 2259 struct { 2260 /** 2261 * Tile size bytes minus1. 2262 * Specify the number of bytes needed to code tile size supported. 2263 * This value need to be set in frame header obu. 2264 */ 2265 uint32_t tile_size_bytes_minus1 : 2; 2266 /** 2267 * Tile size bytes minus1. 2268 * Specify the fixed number of bytes needed to code syntax obu_size. 2269 */ 2270 uint32_t obu_size_bytes_minus1 : 2; 2271 /** 2272 * tx_mode supported. 2273 * (tx_mode_support & 0x01) == 1: ONLY_4X4 is supported, 0: not. 2274 * (tx_mode_support & 0x02) == 1: TX_MODE_LARGEST is supported, 0: not. 2275 * (tx_mode_support & 0x04) == 1: TX_MODE_SELECT is supported, 0: not. 2276 */ 2277 uint32_t tx_mode_support : 3; 2278 /** 2279 * Max tile num minus1. 2280 * Specify the max number of tile supported by driver. 2281 */ 2282 uint32_t max_tile_num_minus1 : 13; 2283 /** Reserved bits for future, must be zero. */ 2284 uint32_t reserved : 12; 2285 } bits; 2286 uint32_t value; 2287 }; 2288 2289 struct codec_unit_location_t 2290 { 2291 uint64_t offset; 2292 uint64_t size; 2293 enum codec_unit_location_flags flags; 2294 }; 2295 2296 struct pipe_enc_feedback_metadata 2297 { 2298 /* 2299 * Driver writes the metadata types present in this struct 2300 */ 2301 enum pipe_video_feedback_metadata_type present_metadata; 2302 2303 /* 2304 * Driver writes the result of encoding the associated frame. 2305 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_ENCODE_RESULT 2306 */ 2307 enum pipe_video_feedback_encode_result_flags encode_result; 2308 2309 /* 2310 * Driver fills in with coded headers information 2311 * and a number codec_unit_metadata_count of valid entries 2312 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_CODEC_UNIT_LOCATION 2313 */ 2314 struct codec_unit_location_t codec_unit_metadata[256]; 2315 unsigned codec_unit_metadata_count; 2316 2317 /* 2318 * Driver writes the average QP used to encode this frame 2319 */ 2320 unsigned int average_frame_qp; 2321 }; 2322 2323 union pipe_enc_cap_roi { 2324 struct { 2325 /** 2326 * The number of ROI regions supported, 0 if ROI is not supported 2327 */ 2328 uint32_t num_roi_regions : 8; 2329 /** 2330 * A flag indicates whether ROI priority is supported 2331 * 2332 * roi_rc_priority_support equal to 1 specifies the underlying driver supports 2333 * ROI priority when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 2334 * in #VAEncROI to set ROI priority. roi_rc_priority_support equal to 0 specifies 2335 * the underlying driver doesn't support ROI priority. 2336 * 2337 * User should ignore roi_rc_priority_support when VAConfigAttribRateControl == VA_RC_CQP 2338 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 2339 */ 2340 uint32_t roi_rc_priority_support : 1; 2341 /** 2342 * A flag indicates whether ROI delta QP is supported 2343 * 2344 * roi_rc_qp_delta_support equal to 1 specifies the underlying driver supports 2345 * ROI delta QP when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 2346 * in #VAEncROI to set ROI delta QP. roi_rc_qp_delta_support equal to 0 specifies 2347 * the underlying driver doesn't support ROI delta QP. 2348 * 2349 * User should ignore roi_rc_qp_delta_support when VAConfigAttribRateControl == VA_RC_CQP 2350 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 2351 */ 2352 uint32_t roi_rc_qp_delta_support : 1; 2353 uint32_t reserved : 22; 2354 2355 } bits; 2356 uint32_t value; 2357 }; 2358 2359 union pipe_enc_cap_surface_alignment { 2360 struct { 2361 /** 2362 * log2_width_alignment 2363 */ 2364 uint32_t log2_width_alignment : 4; 2365 /** 2366 * log2_height_alignment 2367 */ 2368 uint32_t log2_height_alignment : 4; 2369 uint32_t reserved : 24; 2370 } bits; 2371 uint32_t value; 2372 }; 2373 2374 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_RANGE_EXTENSION_SUPPORT */ 2375 union pipe_h265_enc_cap_range_extension { 2376 struct { 2377 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with diff_cu_chroma_qp_offset_depth. 2378 * Codec valid range for support for diff_cu_chroma_qp_offset_depth is [0, 3]. 2379 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2380 * supported_diff_cu_chroma_qp_offset_depth_values |= (1 << value) 2381 */ 2382 uint32_t supported_diff_cu_chroma_qp_offset_depth_values: 4; 2383 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_sao_offset_scale_luma. 2384 * Codec valid range for support for log2_sao_offset_scale_luma is [0, 6]. 2385 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2386 * supported_log2_sao_offset_scale_luma_values |= (1 << value) 2387 */ 2388 uint32_t supported_log2_sao_offset_scale_luma_values: 7; 2389 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_sao_offset_scale_chroma. 2390 * Codec valid range for support for log2_sao_offset_scale_chroma is [0, 6]. 2391 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2392 * supported_log2_sao_offset_scale_chroma_values |= (1 << value) 2393 */ 2394 uint32_t supported_log2_sao_offset_scale_chroma_values: 7; 2395 /* Driver output. A bitmask indicating which values are allowed to be configured when encoding with log2_max_transform_skip_block_size_minus2. 2396 * Codec valid range for support for log2_max_transform_skip_block_size_minus2 is [0, 3]. 2397 * For driver to indicate that value is supported, it must set the following in the reported bitmask. 2398 * supported_log2_max_transform_skip_block_size_minus2_values |= (1 << value) 2399 */ 2400 uint32_t supported_log2_max_transform_skip_block_size_minus2_values: 6; 2401 /* Driver output.The minimum value allowed to be configured when encoding with chroma_qp_offset_list_len_minus1. 2402 * Codec valid range for support for chroma_qp_offset_list_len_minus1 is [0, 5]. 2403 */ 2404 uint32_t min_chroma_qp_offset_list_len_minus1_values: 3; 2405 /* Driver output.The maximum value allowed to be configured when encoding with chroma_qp_offset_list_len_minus1. 2406 * Codec valid range for support for chroma_qp_offset_list_len_minus1 is [0, 5]. 2407 */ 2408 uint32_t max_chroma_qp_offset_list_len_minus1_values: 3; 2409 } bits; 2410 uint32_t value; 2411 }; 2412 2413 union pipe_h265_enc_cap_range_extension_flags { 2414 struct { 2415 /* 2416 * Driver Output. Indicates pipe_enc_feature values for setting transform_skip_rotation_enabled_flag 2417 */ 2418 uint32_t supports_transform_skip_rotation_enabled_flag: 2; 2419 /* 2420 * Driver Output. Indicates pipe_enc_feature values for setting transform_skip_context_enabled_flag 2421 */ 2422 uint32_t supports_transform_skip_context_enabled_flag: 2; 2423 /* 2424 * Driver Output. Indicates pipe_enc_feature values for setting implicit_rdpcm_enabled_flag 2425 */ 2426 uint32_t supports_implicit_rdpcm_enabled_flag: 2; 2427 /* 2428 * Driver Output. Indicates pipe_enc_feature values for setting explicit_rdpcm_enabled_flag 2429 */ 2430 uint32_t supports_explicit_rdpcm_enabled_flag: 2; 2431 /* 2432 * Driver Output. Indicates pipe_enc_feature values for setting extended_precision_processing_flag 2433 */ 2434 uint32_t supports_extended_precision_processing_flag: 2; 2435 /* 2436 * Driver Output. Indicates pipe_enc_feature values for setting intra_smoothing_disabled_flag 2437 */ 2438 uint32_t supports_intra_smoothing_disabled_flag: 2; 2439 /* 2440 * Driver Output. Indicates pipe_enc_feature values for setting high_precision_offsets_enabled_flag 2441 */ 2442 uint32_t supports_high_precision_offsets_enabled_flag: 2; 2443 /* 2444 * Driver Output. Indicates pipe_enc_feature values for setting persistent_rice_adaptation_enabled_flag 2445 */ 2446 uint32_t supports_persistent_rice_adaptation_enabled_flag: 2; 2447 /* 2448 * Driver Output. Indicates pipe_enc_feature values for setting cabac_bypass_alignment_enabled_flag 2449 */ 2450 uint32_t supports_cabac_bypass_alignment_enabled_flag: 2; 2451 /* 2452 * Driver Output. Indicates pipe_enc_feature values for setting cross_component_prediction_enabled_flag 2453 */ 2454 uint32_t supports_cross_component_prediction_enabled_flag: 2; 2455 /* 2456 * Driver Output. Indicates pipe_enc_feature values for setting chroma_qp_offset_list_enabled_flag 2457 */ 2458 uint32_t supports_chroma_qp_offset_list_enabled_flag: 2; 2459 } bits; 2460 uint32_t value; 2461 }; 2462 2463 #ifdef __cplusplus 2464 } 2465 #endif 2466 2467 #endif /* PIPE_VIDEO_STATE_H */ 2468