xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/svga/svgadump/svga_shader.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright (c) 2007-2024 Broadcom. All Rights Reserved.
3  * The term “Broadcom” refers to Broadcom Inc.
4  * and/or its subsidiaries.
5  * SPDX-License-Identifier: MIT
6  */
7 
8 /**
9  * @file
10  * SVGA Shader Token Definitions
11  *
12  * @author Michal Krol <[email protected]>
13  */
14 
15 #ifndef ST_SHADER_SVGA_H
16 #define ST_SHADER_SVGA_H
17 
18 #include "util/compiler.h"
19 
20 struct sh_op
21 {
22    unsigned opcode:16;
23    unsigned control:8;
24    unsigned length:4;
25    unsigned predicated:1;
26    unsigned unused:1;
27    unsigned coissue:1;
28    unsigned is_reg:1;
29 };
30 
31 struct sh_reg
32 {
33    unsigned number:11;
34    unsigned type_hi:2;
35    unsigned relative:1;
36    unsigned unused:14;
37    unsigned type_lo:3;
38    unsigned is_reg:1;
39 };
40 
41 static inline unsigned
sh_reg_type(struct sh_reg reg)42 sh_reg_type( struct sh_reg reg )
43 {
44    return reg.type_lo | (reg.type_hi << 3);
45 }
46 
47 struct sh_cdata
48 {
49    float xyzw[4];
50 };
51 
52 struct sh_def
53 {
54    struct sh_op op;
55    struct sh_reg reg;
56    struct sh_cdata cdata;
57 };
58 
59 struct sh_defb
60 {
61    struct sh_op op;
62    struct sh_reg reg;
63    uint data;
64 };
65 
66 struct sh_idata
67 {
68    int xyzw[4];
69 };
70 
71 struct sh_defi
72 {
73    struct sh_op op;
74    struct sh_reg reg;
75    struct sh_idata idata;
76 };
77 
78 #define PS_TEXTURETYPE_UNKNOWN   SVGA3DSAMP_UNKNOWN
79 #define PS_TEXTURETYPE_2D        SVGA3DSAMP_2D
80 #define PS_TEXTURETYPE_CUBE      SVGA3DSAMP_CUBE
81 #define PS_TEXTURETYPE_VOLUME    SVGA3DSAMP_VOLUME
82 
83 struct sh_sampleinfo
84 {
85    unsigned unused:27;
86    unsigned texture_type:4;
87    unsigned is_reg:1;
88 };
89 
90 struct sh_semantic
91 {
92    unsigned usage:4;
93    unsigned unused1:12;
94    unsigned usage_index:4;
95    unsigned unused2:11;
96    unsigned is_reg:1;
97 };
98 
99 #define SH_WRITEMASK_0              0x1
100 #define SH_WRITEMASK_1              0x2
101 #define SH_WRITEMASK_2              0x4
102 #define SH_WRITEMASK_3              0x8
103 #define SH_WRITEMASK_ALL            0xf
104 
105 #define SH_DSTMOD_NONE              0x0
106 #define SH_DSTMOD_SATURATE          0x1
107 #define SH_DSTMOD_PARTIALPRECISION  0x2
108 #define SH_DSTMOD_MSAMPCENTROID     0x4
109 
110 struct sh_dstreg
111 {
112    unsigned number:11;
113    unsigned type_hi:2;
114    unsigned relative:1;
115    unsigned unused:2;
116    unsigned write_mask:4;
117    unsigned modifier:4;
118    unsigned shift_scale:4;
119    unsigned type_lo:3;
120    unsigned is_reg:1;
121 };
122 
123 static inline unsigned
sh_dstreg_type(struct sh_dstreg reg)124 sh_dstreg_type( struct sh_dstreg reg )
125 {
126    return reg.type_lo | (reg.type_hi << 3);
127 }
128 
129 struct sh_dcl
130 {
131    struct sh_op op;
132    union {
133       struct sh_sampleinfo sampleinfo;
134       struct sh_semantic semantic;
135    } u;
136    struct sh_dstreg reg;
137 };
138 
139 struct sh_srcreg
140 {
141    unsigned number:11;
142    unsigned type_hi:2;
143    unsigned relative:1;
144    unsigned unused:2;
145    unsigned swizzle_x:2;
146    unsigned swizzle_y:2;
147    unsigned swizzle_z:2;
148    unsigned swizzle_w:2;
149    unsigned modifier:4;
150    unsigned type_lo:3;
151    unsigned is_reg:1;
152 };
153 
154 static inline unsigned
sh_srcreg_type(struct sh_srcreg reg)155 sh_srcreg_type( struct sh_srcreg reg )
156 {
157    return reg.type_lo | (reg.type_hi << 3);
158 }
159 
160 struct sh_dstop
161 {
162    struct sh_op op;
163    struct sh_dstreg dst;
164 };
165 
166 struct sh_srcop
167 {
168    struct sh_op op;
169    struct sh_srcreg src;
170 };
171 
172 struct sh_src2op
173 {
174    struct sh_op op;
175    struct sh_srcreg src0;
176    struct sh_srcreg src1;
177 };
178 
179 struct sh_unaryop
180 {
181    struct sh_op op;
182    struct sh_dstreg dst;
183    struct sh_srcreg src;
184 };
185 
186 struct sh_binaryop
187 {
188    struct sh_op op;
189    struct sh_dstreg dst;
190    struct sh_srcreg src0;
191    struct sh_srcreg src1;
192 };
193 
194 struct sh_trinaryop
195 {
196    struct sh_op op;
197    struct sh_dstreg dst;
198    struct sh_srcreg src0;
199    struct sh_srcreg src1;
200    struct sh_srcreg src2;
201 };
202 
203 struct sh_comment
204 {
205    unsigned opcode:16;
206    unsigned size:16;
207 };
208 
209 #endif /* ST_SHADER_SVGA_H */
210