1 /*
2 * Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: MIT
6 */
7
8 #ifndef SVGA_TGSI_EMIT_H
9 #define SVGA_TGSI_EMIT_H
10
11 #include "tgsi/tgsi_scan.h"
12 #include "svga_hw_reg.h"
13 #include "svga_shader.h"
14 #include "svga_tgsi.h"
15 #include "svga3d_shaderdefs.h"
16
17 struct src_register
18 {
19 SVGA3dShaderSrcToken base;
20 SVGA3dShaderSrcToken indirect;
21 };
22
23
24 struct svga_arl_consts
25 {
26 int number;
27 int idx;
28 int swizzle;
29 int arl_num;
30 };
31
32
33 /**
34 * This is the context/state used during TGSI->SVGA shader translation.
35 */
36 struct svga_shader_emitter
37 {
38 unsigned size;
39 char *buf;
40 char *ptr;
41
42 struct svga_compile_key key;
43 struct tgsi_shader_info info;
44 int unit;
45
46 int imm_start;
47
48 int nr_hw_float_const;
49 int nr_hw_int_const;
50 int nr_hw_temp;
51
52 int insn_offset;
53
54 int internal_temp_count;
55 int internal_imm_count;
56
57 int internal_color_idx[2]; /* diffuse, specular */
58 int internal_color_count;
59
60 bool emitted_vface;
61 bool emit_frontface;
62 int internal_frontface_idx;
63
64 int ps30_input_count;
65 int vs30_output_count;
66
67 int dynamic_branching_level;
68
69 unsigned num_output_writes;
70 bool constant_color_output;
71
72 bool in_main_func;
73
74 bool created_common_immediate;
75 int common_immediate_idx[2];
76
77 bool created_loop_const;
78 int loop_const_idx;
79
80 unsigned inverted_texcoords; /**< bitmask of which texcoords are flipped */
81 struct src_register ps_true_texcoord[PIPE_MAX_ATTRIBS];
82 struct src_register ps_inverted_texcoord[PIPE_MAX_ATTRIBS];
83 unsigned ps_inverted_texcoord_input[PIPE_MAX_ATTRIBS];
84
85 unsigned label[32];
86 unsigned nr_labels;
87
88 /** input/output register mappings, indexed by register number */
89 struct src_register input_map[PIPE_MAX_ATTRIBS];
90 SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
91
92 bool ps_reads_pos;
93 bool emitted_depth_fog;
94 struct src_register ps_true_pos;
95 struct src_register ps_depth_pos;
96 SVGA3dShaderDestToken ps_temp_pos;
97
98 /* shared input for depth and fog */
99 struct src_register ps_depth_fog;
100
101 struct src_register imm_0055;
102 SVGA3dShaderDestToken temp_pos;
103 SVGA3dShaderDestToken true_pos;
104 SVGA3dShaderDestToken depth_pos;
105
106 /* shared output for depth and fog */
107 SVGA3dShaderDestToken vs_depth_fog;
108
109 /* PS output colors (indexed by color semantic index) */
110 SVGA3dShaderDestToken temp_color_output[PIPE_MAX_COLOR_BUFS];
111 SVGA3dShaderDestToken true_color_output[PIPE_MAX_COLOR_BUFS];
112
113 SVGA3dShaderDestToken temp_psiz;
114 SVGA3dShaderDestToken true_psiz;
115
116 struct svga_arl_consts arl_consts[12];
117 int num_arl_consts;
118 int current_arl;
119
120 unsigned pstipple_sampler_unit;
121
122 int num_samplers;
123 uint8_t sampler_target[PIPE_MAX_SAMPLERS];
124 };
125
126
127 bool
128 svga_shader_emit_dword(struct svga_shader_emitter *emit, unsigned dword);
129
130 bool
131 svga_shader_emit_dwords(struct svga_shader_emitter *emit,
132 const unsigned *dwords, unsigned nr);
133
134 bool
135 svga_shader_emit_opcode(struct svga_shader_emitter *emit,
136 unsigned opcode);
137
138 bool
139 svga_shader_emit_instructions(struct svga_shader_emitter *emit,
140 const struct tgsi_token *tokens);
141
142 bool
143 svga_shader_emit_samplers_decl(struct svga_shader_emitter *emit);
144
145 bool
146 svga_translate_decl_sm30(struct svga_shader_emitter *emit,
147 const struct tgsi_full_declaration *decl);
148
149
150 #define TRANSLATE_SWIZZLE(x,y,z,w) ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
151 #define SWIZZLE_XYZW \
152 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
153 #define SWIZZLE_XXXX \
154 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
155 #define SWIZZLE_YYYY \
156 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
157 #define SWIZZLE_ZZZZ \
158 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
159 #define SWIZZLE_WWWW \
160 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
161
162
163 /** Emit the given SVGA3dShaderInstToken opcode */
164 static inline bool
emit_instruction(struct svga_shader_emitter * emit,SVGA3dShaderInstToken opcode)165 emit_instruction(struct svga_shader_emitter *emit,
166 SVGA3dShaderInstToken opcode)
167 {
168 return svga_shader_emit_opcode(emit, opcode.value);
169 }
170
171
172 /** Generate a SVGA3dShaderInstToken for the given SVGA3D shader opcode */
173 static inline SVGA3dShaderInstToken
inst_token(SVGA3dShaderOpCodeType opcode)174 inst_token(SVGA3dShaderOpCodeType opcode)
175 {
176 SVGA3dShaderInstToken inst;
177
178 inst.value = 0;
179 inst.op = opcode;
180
181 return inst;
182 }
183
184
185 /**
186 * Generate a SVGA3dShaderInstToken for the given SVGA3D shader opcode
187 * with the predication flag set.
188 */
189 static inline SVGA3dShaderInstToken
inst_token_predicated(SVGA3dShaderOpCodeType opcode)190 inst_token_predicated(SVGA3dShaderOpCodeType opcode)
191 {
192 SVGA3dShaderInstToken inst;
193
194 inst.value = 0;
195 inst.op = opcode;
196 inst.predicated = 1;
197
198 return inst;
199 }
200
201
202 /**
203 * Generate a SVGA3dShaderInstToken for a SETP instruction (set predicate)
204 * using the given comparison operator (one of SVGA3DOPCOMP_xx).
205 */
206 static inline SVGA3dShaderInstToken
inst_token_setp(SVGA3dShaderOpCodeCompFnType operator)207 inst_token_setp(SVGA3dShaderOpCodeCompFnType operator)
208 {
209 SVGA3dShaderInstToken inst;
210
211 inst.value = 0;
212 inst.op = SVGA3DOP_SETP;
213 inst.control = operator;
214
215 return inst;
216 }
217
218
219 /**
220 * Create an instance of a SVGA3dShaderDestToken.
221 * Note that this function is used to create tokens for output registers,
222 * temp registers AND constants (see emit_def_const()).
223 */
224 static inline SVGA3dShaderDestToken
dst_register(SVGA3dShaderRegType file,int number)225 dst_register(SVGA3dShaderRegType file, int number)
226 {
227 SVGA3dShaderDestToken dest;
228
229 /* check values against bitfield sizes */
230 assert(number < (1 << 11));
231 assert(file <= SVGA3DREG_PREDICATE);
232
233 dest.value = 0;
234 dest.num = number;
235 dest.type_upper = file >> 3;
236 dest.relAddr = 0;
237 dest.reserved1 = 0;
238 dest.mask = 0xf;
239 dest.dstMod = 0;
240 dest.shfScale = 0;
241 dest.type_lower = file & 0x7;
242 dest.reserved0 = 1; /* is_reg */
243
244 return dest;
245 }
246
247
248 /**
249 * Apply a writemask to the given SVGA3dShaderDestToken, returning a
250 * new SVGA3dShaderDestToken.
251 */
252 static inline SVGA3dShaderDestToken
writemask(SVGA3dShaderDestToken dest,unsigned mask)253 writemask(SVGA3dShaderDestToken dest, unsigned mask)
254 {
255 assert(dest.mask & mask);
256 dest.mask &= mask;
257 return dest;
258 }
259
260
261 /** Create a SVGA3dShaderSrcToken given a register file and number */
262 static inline SVGA3dShaderSrcToken
src_token(SVGA3dShaderRegType file,int number)263 src_token(SVGA3dShaderRegType file, int number)
264 {
265 SVGA3dShaderSrcToken src;
266
267 /* check values against bitfield sizes */
268 assert(number < (1 << 11));
269 assert(file <= SVGA3DREG_PREDICATE);
270
271 src.value = 0;
272 src.num = number;
273 src.type_upper = file >> 3;
274 src.relAddr = 0;
275 src.reserved1 = 0;
276 src.swizzle = SWIZZLE_XYZW;
277 src.srcMod = 0;
278 src.type_lower = file & 0x7;
279 src.reserved0 = 1; /* is_reg */
280
281 return src;
282 }
283
284
285 /** Create a src_register given a register file and register number */
286 static inline struct src_register
src_register(SVGA3dShaderRegType file,int number)287 src_register(SVGA3dShaderRegType file, int number)
288 {
289 struct src_register src;
290
291 src.base = src_token(file, number);
292 src.indirect.value = 0;
293
294 return src;
295 }
296
297 /** Translate src_register into SVGA3dShaderDestToken */
298 static inline SVGA3dShaderDestToken
dst(struct src_register src)299 dst(struct src_register src)
300 {
301 return dst_register(SVGA3dShaderGetRegType(src.base.value), src.base.num);
302 }
303
304
305 /** Translate SVGA3dShaderDestToken to a src_register */
306 static inline struct src_register
src(SVGA3dShaderDestToken dst)307 src(SVGA3dShaderDestToken dst)
308 {
309 return src_register(SVGA3dShaderGetRegType(dst.value), dst.num);
310 }
311
312 #endif
313