1 /*
2 * Copyright 2023 Advanced Micro Devices, Inc.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7 #include "si_utrace.h"
8 #include "si_perfetto.h"
9 #include "amd/common/ac_gpu_info.h"
10
11 #include "util/u_trace_gallium.h"
12 #include "util/hash_table.h"
13
14
si_utrace_record_ts(struct u_trace * trace,void * cs,void * timestamps,uint64_t offset_B,uint32_t flags)15 static void si_utrace_record_ts(struct u_trace *trace, void *cs, void *timestamps,
16 uint64_t offset_B, uint32_t flags)
17 {
18 struct si_context *ctx = container_of(trace, struct si_context, trace);
19 struct pipe_resource *buffer = timestamps;
20 struct si_resource *ts_bo = si_resource(buffer);
21
22 if (ctx->gfx_cs.current.buf == ctx->last_timestamp_cmd &&
23 ctx->gfx_cs.current.cdw == ctx->last_timestamp_cmd_cdw) {
24 uint64_t *ts = si_buffer_map(ctx, ts_bo, PIPE_MAP_READ) + offset_B;
25 *ts = U_TRACE_NO_TIMESTAMP;
26 return;
27 }
28
29 si_emit_ts(ctx, ts_bo, offset_B);
30 ctx->last_timestamp_cmd = ctx->gfx_cs.current.buf;
31 ctx->last_timestamp_cmd_cdw = ctx->gfx_cs.current.cdw;
32 }
33
si_utrace_read_ts(struct u_trace_context * utctx,void * timestamps,uint64_t offset_B,void * flush_data)34 static uint64_t si_utrace_read_ts(struct u_trace_context *utctx, void *timestamps,
35 uint64_t offset_B, void *flush_data)
36 {
37 struct si_context *ctx = container_of(utctx, struct si_context, ds.trace_context);
38 struct pipe_resource *buffer = timestamps;
39
40 uint64_t *ts = si_buffer_map(ctx, si_resource(buffer), PIPE_MAP_READ) + offset_B;
41
42 /* Don't translate the no-timestamp marker: */
43 if (*ts == U_TRACE_NO_TIMESTAMP)
44 return U_TRACE_NO_TIMESTAMP;
45
46 return (1000000 * *ts) / ctx->screen->info.clock_crystal_freq;
47 }
48
si_utrace_delete_flush_data(struct u_trace_context * utctx,void * flush_data)49 static void si_utrace_delete_flush_data(struct u_trace_context *utctx, void *flush_data)
50 {
51 free(flush_data);
52 }
53
si_utrace_init(struct si_context * sctx)54 void si_utrace_init(struct si_context *sctx)
55 {
56 char buf[64];
57 snprintf(buf, sizeof(buf), "%u:%u:%u:%u:%u", sctx->screen->info.pci.domain,
58 sctx->screen->info.pci.bus, sctx->screen->info.pci.dev,
59 sctx->screen->info.pci.func, sctx->screen->info.pci_id);
60 uint32_t gpu_id = _mesa_hash_string(buf);
61
62 si_ds_device_init(&sctx->ds, &sctx->screen->info, gpu_id, AMD_DS_API_OPENGL);
63 u_trace_pipe_context_init(&sctx->ds.trace_context, &sctx->b,
64 sizeof(uint64_t), 0, si_utrace_record_ts,
65 si_utrace_read_ts, NULL, NULL,
66 si_utrace_delete_flush_data);
67
68 si_ds_device_init_queue(&sctx->ds, &sctx->ds_queue, "%s", "render");
69 }
70
si_utrace_fini(struct si_context * sctx)71 void si_utrace_fini(struct si_context *sctx)
72 {
73 si_ds_device_fini(&sctx->ds);
74 }
75
si_utrace_flush(struct si_context * sctx,uint64_t submission_id)76 void si_utrace_flush(struct si_context *sctx, uint64_t submission_id)
77 {
78 struct si_ds_flush_data *flush_data = malloc(sizeof(*flush_data));
79 si_ds_flush_data_init(flush_data, &sctx->ds_queue, submission_id);
80 u_trace_flush(&sctx->trace, flush_data, U_TRACE_FRAME_UNKNOWN, false);
81 }
82