1 /*
2 * Copyright 2008 Corbin Simpson <[email protected]>
3 * SPDX-License-Identifier: MIT
4 */
5
6 #ifndef R300_CONTEXT_H
7 #define R300_CONTEXT_H
8
9 #define R300_BUFFER_ALIGNMENT 64
10
11 #include "draw/draw_vertex.h"
12
13 #include "util/u_blitter.h"
14
15 #include "pipe/p_context.h"
16 #include "util/u_inlines.h"
17 #include "util/u_transfer.h"
18
19 #include "r300_defines.h"
20 #include "r300_screen.h"
21 #include "compiler/radeon_regalloc.h"
22 #include "compiler/radeon_code.h"
23
24 struct u_upload_mgr;
25 struct r300_context;
26 struct r300_fragment_shader;
27 struct r300_vertex_shader;
28 struct r300_stencilref_context;
29
30 enum colormask_swizzle {
31 COLORMASK_BGRA,
32 COLORMASK_RGBA,
33 COLORMASK_RRRR,
34 COLORMASK_AAAA,
35 COLORMASK_GRRG,
36 COLORMASK_ARRA,
37 COLORMASK_BGRX,
38 COLORMASK_RGBX,
39 COLORMASK_NUM_SWIZZLES
40 };
41
42 struct r300_atom {
43 /* Name, for debugging. */
44 const char* name;
45 /* Opaque state. */
46 void* state;
47 /* Emit the state to the context. */
48 void (*emit)(struct r300_context*, unsigned, void*);
49 /* Upper bound on number of dwords to emit. */
50 unsigned size;
51 /* Whether this atom should be emitted. */
52 bool dirty;
53 /* Whether this atom may be emitted with state == NULL. */
54 bool allow_null_state;
55 };
56
57 struct r300_aa_state {
58 struct r300_surface *dest;
59
60 uint32_t aa_config;
61 };
62
63 struct r300_blend_state {
64 struct pipe_blend_state state;
65
66 uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8];
67 uint32_t cb_noclamp[8];
68 uint32_t cb_noclamp_noalpha[8];
69 uint32_t cb_no_readwrite[8];
70 };
71
72 struct r300_blend_color_state {
73 struct pipe_blend_color state;
74 uint32_t cb[3];
75 };
76
77 struct r300_clip_state {
78 uint32_t cb[29];
79 };
80
81 struct r300_dsa_state {
82 struct pipe_depth_stencil_alpha_state dsa;
83
84 /* This is actually a command buffer with named dwords. */
85 uint32_t cb_begin;
86 uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */
87 uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
88 uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */
89 uint32_t cb_reg;
90 uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
91 uint32_t cb_reg1;
92 uint32_t alpha_value; /* R500_FG_ALPHA_VALUE: 0x4be0 */
93
94 /* Same, but without ZB reads and writes. */
95 uint32_t cb_zb_no_readwrite[8]; /* ZB not bound */
96
97 /* Emitted separately: */
98 uint32_t alpha_function;
99
100 /* Whether a two-sided stencil is enabled. */
101 bool two_sided;
102 /* Whether a fallback should be used for a two-sided stencil ref value. */
103 bool two_sided_stencil_ref;
104 };
105
106 struct r300_hyperz_state {
107 int flush;
108 /* This is actually a command buffer with named dwords. */
109 uint32_t cb_flush_begin;
110 uint32_t zb_zcache_ctlstat; /* R300_ZB_CACHE_CNTL */
111 uint32_t cb_begin;
112 uint32_t zb_bw_cntl; /* R300_ZB_BW_CNTL */
113 uint32_t cb_reg1;
114 uint32_t zb_depthclearvalue; /* R300_ZB_DEPTHCLEARVALUE */
115 uint32_t cb_reg2;
116 uint32_t sc_hyperz; /* R300_SC_HYPERZ */
117 uint32_t cb_reg3;
118 uint32_t gb_z_peq_config; /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
119 };
120
121 struct r300_gpu_flush {
122 uint32_t cb_flush_clean[6];
123 };
124
125 #define RS_STATE_MAIN_SIZE 27
126
127 struct r300_rs_state {
128 /* Original rasterizer state. */
129 struct pipe_rasterizer_state rs;
130 /* Draw-specific rasterizer state. */
131 struct pipe_rasterizer_state rs_draw;
132
133 /* Command buffers. */
134 uint32_t cb_main[RS_STATE_MAIN_SIZE];
135 uint32_t cb_poly_offset_zb16[5];
136 uint32_t cb_poly_offset_zb24[5];
137
138 /* The index to cb_main where the cull_mode register value resides. */
139 unsigned cull_mode_index;
140
141 /* Whether polygon offset is enabled. */
142 bool polygon_offset_enable;
143
144 /* This is emitted in the draw function. */
145 uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */
146 };
147
148 struct r300_rs_block {
149 uint32_t vap_vtx_state_cntl; /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
150 uint32_t vap_vsm_vtx_assm; /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
151 uint32_t vap_out_vtx_fmt[2]; /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
152 uint32_t gb_enable;
153
154 uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
155 uint32_t count; /* R300_RS_COUNT */
156 uint32_t inst_count; /* R300_RS_INST_COUNT */
157 uint32_t inst[8]; /* R300_RS_INST_[0-7] */
158 };
159
160 struct r300_sampler_state {
161 struct pipe_sampler_state state;
162
163 uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
164 uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
165
166 /* Min/max LOD must be clamped to [0, last_level], thus
167 * it's dependent on a currently bound texture */
168 unsigned min_lod, max_lod;
169 };
170
171 struct r300_texture_format_state {
172 uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
173 uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
174 uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
175 uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
176 uint32_t us_format0; /* R500_US_FORMAT0_0: 0x4640 (through 15) */
177 };
178
179 struct r300_sampler_view {
180 struct pipe_sampler_view base;
181
182 /* For resource_copy_region. */
183 unsigned width0_override;
184 unsigned height0_override;
185
186 /* Swizzles in the PIPE_SWIZZLE_* representation,
187 * derived from base. */
188 unsigned char swizzle[4];
189
190 /* Copy of r300_texture::texture_format_state with format-specific bits
191 * added. */
192 struct r300_texture_format_state format;
193
194 /* The texture cache region for this texture. */
195 uint32_t texcache_region;
196 };
197
198 struct r300_texture_sampler_state {
199 struct r300_texture_format_state format;
200 uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
201 uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
202 uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
203 };
204
205 struct r300_textures_state {
206 /* Textures. */
207 struct r300_sampler_view *sampler_views[16];
208 int sampler_view_count;
209 /* Sampler states. */
210 struct r300_sampler_state *sampler_states[16];
211 int sampler_state_count;
212
213 /* This is the merge of the texture and sampler states. */
214 unsigned count;
215 uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */
216 struct r300_texture_sampler_state regs[16];
217 };
218
219 struct r300_vertex_stream_state {
220 /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
221 uint32_t vap_prog_stream_cntl[8];
222 /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
223 uint32_t vap_prog_stream_cntl_ext[8];
224
225 unsigned count;
226 };
227
228 struct r300_invariant_state {
229 uint32_t cb[24];
230 };
231
232 struct r300_vap_invariant_state {
233 uint32_t cb[11];
234 };
235
236 struct r300_viewport_state {
237 float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */
238 float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */
239 float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */
240 float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
241 float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */
242 float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
243 uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */
244 };
245
246 struct r300_ztop_state {
247 uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */
248 };
249
250 /* The next several objects are not pure Radeon state; they inherit from
251 * various Gallium classes. */
252
253 struct r300_constant_buffer {
254 /* Buffer of constants */
255 uint32_t *ptr;
256 /* Remapping table. */
257 struct const_remap *remap_table;
258 /* const buffer base */
259 uint32_t buffer_base;
260 };
261
262 /* Query object.
263 *
264 * This is not a subclass of pipe_query because pipe_query is never
265 * actually fully defined. So, rather than have it as a member, and do
266 * subclass-style casting, we treat pipe_query as an opaque, and just
267 * trust that our gallium frontend does not ever mess up query objects.
268 */
269 struct r300_query {
270 /* The kind of query. Currently only OQ is supported. */
271 unsigned type;
272 /* The number of pipes where query results are stored. */
273 unsigned num_pipes;
274 /* How many results have been written, in dwords. It's incremented
275 * after end_query and flush. */
276 unsigned num_results;
277 /* if begin has been emitted */
278 bool begin_emitted;
279
280 /* The buffer where query results are stored. */
281 struct pb_buffer_lean *buf;
282 };
283
284 struct r300_surface {
285 struct pipe_surface base;
286
287 /* Winsys buffer backing the texture. */
288 struct pb_buffer_lean *buf;
289
290 enum radeon_bo_domain domain;
291
292 uint32_t offset; /* COLOROFFSET or DEPTHOFFSET. */
293 uint32_t pitch; /* COLORPITCH or DEPTHPITCH. */
294 uint32_t pitch_zmask; /* ZMASK_PITCH */
295 uint32_t pitch_hiz; /* HIZ_PITCH */
296 uint32_t pitch_cmask; /* CMASK_PITCH */
297 uint32_t format; /* US_OUT_FMT or ZB_FORMAT. */
298
299 /* Parameters dedicated to the CBZB clear. */
300 uint32_t cbzb_width; /* Aligned width. */
301 uint32_t cbzb_height; /* Half of the height. */
302 uint32_t cbzb_midpoint_offset; /* DEPTHOFFSET. */
303 uint32_t cbzb_pitch; /* DEPTHPITCH. */
304 uint32_t cbzb_format; /* ZB_FORMAT. */
305
306 /* Whether the CBZB clear is allowed on the surface. */
307 bool cbzb_allowed;
308
309 unsigned colormask_swizzle;
310 };
311
312 struct r300_texture_desc {
313 /* Width, height, and depth.
314 * Most of the time, these are equal to pipe_texture::width0, height0,
315 * and depth0. However, NPOT 3D textures must have dimensions aligned
316 * to POT, and this is the only case when these variables differ from
317 * pipe_texture. */
318 unsigned width0, height0, depth0;
319
320 /* Buffer tiling.
321 * Macrotiling is specified per-level because small mipmaps cannot
322 * be macrotiled. */
323 enum radeon_bo_layout microtile;
324 enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];
325
326 /* Offsets into the buffer. */
327 unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];
328
329 /* Strides for each mip-level. */
330 unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];
331
332 /* Size of one zslice or face or 2D image based on the texture target. */
333 unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];
334
335 /* Total size of this texture, in bytes,
336 * derived from the texture properties. */
337 unsigned size_in_bytes;
338
339 /**
340 * If non-zero, override the natural texture layout with
341 * a custom stride (in bytes).
342 *
343 * \note Mipmapping fails for textures with a non-natural layout!
344 *
345 * \sa r300_texture_get_stride
346 */
347 unsigned stride_in_bytes_override;
348
349 /* Whether this texture has non-power-of-two dimensions.
350 * It can be either a regular texture or a rectangle one. */
351 bool is_npot;
352
353 /* This flag says that hardware must use the stride for addressing
354 * instead of the width. */
355 bool uses_stride_addressing;
356
357 /* Whether CBZB fast color clear is allowed on the miplevel. */
358 bool cbzb_allowed[R300_MAX_TEXTURE_LEVELS];
359
360 /* Zbuffer compression info for each miplevel. */
361 bool zcomp8x8[R300_MAX_TEXTURE_LEVELS];
362 /* If zero, then disable Z compression/HiZ. */
363 unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];
364 unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];
365 /* Zmask/HiZ strides for each miplevel. */
366 unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
367 unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
368
369 /* CMASK info for AA buffers (no mipmapping). */
370 unsigned cmask_dwords;
371 unsigned cmask_stride_in_pixels;
372 };
373
374 struct r300_resource
375 {
376 struct pipe_resource b;
377
378 /* Winsys buffer backing this resource. */
379 struct pb_buffer_lean *buf;
380 enum radeon_bo_domain domain;
381
382 /* Constant buffers and SWTCL vertex and index buffers are in user
383 * memory. */
384 uint8_t *malloced_buffer;
385
386 /* Texture description (addressing, layout, special features). */
387 struct r300_texture_desc tex;
388
389 /* This is the level tiling flags were last time set for.
390 * It's used to prevent redundant tiling-flags changes from happening.*/
391 unsigned surface_level;
392 };
393
394 struct r300_vertex_element_state {
395 unsigned count;
396 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
397 unsigned format_size[PIPE_MAX_ATTRIBS];
398
399 /* The size of the vertex, in dwords. */
400 unsigned vertex_size_dwords;
401
402 struct r300_vertex_stream_state vertex_stream;
403 };
404
405 enum r300_hiz_func {
406 HIZ_FUNC_NONE,
407
408 /* The function, when determined, is set in stone
409 * until the next HiZ clear. */
410
411 /* MAX is written to the HiZ buffer.
412 * Used for LESS, LEQUAL. */
413 HIZ_FUNC_MAX,
414
415 /* MIN is written to the HiZ buffer.
416 * Used for GREATER, GEQUAL. */
417 HIZ_FUNC_MIN,
418 };
419
420 /* For deferred fragment shader state validation. */
421 enum r300_fs_validity_status {
422 FRAGMENT_SHADER_VALID, /* No need to change/validate the FS. */
423 FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */
424 FRAGMENT_SHADER_DIRTY /* Always validate the FS (if the FS was changed) */
425 };
426
427 struct r300_context {
428 /* Parent class */
429 struct pipe_context context;
430
431 /* The interface to the windowing system, etc. */
432 struct radeon_winsys *rws;
433 /* The submission context. */
434 struct radeon_winsys_ctx *ctx;
435 /* The command stream. */
436 struct radeon_cmdbuf cs;
437 /* Screen. */
438 struct r300_screen *screen;
439
440 /* Draw module. Used mostly for SW TCL. */
441 struct draw_context* draw;
442 /* Vertex buffer for SW TCL. */
443 struct pb_buffer_lean *vbo;
444 /* Offset and size into the SW TCL VBO. */
445 size_t draw_vbo_offset;
446
447 /* Accelerated blit support. */
448 struct blitter_context* blitter;
449 /* Stencil two-sided reference value fallback. */
450 struct r300_stencilref_context *stencilref_fallback;
451
452 /* The KIL opcode needs the first texture unit to be enabled
453 * on r3xx-r4xx. In order to calm down the CS checker, we bind this
454 * dummy texture there. */
455 struct r300_sampler_view *texkill_sampler;
456
457 /* When no vertex buffer is set, this one is used instead to prevent
458 * hardlocks. */
459 struct pipe_vertex_buffer dummy_vb;
460
461 /* The currently active query. */
462 struct r300_query *query_current;
463 /* The saved query for blitter operations. */
464 struct r300_query *blitter_saved_query;
465 /* Query list. */
466 struct r300_query query_list;
467
468 /* Various CSO state objects. */
469
470 /* Each atom is emitted in the order it appears here, which can affect
471 * performance and stability if not handled with care. */
472 /* GPU flush. */
473 struct r300_atom gpu_flush;
474 /* Clears must be emitted immediately after the flush. */
475 /* HiZ clear */
476 struct r300_atom hiz_clear;
477 /* zmask clear */
478 struct r300_atom zmask_clear;
479 /* cmask clear */
480 struct r300_atom cmask_clear;
481 /* Anti-aliasing (MSAA) state. */
482 struct r300_atom aa_state;
483 /* Framebuffer state. */
484 struct r300_atom fb_state;
485 /* HyperZ state (various SC/ZB bits). */
486 struct r300_atom hyperz_state;
487 /* ZTOP state. */
488 struct r300_atom ztop_state;
489 /* Depth, stencil, and alpha state. */
490 struct r300_atom dsa_state;
491 /* Blend state. */
492 struct r300_atom blend_state;
493 /* Blend color state. */
494 struct r300_atom blend_color_state;
495 /* Scissor state. */
496 struct r300_atom scissor_state;
497 /* Sample mask. */
498 struct r300_atom sample_mask;
499 /* Invariant state. This must be emitted to get the engine started. */
500 struct r300_atom invariant_state;
501 /* Viewport state. */
502 struct r300_atom viewport_state;
503 /* PVS flush. */
504 struct r300_atom pvs_flush;
505 /* VAP invariant state. */
506 struct r300_atom vap_invariant_state;
507 /* Vertex stream formatting state. */
508 struct r300_atom vertex_stream_state;
509 /* Vertex shader. */
510 struct r300_atom vs_state;
511 /* User clip planes. */
512 struct r300_atom clip_state;
513 /* RS block state + VAP (vertex shader) output mapping state. */
514 struct r300_atom rs_block_state;
515 /* Rasterizer state. */
516 struct r300_atom rs_state;
517 /* Framebuffer state (pipelined regs). */
518 struct r300_atom fb_state_pipelined;
519 /* Fragment shader. */
520 struct r300_atom fs;
521 /* Fragment shader RC_CONSTANT_STATE variables. */
522 struct r300_atom fs_rc_constant_state;
523 /* Fragment shader constant buffer. */
524 struct r300_atom fs_constants;
525 /* Vertex shader constant buffer. */
526 struct r300_atom vs_constants;
527 /* Texture cache invalidate. */
528 struct r300_atom texture_cache_inval;
529 /* Textures state. */
530 struct r300_atom textures_state;
531 /* Occlusion query. */
532 struct r300_atom query_start;
533
534 /* The pointers to the first and the last atom. */
535 struct r300_atom *first_dirty, *last_dirty;
536
537 /* Vertex elements for Gallium. */
538 struct r300_vertex_element_state *velems;
539
540 /* Vertex info for Draw. */
541 struct vertex_info vertex_info;
542
543 struct pipe_stencil_ref stencil_ref;
544 struct pipe_viewport_state viewport;
545
546 /* Stream locations for SWTCL. */
547 int stream_loc_notcl[16];
548
549 /* Flag indicating whether or not the HW is dirty. */
550 uint32_t dirty_hw;
551 /* Whether polygon offset is enabled. */
552 bool polygon_offset_enabled;
553 /* Z buffer bit depth. */
554 uint32_t zbuffer_bpp;
555 /* Whether rendering is conditional and should be skipped. */
556 bool skip_rendering;
557 /* The flag above saved by blitter. */
558 unsigned char blitter_saved_skip_rendering;
559 /* Point sprites texcoord index, 1 bit per texcoord */
560 int sprite_coord_enable;
561 /* Whether we are drawing points, to disable sprite coord if not */
562 bool is_point;
563 /* Whether two-sided color selection is enabled (AKA light_twoside). */
564 bool two_sided_color;
565 bool flatshade;
566 bool clip_halfz;
567 /* Whether fast color clear is enabled. */
568 bool cbzb_clear;
569 /* Whether fragment shader needs to be validated. */
570 enum r300_fs_validity_status fs_status;
571 /* Framebuffer multi-write. */
572 bool fb_multiwrite;
573 unsigned num_samples;
574 bool msaa_enable;
575 bool alpha_to_one;
576 bool alpha_to_coverage;
577
578 void *dsa_decompress_zmask;
579
580 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
581 unsigned nr_vertex_buffers;
582 struct u_upload_mgr *uploader;
583
584 struct slab_child_pool pool_transfers;
585
586 /* Stat counter. */
587 uint64_t flush_counter;
588
589 /* const tracking for VS */
590 int vs_const_base;
591
592 /* Vertex array state info */
593 bool vertex_arrays_dirty;
594 bool vertex_arrays_indexed;
595 int vertex_arrays_offset;
596 int vertex_arrays_instance_id;
597 bool instancing_enabled;
598
599 /* Hyper-Z stats. */
600 bool hyperz_enabled; /* Whether it owns Hyper-Z access. */
601 int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */
602 unsigned num_z_clears; /* Since the last flush. */
603
604 /* ZMask state. */
605 bool zmask_in_use; /* Whether ZMASK is enabled. */
606 bool zmask_decompress; /* Whether ZMASK is being decompressed. */
607 struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */
608
609 /* HiZ state. */
610 bool hiz_in_use; /* Whether HIZ is enabled. */
611 enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */
612 uint32_t hiz_clear_value; /* HiZ clear value. */
613
614 /* CMASK state. */
615 bool cmask_access;
616 bool cmask_in_use;
617 uint32_t color_clear_value; /* RGBA8 or RGBA1010102 */
618 uint32_t color_clear_value_ar; /* RGBA16F */
619 uint32_t color_clear_value_gb; /* RGBA16F */
620
621 /* Compiler state. */
622 struct rc_regalloc_state fs_regalloc_state; /* Register allocator info for
623 * fragment shaders. */
624 struct rc_regalloc_state vs_regalloc_state; /* Register allocator info for
625 * vertex shaders. */
626 };
627
628 #define foreach_atom(r300, atom) \
629 for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
630
631 #define foreach_dirty_atom(r300, atom) \
632 for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
633
634 /* Convenience cast wrappers. */
r300_query(struct pipe_query * q)635 static inline struct r300_query* r300_query(struct pipe_query* q)
636 {
637 return (struct r300_query*)q;
638 }
639
r300_surface(struct pipe_surface * surf)640 static inline struct r300_surface* r300_surface(struct pipe_surface* surf)
641 {
642 return (struct r300_surface*)surf;
643 }
644
r300_resource(struct pipe_resource * tex)645 static inline struct r300_resource* r300_resource(struct pipe_resource* tex)
646 {
647 return (struct r300_resource*)tex;
648 }
649
r300_context(struct pipe_context * context)650 static inline struct r300_context* r300_context(struct pipe_context* context)
651 {
652 return (struct r300_context*)context;
653 }
654
r300_fs(struct r300_context * r300)655 static inline struct r300_fragment_shader *r300_fs(struct r300_context *r300)
656 {
657 return (struct r300_fragment_shader*)r300->fs.state;
658 }
659
r300_vs(struct r300_context * r300)660 static inline struct r300_vertex_shader *r300_vs(struct r300_context *r300)
661 {
662 return (struct r300_vertex_shader*)r300->vs_state.state;
663 }
664
r300_mark_atom_dirty(struct r300_context * r300,struct r300_atom * atom)665 static inline void r300_mark_atom_dirty(struct r300_context *r300,
666 struct r300_atom *atom)
667 {
668 atom->dirty = true;
669
670 if (!r300->first_dirty) {
671 r300->first_dirty = atom;
672 r300->last_dirty = atom+1;
673 } else {
674 if (atom < r300->first_dirty)
675 r300->first_dirty = atom;
676 else if (atom+1 > r300->last_dirty)
677 r300->last_dirty = atom+1;
678 }
679 }
680
681 static inline struct pipe_surface *
r300_get_nonnull_cb(struct pipe_framebuffer_state * fb,unsigned i)682 r300_get_nonnull_cb(struct pipe_framebuffer_state *fb, unsigned i)
683 {
684 if (fb->cbufs[i])
685 return fb->cbufs[i];
686
687 /* The i-th framebuffer is NULL, return any non-NULL one. */
688 for (i = 0; i < fb->nr_cbufs; i++)
689 if (fb->cbufs[i])
690 return fb->cbufs[i];
691
692 return NULL;
693 }
694
695 struct pipe_context* r300_create_context(struct pipe_screen* screen,
696 void *priv, unsigned flags);
697
698 /* Context initialization. */
699 struct draw_stage* r300_draw_stage(struct r300_context* r300);
700 void r300_init_blit_functions(struct r300_context *r300);
701 void r300_init_flush_functions(struct r300_context* r300);
702 void r300_init_query_functions(struct r300_context* r300);
703 void r300_init_render_functions(struct r300_context *r300);
704 void r300_init_state_functions(struct r300_context* r300);
705 void r300_init_resource_functions(struct r300_context* r300);
706
707 /* r300_blit.c */
708 void r300_decompress_zmask(struct r300_context *r300);
709 void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);
710 void r300_decompress_zmask_locked(struct r300_context *r300);
711 bool r300_is_blit_supported(enum pipe_format format);
712
713 /* r300_flush.c */
714 void r300_flush(struct pipe_context *pipe,
715 unsigned flags,
716 struct pipe_fence_handle **fence);
717
718 /* r300_hyperz.c */
719 void r300_update_hyperz_state(struct r300_context* r300);
720
721 /* r300_query.c */
722 void r300_resume_query(struct r300_context *r300,
723 struct r300_query *query);
724 void r300_stop_query(struct r300_context *r300);
725
726 /* r300_render_translate.c */
727 void r300_translate_index_buffer(struct r300_context *r300,
728 const struct pipe_draw_info *info,
729 struct pipe_resource **out_index_buffer,
730 unsigned *index_size, unsigned index_offset,
731 unsigned *start, unsigned count,
732 const uint8_t **export_ptr);
733
734 /* r300_render_stencilref.c */
735 void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);
736
737 /* r300_render.c */
738 void r500_emit_index_bias(struct r300_context *r300, int index_bias);
739 void r300_blitter_draw_rectangle(struct blitter_context *blitter,
740 void *vertex_elements_cso,
741 blitter_get_vs_func get_vs,
742 int x1, int y1, int x2, int y2,
743 float depth, unsigned num_instances,
744 enum blitter_attrib_type type,
745 const union blitter_attrib *attrib);
746
747 /* r300_state.c */
748 enum r300_fb_state_change {
749 R300_CHANGED_FB_STATE = 0,
750 R300_CHANGED_HYPERZ_FLAG,
751 R300_CHANGED_MULTIWRITE,
752 R300_CHANGED_CMASK_ENABLE,
753 };
754
755 void r300_mark_fb_state_dirty(struct r300_context *r300,
756 enum r300_fb_state_change change);
757 void r300_mark_fs_code_dirty(struct r300_context *r300);
758
759 struct pipe_sampler_view *
760 r300_create_sampler_view_custom(struct pipe_context *pipe,
761 struct pipe_resource *texture,
762 const struct pipe_sampler_view *templ,
763 unsigned width0_override,
764 unsigned height0_override);
765
766 /* r300_state_derived.c */
767 void r300_update_derived_state(struct r300_context* r300);
768
769 /* r300_debug.c */
770 void r500_dump_rs_block(struct r300_rs_block *rs);
771
772
CTX_DBG_ON(struct r300_context * ctx,unsigned flags)773 static inline bool CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
774 {
775 return SCREEN_DBG_ON(ctx->screen, flags);
776 }
777
CTX_DBG(struct r300_context * ctx,unsigned flags,const char * fmt,...)778 static inline void CTX_DBG(struct r300_context * ctx, unsigned flags,
779 const char * fmt, ...)
780 {
781 if (CTX_DBG_ON(ctx, flags)) {
782 va_list va;
783 va_start(va, fmt);
784 vfprintf(stderr, fmt, va);
785 va_end(va);
786 }
787 }
788
789 #define DBG_ON CTX_DBG_ON
790 #define DBG CTX_DBG
791
792 #endif /* R300_CONTEXT_H */
793