xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/iris/iris_genx_macros.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2019 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included
12  * in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20  * DEALINGS IN THE SOFTWARE.
21  */
22 
23 /**
24  * Macro and function definitions needed in order to use genxml.
25  *
26  * This should only be included in sources compiled per-generation.
27  */
28 
29 #include "iris_batch.h"
30 
31 #define __gen_address_type struct iris_address
32 #define __gen_user_data struct iris_batch
33 #define __gen_combine_address iris_combine_address
34 #define __gen_get_write_fencing_status(b) (&(b)->write_fence_status)
35 
36 static inline void *
__gen_get_batch_dwords(struct iris_batch * batch,unsigned dwords)37 __gen_get_batch_dwords(struct iris_batch *batch, unsigned dwords)
38 {
39    return iris_get_command_space(batch, dwords * sizeof(uint32_t));
40 }
41 
42 static inline struct iris_address
__gen_address_offset(struct iris_address addr,uint64_t offset)43 __gen_address_offset(struct iris_address addr, uint64_t offset)
44 {
45    addr.offset += offset;
46    return addr;
47 }
48 
49 static uint64_t
__gen_combine_address(struct iris_batch * batch,void * location,struct iris_address addr,uint32_t delta)50 __gen_combine_address(struct iris_batch *batch, void *location,
51                       struct iris_address addr, uint32_t delta)
52 {
53    uint64_t result = addr.offset + delta;
54 
55    if (addr.bo) {
56       iris_use_pinned_bo(batch, addr.bo,
57                          !iris_domain_is_read_only(addr.access), addr.access);
58       /* Assume this is a general address, not relative to a base. */
59       result += addr.bo->address;
60    }
61 
62    return result;
63 }
64 
65 static inline struct iris_address
__gen_get_batch_address(struct iris_batch * batch,void * location)66 __gen_get_batch_address(struct iris_batch *batch, void *location)
67 {
68    unreachable("Not supported by iris");
69 }
70 
71 #define __gen_address_type struct iris_address
72 #define __gen_user_data struct iris_batch
73 
74 #define __genxml_cmd_length(cmd) cmd ## _length
75 #define __genxml_cmd_length_bias(cmd) cmd ## _length_bias
76 #define __genxml_cmd_header(cmd) cmd ## _header
77 #define __genxml_cmd_pack(cmd) cmd ## _pack
78 #define __genxml_reg_num(cmd) cmd ## _num
79 
80 #include "genxml/genX_pack.h"
81 #include "genxml/gen_macros.h"
82 #include "genxml/genX_bits.h"
83 
84 #if GFX_VER >= 11 && GFX_VERx10 < 125
85 #define IRIS_BT_OFFSET_SHIFT 3
86 #else
87 #define IRIS_BT_OFFSET_SHIFT 0
88 #endif
89 
90 /* CS_GPR(15) is reserved for combining conditional rendering predicates
91  * with GL_ARB_indirect_parameters draw number predicates.
92  */
93 #define MI_BUILDER_NUM_ALLOC_GPRS 15
94 #include "common/mi_builder.h"
95 
96 #define _iris_pack_command(batch, cmd, dst, name)                 \
97    for (struct cmd name = { __genxml_cmd_header(cmd) },           \
98         *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
99         ({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name);    \
100            _dst = NULL;                                           \
101            }))
102 
103 #define iris_pack_command(cmd, dst, name) \
104    _iris_pack_command(NULL, cmd, dst, name)
105 
106 #define _iris_pack_state(batch, cmd, dst, name)                   \
107    for (struct cmd name = {},                                     \
108         *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
109         __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name),       \
110         _dst = NULL)
111 
112 #define iris_pack_state(cmd, dst, name)                           \
113    _iris_pack_state(NULL, cmd, dst, name)
114 
115 #define iris_emit_cmd(batch, cmd, name) \
116    _iris_pack_command(batch, cmd, __gen_get_batch_dwords(batch, __genxml_cmd_length(cmd)), name)
117 
118 #define iris_emit_dwords(batch, n) \
119    __gen_get_batch_dwords(batch, n)
120 
121 #define iris_emit_merge(batch, dwords0, dwords1, num_dwords)    \
122    do {                                                         \
123       uint32_t *dw = __gen_get_batch_dwords(batch, num_dwords); \
124       for (uint32_t i = 0; i < num_dwords; i++)                 \
125          dw[i] = (dwords0)[i] | (dwords1)[i];                   \
126       VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords));        \
127    } while (0)
128 
129 #define iris_emit_reg(batch, reg, name)                                 \
130    for (struct reg name = {}, *_cont = (struct reg *)1; _cont != NULL;  \
131         ({                                                              \
132             uint32_t _dw[__genxml_cmd_length(reg)];                     \
133             __genxml_cmd_pack(reg)(NULL, _dw, &name);                   \
134             for (unsigned i = 0; i < __genxml_cmd_length(reg); i++) {   \
135                iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_IMM), lri) {  \
136                   lri.RegisterOffset   = __genxml_reg_num(reg);         \
137                   lri.DataDWord        = _dw[i];                        \
138                }                                                        \
139             }                                                           \
140            _cont = NULL;                                                \
141          }))
142 
143 
144 /**
145  * iris_address constructor helpers:
146  *
147  * When using these to construct a CSO, pass NULL for \p bo, and manually
148  * pin the BO later.  Otherwise, genxml's address handling will add the
149  * BO to the current batch's validation list at CSO creation time, rather
150  * than at draw time as desired.
151  */
152 
153 UNUSED static struct iris_address
ro_bo(struct iris_bo * bo,uint64_t offset)154 ro_bo(struct iris_bo *bo, uint64_t offset)
155 {
156    return (struct iris_address) { .bo = bo, .offset = offset,
157                                   .access = IRIS_DOMAIN_OTHER_READ };
158 }
159 
160 UNUSED static struct iris_address
rw_bo(struct iris_bo * bo,uint64_t offset,enum iris_domain access)161 rw_bo(struct iris_bo *bo, uint64_t offset, enum iris_domain access)
162 {
163    return (struct iris_address) { .bo = bo, .offset = offset,
164                                   .access = access };
165 }
166 
167 UNUSED static struct iris_address
iris_address_add(struct iris_address addr,uint64_t offset)168 iris_address_add(struct iris_address addr, uint64_t offset)
169 {
170    addr.offset += offset;
171    return addr;
172 }
173