1 /*
2 * Copyright © 2016 Rob Clark <[email protected]>
3 * SPDX-License-Identifier: MIT
4 *
5 * Authors:
6 * Rob Clark <[email protected]>
7 */
8
9 #ifndef FD5_DRAW_H_
10 #define FD5_DRAW_H_
11
12 #include "pipe/p_context.h"
13
14 #include "freedreno_draw.h"
15
16 #include "fd5_context.h"
17 #include "fd5_screen.h"
18
19 /* some bits in common w/ a4xx: */
20 #include "a4xx/fd4_draw.h"
21
22 void fd5_draw_init(struct pipe_context *pctx);
23
24 static inline void
fd5_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t max_indices,uint32_t idx_offset,struct pipe_resource * idx_buffer)25 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
26 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
27 enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances,
28 enum a4xx_index_size idx_type, uint32_t max_indices,
29 uint32_t idx_offset, struct pipe_resource *idx_buffer)
30 {
31 /* for debug after a lock up, write a unique counter value
32 * to scratch7 for each draw, to make it easier to match up
33 * register dumps to cmdstream. The combination of IB
34 * (scratch6) and DRAW is enough to "triangulate" the
35 * particular draw that caused lockup.
36 */
37 emit_marker5(ring, 7);
38
39 OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
40 if (vismode == USE_VISIBILITY) {
41 /* leave vis mode blank for now, it will be patched up when
42 * we know if we are binning or not
43 */
44 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
45 &batch->draw_patches);
46 } else {
47 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
48 }
49 OUT_RING(ring, instances); /* NumInstances */
50 OUT_RING(ring, count); /* NumIndices */
51 if (idx_buffer) {
52 OUT_RING(ring, 0x0); /* XXX */
53 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
54 OUT_RING(ring, max_indices);
55 }
56
57 emit_marker5(ring, 7);
58
59 fd_reset_wfi(batch);
60 }
61
62 static inline void
fd5_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,const struct pipe_draw_indirect_info * indirect,const struct pipe_draw_start_count_bias * draw,unsigned index_offset)63 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
64 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
65 const struct pipe_draw_info *info,
66 const struct pipe_draw_indirect_info *indirect,
67 const struct pipe_draw_start_count_bias *draw, unsigned index_offset)
68 {
69 struct pipe_resource *idx_buffer = NULL;
70 enum a4xx_index_size idx_type;
71 enum pc_di_src_sel src_sel;
72 uint32_t max_indices, idx_offset;
73
74 if (indirect && indirect->buffer) {
75 struct fd_resource *ind = fd_resource(indirect->buffer);
76
77 emit_marker5(ring, 7);
78
79 if (info->index_size) {
80 struct pipe_resource *idx = info->index.resource;
81 max_indices = idx->width0 / info->index_size;
82
83 OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
84 OUT_RINGP(ring,
85 DRAW4(primtype, DI_SRC_SEL_DMA,
86 fd4_size2indextype(info->index_size), 0),
87 &batch->draw_patches);
88 OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
89 OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indices));
90 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
91 } else {
92 OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
93 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
94 &batch->draw_patches);
95 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
96 }
97
98 emit_marker5(ring, 7);
99 fd_reset_wfi(batch);
100
101 return;
102 }
103
104 if (info->index_size) {
105 assert(!info->has_user_indices);
106
107 idx_buffer = info->index.resource;
108 idx_type = fd4_size2indextype(info->index_size);
109 max_indices = idx_buffer->width0 / info->index_size;
110 idx_offset = index_offset + draw->start * info->index_size;
111 src_sel = DI_SRC_SEL_DMA;
112 } else {
113 idx_buffer = NULL;
114 idx_type = INDEX4_SIZE_32_BIT;
115 max_indices = 0;
116 idx_offset = 0;
117 src_sel = DI_SRC_SEL_AUTO_INDEX;
118 }
119
120 fd5_draw(batch, ring, primtype, vismode, src_sel, draw->count,
121 info->instance_count, idx_type, max_indices, idx_offset,
122 idx_buffer);
123 }
124
125 #endif /* FD5_DRAW_H_ */
126