1 /* 2 * Copyright © 2014 Rob Clark <[email protected]> 3 * SPDX-License-Identifier: MIT 4 * 5 * Authors: 6 * Rob Clark <[email protected]> 7 */ 8 9 #include "pipe/p_state.h" 10 #include "util/u_memory.h" 11 #include "util/u_string.h" 12 13 #include "fd4_context.h" 14 #include "fd4_format.h" 15 #include "fd4_zsa.h" 16 17 void * fd4_zsa_state_create(struct pipe_context * pctx,const struct pipe_depth_stencil_alpha_state * cso)18fd4_zsa_state_create(struct pipe_context *pctx, 19 const struct pipe_depth_stencil_alpha_state *cso) 20 { 21 struct fd4_zsa_stateobj *so; 22 23 so = CALLOC_STRUCT(fd4_zsa_stateobj); 24 if (!so) 25 return NULL; 26 27 so->base = *cso; 28 29 so->rb_depth_control |= 30 A4XX_RB_DEPTH_CONTROL_ZFUNC(cso->depth_func); /* maps 1:1 */ 31 32 if (cso->depth_enabled) 33 so->rb_depth_control |= 34 A4XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE | A4XX_RB_DEPTH_CONTROL_Z_READ_ENABLE; 35 36 if (cso->depth_writemask) 37 so->rb_depth_control |= A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE; 38 39 if (cso->stencil[0].enabled) { 40 const struct pipe_stencil_state *s = &cso->stencil[0]; 41 42 so->rb_stencil_control |= 43 A4XX_RB_STENCIL_CONTROL_STENCIL_READ | 44 A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE | 45 A4XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */ 46 A4XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) | 47 A4XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) | 48 A4XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op)); 49 so->rb_stencil_control2 |= A4XX_RB_STENCIL_CONTROL2_STENCIL_BUFFER; 50 so->rb_stencilrefmask |= 51 0xff000000 | /* ??? */ 52 A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) | 53 A4XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask); 54 55 if (cso->stencil[1].enabled) { 56 const struct pipe_stencil_state *bs = &cso->stencil[1]; 57 58 so->rb_stencil_control |= 59 A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF | 60 A4XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */ 61 A4XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) | 62 A4XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) | 63 A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op)); 64 so->rb_stencilrefmask_bf |= 65 0xff000000 | /* ??? */ 66 A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) | 67 A4XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask); 68 } 69 } 70 71 if (cso->alpha_enabled) { 72 uint32_t ref = cso->alpha_ref_value * 255.0f; 73 so->gras_alpha_control = A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE; 74 so->rb_alpha_control = 75 A4XX_RB_ALPHA_CONTROL_ALPHA_TEST | 76 A4XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) | 77 A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func); 78 so->rb_depth_control |= A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE; 79 } 80 81 return so; 82 } 83