xref: /aosp_15_r20/external/mesa3d/src/etnaviv/isa/asm.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright (c) 2012-2015 Etnaviv Project
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Authors:
7  *    Wladimir J. van der Laan <[email protected]>
8  */
9 
10 #pragma once
11 
12 #include <stdbool.h>
13 #include <stdint.h>
14 
15 #include "etnaviv/isa/enums.h"
16 
17 /* Number of source operands per instruction */
18 #define ETNA_NUM_SRC (3)
19 
20 #define SWIZ_X(x) (((x) & 0x03) << 0)
21 #define SWIZ_Y(y) (((y) & 0x03) << 2)
22 #define SWIZ_Z(z) (((z) & 0x03) << 4)
23 #define SWIZ_W(w) (((w) & 0x03) << 6)
24 
25 /* clang-format off */
26 /* Broadcast swizzle to all four components */
27 #define INST_SWIZ_BROADCAST(x) \
28         (SWIZ_X(x) | SWIZ_Y(x) | SWIZ_Z(x) | SWIZ_W(x))
29 /* Identity (NOP) swizzle */
30 #define INST_SWIZ_IDENTITY \
31         (SWIZ_X(0) | SWIZ_Y(1) | SWIZ_Z(2) | SWIZ_W(3))
32 /* Fully specified swizzle */
33 #define INST_SWIZ(x, y, z, w) \
34         (SWIZ_X(x) | SWIZ_Y(y) | SWIZ_Z(z) | SWIZ_W(w))
35 #define SWIZZLE(c0, c1, c2, c3) \
36         INST_SWIZ(ISA_SWIZ_##c0, \
37                   ISA_SWIZ_##c1, \
38                   ISA_SWIZ_##c2, \
39                   ISA_SWIZ_##c3)
40 /* clang-format on */
41 
42 /*** operands ***/
43 
44 /* destination operand */
45 struct etna_inst_dst {
46    unsigned use                       : 1; /* 0: not in use, 1: in use */
47    enum isa_reg_addressing_mode amode : 3;
48    unsigned reg                       : 7; /* register number 0..127 */
49    enum isa_wrmask write_mask         : 4;
50 };
51 
52 /* texture operand */
53 struct etna_inst_tex {
54    unsigned id                        : 5; /* sampler id */
55    enum isa_reg_addressing_mode amode : 3;
56    unsigned swiz                      : 8; /* INST_SWIZ */
57 };
58 
59 /* source operand */
60 struct etna_inst_src {
61    unsigned use              : 1; /* 0: not in use, 1: in use */
62    enum isa_reg_group rgroup : 3;
63    union {
64       struct __attribute__((__packed__)) {
65          unsigned reg                       : 9; /* register or uniform number 0..511 */
66          unsigned swiz                      : 8; /* INST_SWIZ */
67          unsigned neg                       : 1; /* negate (flip sign) if set */
68          unsigned abs                       : 1; /* absolute (remove sign) if set */
69          enum isa_reg_addressing_mode amode : 3;
70       };
71       struct __attribute__((__packed__)) {
72          unsigned imm_val  : 20;
73          unsigned imm_type : 2;
74       };
75    };
76 };
77 
78 /*** instruction ***/
79 struct etna_inst {
80    enum isa_opc opcode;
81    enum isa_type type;
82    enum isa_rounding rounding;
83    enum isa_cond cond     : 5;
84    unsigned sat           : 1; /* saturate result between 0..1 */
85    enum isa_thread thread : 2; /* select low/high half mediump */
86    unsigned dst_full      : 1; /* write to highp register */
87    unsigned pmode         : 1;
88    unsigned skphp         : 1;
89    unsigned denorm        : 1;
90    unsigned local         : 1;
91    unsigned left_shift    : 3;
92    struct etna_inst_dst dst;               /* destination operand */
93    struct etna_inst_tex tex;               /* texture operand */
94    struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */
95    unsigned imm;                           /* takes place of src[2] for BRANCH/CALL */
96 };
97 
98 struct etna_asm_result {
99    struct etna_inst *instr;
100    char *error;
101    size_t num_instr;
102    size_t capacity_instr;
103    bool success;
104 };
105