1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott ([email protected])
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43 #include "util/perf/cpu_trace.h"
44
45 /*
46 * pass to lower GLSL IR to NIR
47 *
48 * This will lower variable dereferences to loads/stores of corresponding
49 * variables in NIR - the variables will be converted to registers in a later
50 * pass.
51 */
52
53 namespace {
54
55 class nir_visitor : public ir_visitor
56 {
57 public:
58 nir_visitor(const struct gl_constants *consts, nir_shader *shader);
59 nir_visitor(const nir_visitor &) = delete;
60 ~nir_visitor();
61 nir_visitor & operator=(const nir_visitor &) = delete;
62
63 virtual void visit(ir_variable *);
64 virtual void visit(ir_function *);
65 virtual void visit(ir_function_signature *);
66 virtual void visit(ir_loop *);
67 virtual void visit(ir_if *);
68 virtual void visit(ir_discard *);
69 virtual void visit(ir_demote *);
70 virtual void visit(ir_loop_jump *);
71 virtual void visit(ir_return *);
72 virtual void visit(ir_call *);
73 virtual void visit(ir_assignment *);
74 virtual void visit(ir_emit_vertex *);
75 virtual void visit(ir_end_primitive *);
76 virtual void visit(ir_expression *);
77 virtual void visit(ir_swizzle *);
78 virtual void visit(ir_texture *);
79 virtual void visit(ir_constant *);
80 virtual void visit(ir_dereference_variable *);
81 virtual void visit(ir_dereference_record *);
82 virtual void visit(ir_dereference_array *);
83 virtual void visit(ir_barrier *);
84
85 void create_function(ir_function_signature *ir);
86
87 private:
88 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
89 void truncate_after_instruction(exec_node *ir);
90 nir_def *evaluate_rvalue(ir_rvalue *ir);
91
92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def **srcs);
93 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1);
94 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1,
95 nir_def *src2);
96 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_def *src1,
97 nir_def *src2, nir_def *src3);
98
99 bool supports_std430;
100
101 nir_shader *shader;
102 nir_function_impl *impl;
103 nir_builder b;
104 nir_def *result; /* result of the expression tree last visited */
105
106 nir_deref_instr *evaluate_deref(ir_instruction *ir);
107
108 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
109
110 /* most recent deref instruction created */
111 nir_deref_instr *deref;
112
113 /* whether the IR we're operating on is per-function or global */
114 bool is_global;
115
116 ir_function_signature *sig;
117
118 /* map of ir_variable -> nir_variable */
119 struct hash_table *var_table;
120
121 /* map of ir_function_signature -> nir_function_overload */
122 struct hash_table *overload_table;
123
124 /* set of nir_variable hold sparse result */
125 struct set *sparse_variable_set;
126
127 void adjust_sparse_variable(nir_deref_instr *var_deref, const glsl_type *type,
128 nir_def *dest);
129
130 const struct gl_constants *consts;
131 };
132
133 /*
134 * This visitor runs before the main visitor, calling create_function() for
135 * each function so that the main visitor can resolve forward references in
136 * calls.
137 */
138
139 class nir_function_visitor : public ir_hierarchical_visitor
140 {
141 public:
nir_function_visitor(nir_visitor * v)142 nir_function_visitor(nir_visitor *v) : visitor(v)
143 {
144 }
145 virtual ir_visitor_status visit_enter(ir_function *);
146
147 private:
148 nir_visitor *visitor;
149 };
150
151 } /* end of anonymous namespace */
152
153 nir_shader *
glsl_to_nir(const struct gl_constants * consts,struct exec_list ** ir,shader_info * si,gl_shader_stage stage,const nir_shader_compiler_options * options)154 glsl_to_nir(const struct gl_constants *consts,
155 struct exec_list **ir, shader_info *si, gl_shader_stage stage,
156 const nir_shader_compiler_options *options)
157 {
158 MESA_TRACE_FUNC();
159
160 nir_shader *shader = nir_shader_create(NULL, stage, options, si);
161
162 nir_visitor v1(consts, shader);
163 nir_function_visitor v2(&v1);
164 v2.run(*ir);
165 visit_exec_list(*ir, &v1);
166
167 /* The GLSL IR won't be needed anymore. */
168 ralloc_free(*ir);
169 *ir = NULL;
170
171 nir_validate_shader(shader, "after glsl to nir, before function inline");
172 if (should_print_nir(shader)) {
173 printf("glsl_to_nir\n");
174 nir_print_shader(shader, stdout);
175 }
176
177 return shader;
178 }
179
nir_visitor(const struct gl_constants * consts,nir_shader * shader)180 nir_visitor::nir_visitor(const struct gl_constants *consts, nir_shader *shader)
181 {
182 this->consts = consts;
183 this->supports_std430 = consts->UseSTD430AsDefaultPacking;
184 this->shader = shader;
185 this->is_global = true;
186 this->var_table = _mesa_pointer_hash_table_create(NULL);
187 this->overload_table = _mesa_pointer_hash_table_create(NULL);
188 this->sparse_variable_set = _mesa_pointer_set_create(NULL);
189 this->result = NULL;
190 this->impl = NULL;
191 this->deref = NULL;
192 this->sig = NULL;
193 memset(&this->b, 0, sizeof(this->b));
194 }
195
~nir_visitor()196 nir_visitor::~nir_visitor()
197 {
198 _mesa_hash_table_destroy(this->var_table, NULL);
199 _mesa_hash_table_destroy(this->overload_table, NULL);
200 _mesa_set_destroy(this->sparse_variable_set, NULL);
201 }
202
203 nir_deref_instr *
evaluate_deref(ir_instruction * ir)204 nir_visitor::evaluate_deref(ir_instruction *ir)
205 {
206 ir->accept(this);
207 return this->deref;
208 }
209
210 void
truncate_after_instruction(exec_node * ir)211 nir_visitor::truncate_after_instruction(exec_node *ir)
212 {
213 if (!ir)
214 return;
215
216 while (!ir->get_next()->is_tail_sentinel()) {
217 ((ir_instruction *)ir->get_next())->remove();
218 }
219 }
220
221 nir_constant *
constant_copy(ir_constant * ir,void * mem_ctx)222 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
223 {
224 if (ir == NULL)
225 return NULL;
226
227 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
228
229 const unsigned rows = ir->type->vector_elements;
230 const unsigned cols = ir->type->matrix_columns;
231 unsigned i;
232
233 ret->num_elements = 0;
234 switch (ir->type->base_type) {
235 case GLSL_TYPE_UINT:
236 /* Only float base types can be matrices. */
237 assert(cols == 1);
238
239 for (unsigned r = 0; r < rows; r++)
240 ret->values[r].u32 = ir->value.u[r];
241
242 break;
243
244 case GLSL_TYPE_UINT16:
245 /* Only float base types can be matrices. */
246 assert(cols == 1);
247
248 for (unsigned r = 0; r < rows; r++)
249 ret->values[r].u16 = ir->value.u16[r];
250 break;
251
252 case GLSL_TYPE_INT:
253 /* Only float base types can be matrices. */
254 assert(cols == 1);
255
256 for (unsigned r = 0; r < rows; r++)
257 ret->values[r].i32 = ir->value.i[r];
258
259 break;
260
261 case GLSL_TYPE_INT16:
262 /* Only float base types can be matrices. */
263 assert(cols == 1);
264
265 for (unsigned r = 0; r < rows; r++)
266 ret->values[r].i16 = ir->value.i16[r];
267 break;
268
269 case GLSL_TYPE_FLOAT:
270 case GLSL_TYPE_FLOAT16:
271 case GLSL_TYPE_DOUBLE:
272 if (cols > 1) {
273 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
274 ret->num_elements = cols;
275 for (unsigned c = 0; c < cols; c++) {
276 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
277 col_const->num_elements = 0;
278 switch (ir->type->base_type) {
279 case GLSL_TYPE_FLOAT:
280 for (unsigned r = 0; r < rows; r++)
281 col_const->values[r].f32 = ir->value.f[c * rows + r];
282 break;
283
284 case GLSL_TYPE_FLOAT16:
285 for (unsigned r = 0; r < rows; r++)
286 col_const->values[r].u16 = ir->value.f16[c * rows + r];
287 break;
288
289 case GLSL_TYPE_DOUBLE:
290 for (unsigned r = 0; r < rows; r++)
291 col_const->values[r].f64 = ir->value.d[c * rows + r];
292 break;
293
294 default:
295 unreachable("Cannot get here from the first level switch");
296 }
297 ret->elements[c] = col_const;
298 }
299 } else {
300 switch (ir->type->base_type) {
301 case GLSL_TYPE_FLOAT:
302 for (unsigned r = 0; r < rows; r++)
303 ret->values[r].f32 = ir->value.f[r];
304 break;
305
306 case GLSL_TYPE_FLOAT16:
307 for (unsigned r = 0; r < rows; r++)
308 ret->values[r].u16 = ir->value.f16[r];
309 break;
310
311 case GLSL_TYPE_DOUBLE:
312 for (unsigned r = 0; r < rows; r++)
313 ret->values[r].f64 = ir->value.d[r];
314 break;
315
316 default:
317 unreachable("Cannot get here from the first level switch");
318 }
319 }
320 break;
321
322 case GLSL_TYPE_UINT64:
323 /* Only float base types can be matrices. */
324 assert(cols == 1);
325
326 for (unsigned r = 0; r < rows; r++)
327 ret->values[r].u64 = ir->value.u64[r];
328 break;
329
330 case GLSL_TYPE_INT64:
331 /* Only float base types can be matrices. */
332 assert(cols == 1);
333
334 for (unsigned r = 0; r < rows; r++)
335 ret->values[r].i64 = ir->value.i64[r];
336 break;
337
338 case GLSL_TYPE_BOOL:
339 /* Only float base types can be matrices. */
340 assert(cols == 1);
341
342 for (unsigned r = 0; r < rows; r++)
343 ret->values[r].b = ir->value.b[r];
344
345 break;
346
347 case GLSL_TYPE_STRUCT:
348 case GLSL_TYPE_ARRAY:
349 ret->elements = ralloc_array(mem_ctx, nir_constant *,
350 ir->type->length);
351 ret->num_elements = ir->type->length;
352
353 for (i = 0; i < ir->type->length; i++)
354 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
355 break;
356
357 default:
358 unreachable("not reached");
359 }
360
361 return ret;
362 }
363
364 void
adjust_sparse_variable(nir_deref_instr * var_deref,const glsl_type * type,nir_def * dest)365 nir_visitor::adjust_sparse_variable(nir_deref_instr *var_deref, const glsl_type *type,
366 nir_def *dest)
367 {
368 const glsl_type *texel_type = glsl_get_field_type(type, "texel");
369 assert(texel_type);
370
371 assert(var_deref->deref_type == nir_deref_type_var);
372 nir_variable *var = var_deref->var;
373
374 /* Adjust nir_variable type to align with sparse nir instructions.
375 * Because the nir_variable is created with struct type from ir_variable,
376 * but sparse nir instructions output with vector dest.
377 */
378 var->type = glsl_simple_type(glsl_get_base_glsl_type(texel_type)->base_type,
379 dest->num_components, 1);
380
381 var_deref->type = var->type;
382
383 /* Record the adjusted variable. */
384 _mesa_set_add(this->sparse_variable_set, var);
385 }
386
387 static unsigned
get_nir_how_declared(unsigned how_declared)388 get_nir_how_declared(unsigned how_declared)
389 {
390 if (how_declared == ir_var_hidden)
391 return nir_var_hidden;
392
393 if (how_declared == ir_var_declared_implicitly)
394 return nir_var_declared_implicitly;
395
396 return nir_var_declared_normally;
397 }
398
399 void
visit(ir_variable * ir)400 nir_visitor::visit(ir_variable *ir)
401 {
402 /* FINISHME: inout parameters */
403 assert(ir->data.mode != ir_var_function_inout);
404
405 if (ir->data.mode == ir_var_function_out)
406 return;
407
408 nir_variable *var = rzalloc(shader, nir_variable);
409 var->type = ir->type;
410 var->name = ralloc_strdup(var, ir->name);
411
412 var->data.assigned = ir->data.assigned;
413 var->data.read_only = ir->data.read_only;
414 var->data.centroid = ir->data.centroid;
415 var->data.sample = ir->data.sample;
416 var->data.patch = ir->data.patch;
417 var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
418 var->data.invariant = ir->data.invariant;
419 var->data.explicit_invariant = ir->data.explicit_invariant;
420 var->data.location = ir->data.location;
421 var->data.must_be_shader_input = ir->data.must_be_shader_input;
422 var->data.stream = ir->data.stream;
423 if (ir->data.stream & (1u << 31))
424 var->data.stream |= NIR_STREAM_PACKED;
425
426 var->data.precision = ir->data.precision;
427 var->data.explicit_location = ir->data.explicit_location;
428 var->data.matrix_layout = ir->data.matrix_layout;
429 var->data.from_named_ifc_block = ir->data.from_named_ifc_block;
430 var->data.compact = false;
431 var->data.used = ir->data.used;
432 var->data.max_array_access = ir->data.max_array_access;
433 var->data.implicit_sized_array = ir->data.implicit_sized_array;
434 var->data.from_ssbo_unsized_array = ir->data.from_ssbo_unsized_array;
435
436 switch(ir->data.mode) {
437 case ir_var_auto:
438 case ir_var_temporary:
439 if (is_global)
440 var->data.mode = nir_var_shader_temp;
441 else
442 var->data.mode = nir_var_function_temp;
443 break;
444
445 case ir_var_function_in:
446 case ir_var_const_in:
447 var->data.mode = nir_var_function_temp;
448 break;
449
450 case ir_var_shader_in:
451 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
452 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
453 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
454 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
455 var->data.mode = nir_var_system_value;
456 } else {
457 var->data.mode = nir_var_shader_in;
458 }
459 break;
460
461 case ir_var_shader_out:
462 var->data.mode = nir_var_shader_out;
463 break;
464
465 case ir_var_uniform:
466 if (ir->get_interface_type())
467 var->data.mode = nir_var_mem_ubo;
468 else if (glsl_type_contains_image(ir->type) && !ir->data.bindless)
469 var->data.mode = nir_var_image;
470 else
471 var->data.mode = nir_var_uniform;
472 break;
473
474 case ir_var_shader_storage:
475 var->data.mode = nir_var_mem_ssbo;
476 break;
477
478 case ir_var_system_value:
479 var->data.mode = nir_var_system_value;
480 break;
481
482 case ir_var_shader_shared:
483 var->data.mode = nir_var_mem_shared;
484 break;
485
486 default:
487 unreachable("not reached");
488 }
489
490 unsigned mem_access = 0;
491 if (ir->data.memory_read_only)
492 mem_access |= ACCESS_NON_WRITEABLE;
493 if (ir->data.memory_write_only)
494 mem_access |= ACCESS_NON_READABLE;
495 if (ir->data.memory_coherent)
496 mem_access |= ACCESS_COHERENT;
497 if (ir->data.memory_volatile)
498 mem_access |= ACCESS_VOLATILE;
499 if (ir->data.memory_restrict)
500 mem_access |= ACCESS_RESTRICT;
501
502 var->interface_type = ir->get_interface_type();
503
504 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
505 if (!glsl_type_is_interface(glsl_without_array(ir->type))) {
506 /* This variable is one entry in the interface */
507 UNUSED bool found = false;
508 for (unsigned i = 0; i < ir->get_interface_type()->length; i++) {
509 const glsl_struct_field *field =
510 &ir->get_interface_type()->fields.structure[i];
511 if (strcmp(ir->name, field->name) != 0)
512 continue;
513
514 if (field->memory_read_only)
515 mem_access |= ACCESS_NON_WRITEABLE;
516 if (field->memory_write_only)
517 mem_access |= ACCESS_NON_READABLE;
518 if (field->memory_coherent)
519 mem_access |= ACCESS_COHERENT;
520 if (field->memory_volatile)
521 mem_access |= ACCESS_VOLATILE;
522 if (field->memory_restrict)
523 mem_access |= ACCESS_RESTRICT;
524
525 found = true;
526 break;
527 }
528 assert(found);
529 }
530 }
531
532 var->data.interpolation = ir->data.interpolation;
533 var->data.location_frac = ir->data.location_frac;
534
535 switch (ir->data.depth_layout) {
536 case ir_depth_layout_none:
537 var->data.depth_layout = nir_depth_layout_none;
538 break;
539 case ir_depth_layout_any:
540 var->data.depth_layout = nir_depth_layout_any;
541 break;
542 case ir_depth_layout_greater:
543 var->data.depth_layout = nir_depth_layout_greater;
544 break;
545 case ir_depth_layout_less:
546 var->data.depth_layout = nir_depth_layout_less;
547 break;
548 case ir_depth_layout_unchanged:
549 var->data.depth_layout = nir_depth_layout_unchanged;
550 break;
551 default:
552 unreachable("not reached");
553 }
554
555 var->data.index = ir->data.index;
556 var->data.descriptor_set = 0;
557 var->data.binding = ir->data.binding;
558 var->data.explicit_binding = ir->data.explicit_binding;
559 var->data.explicit_offset = ir->data.explicit_xfb_offset;
560 var->data.bindless = ir->data.bindless;
561 var->data.offset = ir->data.offset;
562 var->data.access = (gl_access_qualifier)mem_access;
563 var->data.has_initializer = ir->data.has_initializer;
564 var->data.is_implicit_initializer = ir->data.is_implicit_initializer;
565
566 if (glsl_type_is_image(glsl_without_array(var->type))) {
567 var->data.image.format = ir->data.image_format;
568 } else if (var->data.mode == nir_var_shader_out) {
569 var->data.xfb.buffer = ir->data.xfb_buffer;
570 var->data.xfb.stride = ir->data.xfb_stride;
571 }
572
573 var->data.fb_fetch_output = ir->data.fb_fetch_output;
574 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
575 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
576
577 var->num_state_slots = ir->get_num_state_slots();
578 if (var->num_state_slots > 0) {
579 var->state_slots = rzalloc_array(var, nir_state_slot,
580 var->num_state_slots);
581
582 ir_state_slot *state_slots = ir->get_state_slots();
583 for (unsigned i = 0; i < var->num_state_slots; i++) {
584 for (unsigned j = 0; j < 4; j++)
585 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
586 }
587 } else {
588 var->state_slots = NULL;
589 }
590
591 /* Values declared const will have ir->constant_value instead of
592 * ir->constant_initializer.
593 */
594 if (ir->constant_initializer)
595 var->constant_initializer = constant_copy(ir->constant_initializer, var);
596 else
597 var->constant_initializer = constant_copy(ir->constant_value, var);
598
599 if (var->data.mode == nir_var_function_temp)
600 nir_function_impl_add_variable(impl, var);
601 else
602 nir_shader_add_variable(shader, var);
603
604 _mesa_hash_table_insert(var_table, ir, var);
605 }
606
607 ir_visitor_status
visit_enter(ir_function * ir)608 nir_function_visitor::visit_enter(ir_function *ir)
609 {
610 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
611 visitor->create_function(sig);
612 }
613 return visit_continue_with_parent;
614 }
615
616 void
create_function(ir_function_signature * ir)617 nir_visitor::create_function(ir_function_signature *ir)
618 {
619 if (ir->is_intrinsic())
620 return;
621
622 nir_function *func = nir_function_create(shader, ir->function_name());
623 if (strcmp(ir->function_name(), "main") == 0)
624 func->is_entrypoint = true;
625
626 func->num_params = ir->parameters.length() +
627 (ir->return_type != &glsl_type_builtin_void);
628 func->params = ralloc_array(shader, nir_parameter, func->num_params);
629
630 unsigned np = 0;
631
632 if (ir->return_type != &glsl_type_builtin_void) {
633 /* The return value is a variable deref (basically an out parameter) */
634 func->params[np].num_components = 1;
635 func->params[np].bit_size = 32;
636 func->params[np].type = ir->return_type;
637 func->params[np].is_return = true;
638 np++;
639 }
640
641 foreach_in_list(ir_variable, param, &ir->parameters) {
642 func->params[np].num_components = 1;
643 func->params[np].bit_size = 32;
644
645 func->params[np].type = param->type;
646 func->params[np].is_return = false;
647 np++;
648 }
649 assert(np == func->num_params);
650
651 func->is_subroutine = ir->function()->is_subroutine;
652 func->num_subroutine_types = ir->function()->num_subroutine_types;
653 func->subroutine_index = ir->function()->subroutine_index;
654 func->subroutine_types =
655 ralloc_array(func, const struct glsl_type *, func->num_subroutine_types);
656 for (int i = 0; i < func->num_subroutine_types; i++)
657 func->subroutine_types[i] = ir->function()->subroutine_types[i];
658
659 _mesa_hash_table_insert(this->overload_table, ir, func);
660 }
661
662 void
visit(ir_function * ir)663 nir_visitor::visit(ir_function *ir)
664 {
665 foreach_in_list(ir_function_signature, sig, &ir->signatures)
666 sig->accept(this);
667 }
668
669 void
visit(ir_function_signature * ir)670 nir_visitor::visit(ir_function_signature *ir)
671 {
672 if (ir->is_intrinsic())
673 return;
674
675 this->sig = ir;
676
677 struct hash_entry *entry =
678 _mesa_hash_table_search(this->overload_table, ir);
679
680 assert(entry);
681 nir_function *func = (nir_function *) entry->data;
682
683 if (ir->is_defined) {
684 nir_function_impl *impl = nir_function_impl_create(func);
685 this->impl = impl;
686
687 this->is_global = false;
688
689 b = nir_builder_at(nir_after_impl(impl));
690
691 visit_exec_list(&ir->body, this);
692
693 this->is_global = true;
694 } else {
695 func->impl = NULL;
696 }
697 }
698
699 void
visit(ir_loop * ir)700 nir_visitor::visit(ir_loop *ir)
701 {
702 nir_push_loop(&b);
703 visit_exec_list(&ir->body_instructions, this);
704 nir_pop_loop(&b, NULL);
705 }
706
707 void
visit(ir_if * ir)708 nir_visitor::visit(ir_if *ir)
709 {
710 nir_push_if(&b, evaluate_rvalue(ir->condition));
711 visit_exec_list(&ir->then_instructions, this);
712 nir_push_else(&b, NULL);
713 visit_exec_list(&ir->else_instructions, this);
714 nir_pop_if(&b, NULL);
715 }
716
717 void
visit(ir_discard * ir)718 nir_visitor::visit(ir_discard *ir)
719 {
720 /*
721 * discards aren't treated as control flow, because before we lower them
722 * they can appear anywhere in the shader and the stuff after them may still
723 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
724 * discards will be immediately followed by a return.
725 */
726
727 if (ir->condition)
728 nir_discard_if(&b, evaluate_rvalue(ir->condition));
729 else
730 nir_discard(&b);
731 }
732
733 void
visit(ir_demote * ir)734 nir_visitor::visit(ir_demote *ir)
735 {
736 nir_demote(&b);
737 }
738
739 void
visit(ir_emit_vertex * ir)740 nir_visitor::visit(ir_emit_vertex *ir)
741 {
742 nir_emit_vertex(&b, (unsigned)ir->stream_id());
743 }
744
745 void
visit(ir_end_primitive * ir)746 nir_visitor::visit(ir_end_primitive *ir)
747 {
748 nir_end_primitive(&b, (unsigned)ir->stream_id());
749 }
750
751 void
visit(ir_loop_jump * ir)752 nir_visitor::visit(ir_loop_jump *ir)
753 {
754 nir_jump_type type;
755 switch (ir->mode) {
756 case ir_loop_jump::jump_break:
757 type = nir_jump_break;
758 break;
759 case ir_loop_jump::jump_continue:
760 type = nir_jump_continue;
761 break;
762 default:
763 unreachable("not reached");
764 }
765
766 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
767 nir_builder_instr_insert(&b, &instr->instr);
768
769 /* Eliminate all instructions after the jump, since they are unreachable
770 * and NIR considers adding these instructions illegal.
771 */
772 truncate_after_instruction(ir);
773 }
774
775 void
visit(ir_return * ir)776 nir_visitor::visit(ir_return *ir)
777 {
778 if (ir->value != NULL) {
779 nir_deref_instr *ret_deref =
780 nir_build_deref_cast(&b, nir_load_param(&b, 0),
781 nir_var_function_temp, ir->value->type, 0);
782
783 if (glsl_type_is_vector_or_scalar(ir->value->type)) {
784 nir_store_deref(&b, ret_deref, evaluate_rvalue(ir->value), ~0);
785 } else {
786 nir_copy_deref(&b, ret_deref, evaluate_deref(ir->value));
787 }
788 }
789
790 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
791 nir_builder_instr_insert(&b, &instr->instr);
792
793 /* Eliminate all instructions after the jump, since they are unreachable
794 * and NIR considers adding these instructions illegal.
795 */
796 truncate_after_instruction(ir);
797 }
798
799 static void
intrinsic_set_std430_align(nir_intrinsic_instr * intrin,const glsl_type * type)800 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
801 {
802 unsigned bit_size = glsl_type_is_boolean(type) ? 32 : glsl_get_bit_size(type);
803 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
804 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
805 }
806
807 /* Accumulate any qualifiers along the deref chain to get the actual
808 * load/store qualifier.
809 */
810
811 static enum gl_access_qualifier
deref_get_qualifier(nir_deref_instr * deref)812 deref_get_qualifier(nir_deref_instr *deref)
813 {
814 nir_deref_path path;
815 nir_deref_path_init(&path, deref, NULL);
816
817 /* Function params can lead to a deref cast just return zero as these
818 * params have no qualifers anyway.
819 */
820 if (path.path[0]->deref_type != nir_deref_type_var)
821 return (gl_access_qualifier) 0;
822
823 unsigned qualifiers = path.path[0]->var->data.access;
824
825 const glsl_type *parent_type = path.path[0]->type;
826 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
827 nir_deref_instr *cur = *cur_ptr;
828
829 if (glsl_type_is_interface(parent_type)) {
830 const struct glsl_struct_field *field =
831 &parent_type->fields.structure[cur->strct.index];
832 if (field->memory_read_only)
833 qualifiers |= ACCESS_NON_WRITEABLE;
834 if (field->memory_write_only)
835 qualifiers |= ACCESS_NON_READABLE;
836 if (field->memory_coherent)
837 qualifiers |= ACCESS_COHERENT;
838 if (field->memory_volatile)
839 qualifiers |= ACCESS_VOLATILE;
840 if (field->memory_restrict)
841 qualifiers |= ACCESS_RESTRICT;
842 }
843
844 parent_type = cur->type;
845 }
846
847 nir_deref_path_finish(&path);
848
849 return (gl_access_qualifier) qualifiers;
850 }
851
852 static nir_op
get_reduction_op(enum ir_intrinsic_id id,const glsl_type * type)853 get_reduction_op(enum ir_intrinsic_id id, const glsl_type *type)
854 {
855 #define IR_CASE(op) \
856 case ir_intrinsic_reduce_##op: \
857 case ir_intrinsic_inclusive_##op: \
858 case ir_intrinsic_exclusive_##op: \
859 case ir_intrinsic_clustered_##op: \
860 return CONV_OP(op);
861
862 switch (id) {
863
864 #define CONV_OP(op) \
865 type->base_type == GLSL_TYPE_INT || type->base_type == GLSL_TYPE_UINT ? \
866 nir_op_i##op : nir_op_f##op
867
868 IR_CASE(add)
869 IR_CASE(mul)
870
871 #undef CONV_OP
872 #define CONV_OP(op) \
873 type->base_type == GLSL_TYPE_INT ? nir_op_i##op : \
874 (type->base_type == GLSL_TYPE_UINT ? nir_op_u##op : nir_op_f##op)
875
876 IR_CASE(min)
877 IR_CASE(max)
878
879 #undef CONV_OP
880 #define CONV_OP(op) nir_op_i##op
881
882 IR_CASE(and)
883 IR_CASE(or)
884 IR_CASE(xor)
885
886 #undef CONV_OP
887
888 default:
889 unreachable("not reached");
890 }
891
892 #undef IR_CASE
893 }
894
895 void
visit(ir_call * ir)896 nir_visitor::visit(ir_call *ir)
897 {
898 if (ir->callee->is_intrinsic()) {
899 nir_intrinsic_op op;
900
901 /* Initialize to something because gcc complains otherwise */
902 nir_atomic_op atomic_op = nir_atomic_op_iadd;
903
904 switch (ir->callee->intrinsic_id) {
905 case ir_intrinsic_generic_atomic_add:
906 op = nir_intrinsic_deref_atomic;
907 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
908 ? nir_atomic_op_iadd : nir_atomic_op_fadd;
909 break;
910 case ir_intrinsic_generic_atomic_and:
911 op = nir_intrinsic_deref_atomic;
912 atomic_op = nir_atomic_op_iand;
913 break;
914 case ir_intrinsic_generic_atomic_or:
915 op = nir_intrinsic_deref_atomic;
916 atomic_op = nir_atomic_op_ior;
917 break;
918 case ir_intrinsic_generic_atomic_xor:
919 op = nir_intrinsic_deref_atomic;
920 atomic_op = nir_atomic_op_ixor;
921 break;
922 case ir_intrinsic_generic_atomic_min:
923 assert(ir->return_deref);
924 op = nir_intrinsic_deref_atomic;
925 if (ir->return_deref->type == &glsl_type_builtin_int ||
926 ir->return_deref->type == &glsl_type_builtin_int64_t)
927 atomic_op = nir_atomic_op_imin;
928 else if (ir->return_deref->type == &glsl_type_builtin_uint ||
929 ir->return_deref->type == &glsl_type_builtin_uint64_t)
930 atomic_op = nir_atomic_op_umin;
931 else if (ir->return_deref->type == &glsl_type_builtin_float)
932 atomic_op = nir_atomic_op_fmin;
933 else
934 unreachable("Invalid type");
935 break;
936 case ir_intrinsic_generic_atomic_max:
937 assert(ir->return_deref);
938 op = nir_intrinsic_deref_atomic;
939 if (ir->return_deref->type == &glsl_type_builtin_int ||
940 ir->return_deref->type == &glsl_type_builtin_int64_t)
941 atomic_op = nir_atomic_op_imax;
942 else if (ir->return_deref->type == &glsl_type_builtin_uint ||
943 ir->return_deref->type == &glsl_type_builtin_uint64_t)
944 atomic_op = nir_atomic_op_umax;
945 else if (ir->return_deref->type == &glsl_type_builtin_float)
946 atomic_op = nir_atomic_op_fmax;
947 else
948 unreachable("Invalid type");
949 break;
950 case ir_intrinsic_generic_atomic_exchange:
951 op = nir_intrinsic_deref_atomic;
952 atomic_op = nir_atomic_op_xchg;
953 break;
954 case ir_intrinsic_generic_atomic_comp_swap:
955 op = nir_intrinsic_deref_atomic_swap;
956 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
957 ? nir_atomic_op_cmpxchg
958 : nir_atomic_op_fcmpxchg;
959 break;
960 case ir_intrinsic_atomic_counter_read:
961 op = nir_intrinsic_atomic_counter_read_deref;
962 break;
963 case ir_intrinsic_atomic_counter_increment:
964 op = nir_intrinsic_atomic_counter_inc_deref;
965 break;
966 case ir_intrinsic_atomic_counter_predecrement:
967 op = nir_intrinsic_atomic_counter_pre_dec_deref;
968 break;
969 case ir_intrinsic_atomic_counter_add:
970 op = nir_intrinsic_atomic_counter_add_deref;
971 break;
972 case ir_intrinsic_atomic_counter_and:
973 op = nir_intrinsic_atomic_counter_and_deref;
974 break;
975 case ir_intrinsic_atomic_counter_or:
976 op = nir_intrinsic_atomic_counter_or_deref;
977 break;
978 case ir_intrinsic_atomic_counter_xor:
979 op = nir_intrinsic_atomic_counter_xor_deref;
980 break;
981 case ir_intrinsic_atomic_counter_min:
982 op = nir_intrinsic_atomic_counter_min_deref;
983 break;
984 case ir_intrinsic_atomic_counter_max:
985 op = nir_intrinsic_atomic_counter_max_deref;
986 break;
987 case ir_intrinsic_atomic_counter_exchange:
988 op = nir_intrinsic_atomic_counter_exchange_deref;
989 break;
990 case ir_intrinsic_atomic_counter_comp_swap:
991 op = nir_intrinsic_atomic_counter_comp_swap_deref;
992 break;
993 case ir_intrinsic_image_load:
994 op = nir_intrinsic_image_deref_load;
995 break;
996 case ir_intrinsic_image_store:
997 op = nir_intrinsic_image_deref_store;
998 break;
999 case ir_intrinsic_image_atomic_add:
1000 op = nir_intrinsic_image_deref_atomic;
1001 atomic_op = glsl_type_is_integer_32_64(ir->return_deref->type)
1002 ? nir_atomic_op_iadd
1003 : nir_atomic_op_fadd;
1004 break;
1005 case ir_intrinsic_image_atomic_min:
1006 op = nir_intrinsic_image_deref_atomic;
1007 if (ir->return_deref->type == &glsl_type_builtin_int)
1008 atomic_op = nir_atomic_op_imin;
1009 else if (ir->return_deref->type == &glsl_type_builtin_uint)
1010 atomic_op = nir_atomic_op_umin;
1011 else
1012 unreachable("Invalid type");
1013 break;
1014 case ir_intrinsic_image_atomic_max:
1015 op = nir_intrinsic_image_deref_atomic;
1016 if (ir->return_deref->type == &glsl_type_builtin_int)
1017 atomic_op = nir_atomic_op_imax;
1018 else if (ir->return_deref->type == &glsl_type_builtin_uint)
1019 atomic_op = nir_atomic_op_umax;
1020 else
1021 unreachable("Invalid type");
1022 break;
1023 case ir_intrinsic_image_atomic_and:
1024 op = nir_intrinsic_image_deref_atomic;
1025 atomic_op = nir_atomic_op_iand;
1026 break;
1027 case ir_intrinsic_image_atomic_or:
1028 op = nir_intrinsic_image_deref_atomic;
1029 atomic_op = nir_atomic_op_ior;
1030 break;
1031 case ir_intrinsic_image_atomic_xor:
1032 op = nir_intrinsic_image_deref_atomic;
1033 atomic_op = nir_atomic_op_ixor;
1034 break;
1035 case ir_intrinsic_image_atomic_exchange:
1036 op = nir_intrinsic_image_deref_atomic;
1037 atomic_op = nir_atomic_op_xchg;
1038 break;
1039 case ir_intrinsic_image_atomic_comp_swap:
1040 op = nir_intrinsic_image_deref_atomic_swap;
1041 atomic_op = nir_atomic_op_cmpxchg;
1042 break;
1043 case ir_intrinsic_image_atomic_inc_wrap:
1044 op = nir_intrinsic_image_deref_atomic;
1045 atomic_op = nir_atomic_op_inc_wrap;
1046 break;
1047 case ir_intrinsic_image_atomic_dec_wrap:
1048 op = nir_intrinsic_image_deref_atomic;
1049 atomic_op = nir_atomic_op_dec_wrap;
1050 break;
1051 case ir_intrinsic_memory_barrier:
1052 case ir_intrinsic_memory_barrier_buffer:
1053 case ir_intrinsic_memory_barrier_image:
1054 case ir_intrinsic_memory_barrier_shared:
1055 case ir_intrinsic_memory_barrier_atomic_counter:
1056 case ir_intrinsic_group_memory_barrier:
1057 case ir_intrinsic_subgroup_barrier:
1058 case ir_intrinsic_subgroup_memory_barrier:
1059 case ir_intrinsic_subgroup_memory_barrier_buffer:
1060 case ir_intrinsic_subgroup_memory_barrier_shared:
1061 case ir_intrinsic_subgroup_memory_barrier_image:
1062 op = nir_intrinsic_barrier;
1063 break;
1064 case ir_intrinsic_image_size:
1065 op = nir_intrinsic_image_deref_size;
1066 break;
1067 case ir_intrinsic_image_samples:
1068 op = nir_intrinsic_image_deref_samples;
1069 break;
1070 case ir_intrinsic_image_sparse_load:
1071 op = nir_intrinsic_image_deref_sparse_load;
1072 break;
1073 case ir_intrinsic_shader_clock:
1074 op = nir_intrinsic_shader_clock;
1075 break;
1076 case ir_intrinsic_begin_invocation_interlock:
1077 op = nir_intrinsic_begin_invocation_interlock;
1078 break;
1079 case ir_intrinsic_end_invocation_interlock:
1080 op = nir_intrinsic_end_invocation_interlock;
1081 break;
1082 case ir_intrinsic_vote_any:
1083 op = nir_intrinsic_vote_any;
1084 break;
1085 case ir_intrinsic_vote_all:
1086 op = nir_intrinsic_vote_all;
1087 break;
1088 case ir_intrinsic_vote_eq: {
1089 ir_rvalue *rvalue = (ir_rvalue *) ir->actual_parameters.get_head();
1090 op = glsl_type_is_integer(rvalue->type) ? nir_intrinsic_vote_ieq : nir_intrinsic_vote_feq;
1091 break;
1092 }
1093 case ir_intrinsic_ballot:
1094 op = nir_intrinsic_ballot;
1095 break;
1096 case ir_intrinsic_read_invocation:
1097 op = nir_intrinsic_read_invocation;
1098 break;
1099 case ir_intrinsic_read_first_invocation:
1100 op = nir_intrinsic_read_first_invocation;
1101 break;
1102 case ir_intrinsic_helper_invocation:
1103 op = nir_intrinsic_is_helper_invocation;
1104 break;
1105 case ir_intrinsic_is_sparse_texels_resident:
1106 op = nir_intrinsic_is_sparse_texels_resident;
1107 break;
1108 case ir_intrinsic_elect:
1109 op = nir_intrinsic_elect;
1110 break;
1111 case ir_intrinsic_inverse_ballot:
1112 op = nir_intrinsic_inverse_ballot;
1113 break;
1114 case ir_intrinsic_ballot_bit_extract:
1115 op = nir_intrinsic_ballot_bitfield_extract;
1116 break;
1117 case ir_intrinsic_ballot_bit_count:
1118 op = nir_intrinsic_ballot_bit_count_reduce;
1119 break;
1120 case ir_intrinsic_ballot_inclusive_bit_count:
1121 op = nir_intrinsic_ballot_bit_count_inclusive;
1122 break;
1123 case ir_intrinsic_ballot_exclusive_bit_count:
1124 op = nir_intrinsic_ballot_bit_count_exclusive;
1125 break;
1126 case ir_intrinsic_ballot_find_lsb:
1127 op = nir_intrinsic_ballot_find_lsb;
1128 break;
1129 case ir_intrinsic_ballot_find_msb:
1130 op = nir_intrinsic_ballot_find_msb;
1131 break;
1132 case ir_intrinsic_shuffle:
1133 op = nir_intrinsic_shuffle;
1134 break;
1135 case ir_intrinsic_shuffle_xor:
1136 op = nir_intrinsic_shuffle_xor;
1137 break;
1138 case ir_intrinsic_shuffle_up:
1139 op = nir_intrinsic_shuffle_up;
1140 break;
1141 case ir_intrinsic_shuffle_down:
1142 op = nir_intrinsic_shuffle_down;
1143 break;
1144 case ir_intrinsic_reduce_add:
1145 case ir_intrinsic_reduce_mul:
1146 case ir_intrinsic_reduce_min:
1147 case ir_intrinsic_reduce_max:
1148 case ir_intrinsic_reduce_and:
1149 case ir_intrinsic_reduce_or:
1150 case ir_intrinsic_reduce_xor:
1151 case ir_intrinsic_clustered_add:
1152 case ir_intrinsic_clustered_mul:
1153 case ir_intrinsic_clustered_min:
1154 case ir_intrinsic_clustered_max:
1155 case ir_intrinsic_clustered_and:
1156 case ir_intrinsic_clustered_or:
1157 case ir_intrinsic_clustered_xor:
1158 op = nir_intrinsic_reduce;
1159 break;
1160 case ir_intrinsic_inclusive_add:
1161 case ir_intrinsic_inclusive_mul:
1162 case ir_intrinsic_inclusive_min:
1163 case ir_intrinsic_inclusive_max:
1164 case ir_intrinsic_inclusive_and:
1165 case ir_intrinsic_inclusive_or:
1166 case ir_intrinsic_inclusive_xor:
1167 op = nir_intrinsic_inclusive_scan;
1168 break;
1169 case ir_intrinsic_exclusive_add:
1170 case ir_intrinsic_exclusive_mul:
1171 case ir_intrinsic_exclusive_min:
1172 case ir_intrinsic_exclusive_max:
1173 case ir_intrinsic_exclusive_and:
1174 case ir_intrinsic_exclusive_or:
1175 case ir_intrinsic_exclusive_xor:
1176 op = nir_intrinsic_exclusive_scan;
1177 break;
1178 case ir_intrinsic_quad_broadcast:
1179 op = nir_intrinsic_quad_broadcast;
1180 break;
1181 case ir_intrinsic_quad_swap_horizontal:
1182 op = nir_intrinsic_quad_swap_horizontal;
1183 break;
1184 case ir_intrinsic_quad_swap_vertical:
1185 op = nir_intrinsic_quad_swap_vertical;
1186 break;
1187 case ir_intrinsic_quad_swap_diagonal:
1188 op = nir_intrinsic_quad_swap_diagonal;
1189 break;
1190 default:
1191 unreachable("not reached");
1192 }
1193
1194 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1195 nir_def *ret = &instr->def;
1196
1197 switch (op) {
1198 case nir_intrinsic_deref_atomic:
1199 case nir_intrinsic_deref_atomic_swap: {
1200 int param_count = ir->actual_parameters.length();
1201 assert(param_count == 2 || param_count == 3);
1202
1203 /* Deref */
1204 exec_node *param = ir->actual_parameters.get_head();
1205 ir_rvalue *rvalue = (ir_rvalue *) param;
1206 ir_dereference *deref = rvalue->as_dereference();
1207 ir_swizzle *swizzle = NULL;
1208 if (!deref) {
1209 /* We may have a swizzle to pick off a single vec4 component */
1210 swizzle = rvalue->as_swizzle();
1211 assert(swizzle && swizzle->type->vector_elements == 1);
1212 deref = swizzle->val->as_dereference();
1213 assert(deref);
1214 }
1215 nir_deref_instr *nir_deref = evaluate_deref(deref);
1216 if (swizzle) {
1217 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1218 swizzle->mask.x);
1219 }
1220 instr->src[0] = nir_src_for_ssa(&nir_deref->def);
1221
1222 nir_intrinsic_set_atomic_op(instr, atomic_op);
1223 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1224
1225 /* data1 parameter (this is always present) */
1226 param = param->get_next();
1227 ir_instruction *inst = (ir_instruction *) param;
1228 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1229
1230 /* data2 parameter (only with atomic_comp_swap) */
1231 if (param_count == 3) {
1232 assert(op == nir_intrinsic_deref_atomic_swap);
1233 param = param->get_next();
1234 inst = (ir_instruction *) param;
1235 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1236 }
1237
1238 /* Atomic result */
1239 assert(ir->return_deref);
1240 if (glsl_type_is_integer_64(ir->return_deref->type)) {
1241 nir_def_init(&instr->instr, &instr->def,
1242 ir->return_deref->type->vector_elements, 64);
1243 } else {
1244 nir_def_init(&instr->instr, &instr->def,
1245 ir->return_deref->type->vector_elements, 32);
1246 }
1247 nir_builder_instr_insert(&b, &instr->instr);
1248 break;
1249 }
1250 case nir_intrinsic_atomic_counter_read_deref:
1251 case nir_intrinsic_atomic_counter_inc_deref:
1252 case nir_intrinsic_atomic_counter_pre_dec_deref:
1253 case nir_intrinsic_atomic_counter_add_deref:
1254 case nir_intrinsic_atomic_counter_min_deref:
1255 case nir_intrinsic_atomic_counter_max_deref:
1256 case nir_intrinsic_atomic_counter_and_deref:
1257 case nir_intrinsic_atomic_counter_or_deref:
1258 case nir_intrinsic_atomic_counter_xor_deref:
1259 case nir_intrinsic_atomic_counter_exchange_deref:
1260 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1261 /* Set the counter variable dereference. */
1262 exec_node *param = ir->actual_parameters.get_head();
1263 ir_dereference *counter = (ir_dereference *)param;
1264
1265 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->def);
1266 param = param->get_next();
1267
1268 /* Set the intrinsic destination. */
1269 if (ir->return_deref) {
1270 nir_def_init(&instr->instr, &instr->def, 1, 32);
1271 }
1272
1273 /* Set the intrinsic parameters. */
1274 if (!param->is_tail_sentinel()) {
1275 instr->src[1] =
1276 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1277 param = param->get_next();
1278 }
1279
1280 if (!param->is_tail_sentinel()) {
1281 instr->src[2] =
1282 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1283 param = param->get_next();
1284 }
1285
1286 nir_builder_instr_insert(&b, &instr->instr);
1287 break;
1288 }
1289 case nir_intrinsic_image_deref_load:
1290 case nir_intrinsic_image_deref_store:
1291 case nir_intrinsic_image_deref_atomic:
1292 case nir_intrinsic_image_deref_atomic_swap:
1293 case nir_intrinsic_image_deref_samples:
1294 case nir_intrinsic_image_deref_size:
1295 case nir_intrinsic_image_deref_sparse_load: {
1296 /* Set the image variable dereference. */
1297 exec_node *param = ir->actual_parameters.get_head();
1298 ir_dereference *image = (ir_dereference *)param;
1299 nir_deref_instr *deref = evaluate_deref(image);
1300 const glsl_type *type = deref->type;
1301
1302 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1303
1304 if (op == nir_intrinsic_image_deref_atomic ||
1305 op == nir_intrinsic_image_deref_atomic_swap) {
1306 nir_intrinsic_set_atomic_op(instr, atomic_op);
1307 }
1308
1309 instr->src[0] = nir_src_for_ssa(&deref->def);
1310 param = param->get_next();
1311 nir_intrinsic_set_image_dim(instr,
1312 (glsl_sampler_dim)type->sampler_dimensionality);
1313 nir_intrinsic_set_image_array(instr, type->sampler_array);
1314
1315 /* Set the intrinsic destination. */
1316 if (ir->return_deref) {
1317 unsigned num_components;
1318 if (op == nir_intrinsic_image_deref_sparse_load) {
1319 const glsl_type *dest_type =
1320 glsl_get_field_type(ir->return_deref->type, "texel");
1321 /* One extra component to hold residency code. */
1322 num_components = dest_type->vector_elements + 1;
1323 } else
1324 num_components = ir->return_deref->type->vector_elements;
1325
1326 nir_def_init(&instr->instr, &instr->def, num_components, 32);
1327 }
1328
1329 if (op == nir_intrinsic_image_deref_size) {
1330 instr->num_components = instr->def.num_components;
1331 } else if (op == nir_intrinsic_image_deref_load ||
1332 op == nir_intrinsic_image_deref_sparse_load) {
1333 instr->num_components = instr->def.num_components;
1334 nir_intrinsic_set_dest_type(instr,
1335 nir_get_nir_type_for_glsl_base_type(type->sampled_type));
1336 } else if (op == nir_intrinsic_image_deref_store) {
1337 instr->num_components = 4;
1338 nir_intrinsic_set_src_type(instr,
1339 nir_get_nir_type_for_glsl_base_type(type->sampled_type));
1340 }
1341
1342 if (op == nir_intrinsic_image_deref_size ||
1343 op == nir_intrinsic_image_deref_samples) {
1344 /* image_deref_size takes an LOD parameter which is always 0
1345 * coming from GLSL.
1346 */
1347 if (op == nir_intrinsic_image_deref_size)
1348 instr->src[1] = nir_src_for_ssa(nir_imm_int(&b, 0));
1349 nir_builder_instr_insert(&b, &instr->instr);
1350 break;
1351 }
1352
1353 /* Set the address argument, extending the coordinate vector to four
1354 * components.
1355 */
1356 nir_def *src_addr =
1357 evaluate_rvalue((ir_rvalue *)param);
1358 nir_def *srcs[4];
1359
1360 for (int i = 0; i < 4; i++) {
1361 if (i < glsl_get_sampler_coordinate_components(type))
1362 srcs[i] = nir_channel(&b, src_addr, i);
1363 else
1364 srcs[i] = nir_undef(&b, 1, 32);
1365 }
1366
1367 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1368 param = param->get_next();
1369
1370 /* Set the sample argument, which is undefined for single-sample
1371 * images.
1372 */
1373 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1374 instr->src[2] =
1375 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1376 param = param->get_next();
1377 } else {
1378 instr->src[2] = nir_src_for_ssa(nir_undef(&b, 1, 32));
1379 }
1380
1381 /* Set the intrinsic parameters. */
1382 if (!param->is_tail_sentinel()) {
1383 instr->src[3] =
1384 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1385 param = param->get_next();
1386 } else if (op == nir_intrinsic_image_deref_load ||
1387 op == nir_intrinsic_image_deref_sparse_load) {
1388 instr->src[3] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1389 }
1390
1391 if (!param->is_tail_sentinel()) {
1392 instr->src[4] =
1393 nir_src_for_ssa(evaluate_rvalue((ir_rvalue *)param));
1394 param = param->get_next();
1395 } else if (op == nir_intrinsic_image_deref_store) {
1396 instr->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1397 }
1398
1399 nir_builder_instr_insert(&b, &instr->instr);
1400 break;
1401 }
1402 case nir_intrinsic_barrier: {
1403 /* The nir_intrinsic_barrier follows the general
1404 * semantics of SPIR-V memory barriers, so this and other memory
1405 * barriers use the mapping based on GLSL->SPIR-V from
1406 *
1407 * https://www.khronos.org/registry/OpenGL/extensions/ARB/ARB_gl_spirv.txt
1408 */
1409 if (ir->callee->intrinsic_id == ir_intrinsic_subgroup_barrier) {
1410 nir_barrier(&b, SCOPE_SUBGROUP, SCOPE_SUBGROUP, NIR_MEMORY_ACQ_REL,
1411 nir_var_image | nir_var_mem_ssbo | nir_var_mem_shared | nir_var_mem_global);
1412 break;
1413 }
1414
1415 mesa_scope scope;
1416 unsigned modes;
1417 switch (ir->callee->intrinsic_id) {
1418 case ir_intrinsic_memory_barrier:
1419 scope = SCOPE_DEVICE;
1420 modes = nir_var_image |
1421 nir_var_mem_ssbo |
1422 nir_var_mem_shared |
1423 nir_var_mem_global;
1424 break;
1425 case ir_intrinsic_memory_barrier_buffer:
1426 scope = SCOPE_DEVICE;
1427 modes = nir_var_mem_ssbo |
1428 nir_var_mem_global;
1429 break;
1430 case ir_intrinsic_memory_barrier_image:
1431 scope = SCOPE_DEVICE;
1432 modes = nir_var_image;
1433 break;
1434 case ir_intrinsic_memory_barrier_shared:
1435 /* Both ARB_gl_spirv and glslang lower this to Device scope, so
1436 * follow their lead. Note GL_KHR_vulkan_glsl also does
1437 * something similar.
1438 */
1439 scope = SCOPE_DEVICE;
1440 modes = nir_var_mem_shared;
1441 break;
1442 case ir_intrinsic_group_memory_barrier:
1443 scope = SCOPE_WORKGROUP;
1444 modes = nir_var_image |
1445 nir_var_mem_ssbo |
1446 nir_var_mem_shared |
1447 nir_var_mem_global;
1448 break;
1449 case ir_intrinsic_memory_barrier_atomic_counter:
1450 /* There's no nir_var_atomic_counter, but since atomic counters are lowered
1451 * to SSBOs, we use nir_var_mem_ssbo instead.
1452 */
1453 scope = SCOPE_DEVICE;
1454 modes = nir_var_mem_ssbo;
1455 break;
1456 case ir_intrinsic_subgroup_memory_barrier:
1457 scope = SCOPE_SUBGROUP;
1458 modes = nir_var_image |
1459 nir_var_mem_ssbo |
1460 nir_var_mem_shared |
1461 nir_var_mem_global;
1462 break;
1463 case ir_intrinsic_subgroup_memory_barrier_buffer:
1464 scope = SCOPE_SUBGROUP;
1465 modes = nir_var_mem_ssbo |
1466 nir_var_mem_global;
1467 break;
1468 case ir_intrinsic_subgroup_memory_barrier_shared:
1469 scope = SCOPE_SUBGROUP;
1470 modes = nir_var_mem_shared;
1471 break;
1472 case ir_intrinsic_subgroup_memory_barrier_image:
1473 scope = SCOPE_SUBGROUP;
1474 modes = nir_var_image;
1475 break;
1476 default:
1477 unreachable("invalid intrinsic id for memory barrier");
1478 }
1479
1480 nir_scoped_memory_barrier(&b, scope, NIR_MEMORY_ACQ_REL,
1481 (nir_variable_mode)modes);
1482 break;
1483 }
1484 case nir_intrinsic_store_ssbo: {
1485 exec_node *param = ir->actual_parameters.get_head();
1486 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1487
1488 param = param->get_next();
1489 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1490
1491 param = param->get_next();
1492 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1493
1494 param = param->get_next();
1495 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1496 assert(write_mask);
1497
1498 nir_def *nir_val = evaluate_rvalue(val);
1499 if (glsl_type_is_boolean(val->type))
1500 nir_val = nir_b2i32(&b, nir_val);
1501
1502 instr->src[0] = nir_src_for_ssa(nir_val);
1503 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1504 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1505 intrinsic_set_std430_align(instr, val->type);
1506 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1507 instr->num_components = val->type->vector_elements;
1508
1509 nir_builder_instr_insert(&b, &instr->instr);
1510 break;
1511 }
1512 case nir_intrinsic_load_shared: {
1513 exec_node *param = ir->actual_parameters.get_head();
1514 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1515
1516 nir_intrinsic_set_base(instr, 0);
1517 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1518
1519 const glsl_type *type = ir->return_deref->var->type;
1520 instr->num_components = type->vector_elements;
1521 intrinsic_set_std430_align(instr, type);
1522
1523 /* Setup destination register */
1524 unsigned bit_size = glsl_type_is_boolean(type) ? 32 : glsl_get_bit_size(type);
1525 nir_def_init(&instr->instr, &instr->def, type->vector_elements,
1526 bit_size);
1527
1528 nir_builder_instr_insert(&b, &instr->instr);
1529
1530 /* The value in shared memory is a 32-bit value */
1531 if (glsl_type_is_boolean(type))
1532 ret = nir_b2b1(&b, &instr->def);
1533 break;
1534 }
1535 case nir_intrinsic_store_shared: {
1536 exec_node *param = ir->actual_parameters.get_head();
1537 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1538
1539 param = param->get_next();
1540 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1541
1542 param = param->get_next();
1543 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1544 assert(write_mask);
1545
1546 nir_intrinsic_set_base(instr, 0);
1547 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1548
1549 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1550
1551 nir_def *nir_val = evaluate_rvalue(val);
1552 /* The value in shared memory is a 32-bit value */
1553 if (glsl_type_is_boolean(val->type))
1554 nir_val = nir_b2b32(&b, nir_val);
1555
1556 instr->src[0] = nir_src_for_ssa(nir_val);
1557 instr->num_components = val->type->vector_elements;
1558 intrinsic_set_std430_align(instr, val->type);
1559
1560 nir_builder_instr_insert(&b, &instr->instr);
1561 break;
1562 }
1563 case nir_intrinsic_reduce:
1564 case nir_intrinsic_inclusive_scan:
1565 case nir_intrinsic_exclusive_scan: {
1566 const glsl_type *type = ir->return_deref->type;
1567 nir_def_init(&instr->instr, &instr->def, glsl_get_vector_elements(type),
1568 glsl_get_bit_size(type));
1569 instr->num_components = instr->def.num_components;
1570
1571 exec_node *param = ir->actual_parameters.get_head();
1572 ir_rvalue *value = ((ir_instruction *)param)->as_rvalue();
1573 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1574
1575 param = param->get_next();
1576 if (!param->is_tail_sentinel()) {
1577 ir_constant *size = ((ir_instruction *)param)->as_constant();
1578 assert(size);
1579
1580 nir_intrinsic_set_cluster_size(instr, size->get_uint_component(0));
1581 }
1582
1583 nir_intrinsic_set_reduction_op(instr, get_reduction_op(ir->callee->intrinsic_id, type));
1584
1585 nir_builder_instr_insert(&b, &instr->instr);
1586 break;
1587 }
1588 case nir_intrinsic_shader_clock:
1589 nir_intrinsic_set_memory_scope(instr, SCOPE_SUBGROUP);
1590 FALLTHROUGH;
1591 case nir_intrinsic_begin_invocation_interlock:
1592 case nir_intrinsic_end_invocation_interlock:
1593 case nir_intrinsic_vote_ieq:
1594 case nir_intrinsic_vote_feq:
1595 case nir_intrinsic_vote_any:
1596 case nir_intrinsic_vote_all:
1597 case nir_intrinsic_ballot:
1598 case nir_intrinsic_read_invocation:
1599 case nir_intrinsic_read_first_invocation:
1600 case nir_intrinsic_is_helper_invocation:
1601 case nir_intrinsic_is_sparse_texels_resident:
1602 case nir_intrinsic_elect:
1603 case nir_intrinsic_inverse_ballot:
1604 case nir_intrinsic_ballot_bitfield_extract:
1605 case nir_intrinsic_ballot_bit_count_reduce:
1606 case nir_intrinsic_ballot_bit_count_inclusive:
1607 case nir_intrinsic_ballot_bit_count_exclusive:
1608 case nir_intrinsic_ballot_find_lsb:
1609 case nir_intrinsic_ballot_find_msb:
1610 case nir_intrinsic_shuffle:
1611 case nir_intrinsic_shuffle_xor:
1612 case nir_intrinsic_shuffle_up:
1613 case nir_intrinsic_shuffle_down:
1614 case nir_intrinsic_quad_broadcast:
1615 case nir_intrinsic_quad_swap_horizontal:
1616 case nir_intrinsic_quad_swap_vertical:
1617 case nir_intrinsic_quad_swap_diagonal: {
1618 if (ir->return_deref) {
1619 const glsl_type *type = ir->return_deref->type;
1620 nir_def_init(&instr->instr, &instr->def, glsl_get_vector_elements(type),
1621 glsl_get_bit_size(type));
1622
1623 if (!nir_intrinsic_dest_components(instr))
1624 instr->num_components = instr->def.num_components;
1625 }
1626
1627 unsigned index = 0;
1628 foreach_in_list(ir_rvalue, param, &ir->actual_parameters) {
1629 instr->src[index] = nir_src_for_ssa(evaluate_rvalue(param));
1630
1631 if (!nir_intrinsic_src_components(instr, index))
1632 instr->num_components = nir_src_num_components(instr->src[index]);
1633
1634 index++;
1635 }
1636
1637 nir_builder_instr_insert(&b, &instr->instr);
1638 break;
1639 }
1640 default:
1641 unreachable("not reached");
1642 }
1643
1644 if (ir->return_deref) {
1645 nir_deref_instr *ret_deref = evaluate_deref(ir->return_deref);
1646
1647 if (op == nir_intrinsic_image_deref_sparse_load)
1648 adjust_sparse_variable(ret_deref, ir->return_deref->type, ret);
1649
1650 nir_store_deref(&b, ret_deref, ret, ~0);
1651 }
1652
1653 return;
1654 }
1655
1656 struct hash_entry *entry =
1657 _mesa_hash_table_search(this->overload_table, ir->callee);
1658 assert(entry);
1659 nir_function *callee = (nir_function *) entry->data;
1660
1661 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1662
1663 unsigned i = 0;
1664 nir_deref_instr *ret_deref = NULL;
1665 if (ir->return_deref) {
1666 nir_variable *ret_tmp =
1667 nir_local_variable_create(this->impl, ir->return_deref->type,
1668 "return_tmp");
1669 ret_deref = nir_build_deref_var(&b, ret_tmp);
1670 call->params[i++] = nir_src_for_ssa(&ret_deref->def);
1671 }
1672
1673 foreach_two_lists(formal_node, &ir->callee->parameters,
1674 actual_node, &ir->actual_parameters) {
1675 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1676 ir_variable *sig_param = (ir_variable *) formal_node;
1677
1678 nir_deref_instr *param_deref;
1679 if (sig_param->data.mode == ir_var_function_in &&
1680 glsl_contains_opaque(sig_param->type)) {
1681 param_deref = evaluate_deref(param_rvalue);
1682 } else {
1683 nir_variable *param =
1684 nir_local_variable_create(this->impl, sig_param->type, "param");
1685 param->data.precision = sig_param->data.precision;
1686 param_deref = nir_build_deref_var(&b, param);
1687
1688 if (sig_param->data.mode == ir_var_function_in ||
1689 sig_param->data.mode == ir_var_function_inout) {
1690 if (glsl_type_is_vector_or_scalar(param->type)) {
1691 nir_store_deref(&b, param_deref,
1692 evaluate_rvalue(param_rvalue),
1693 ~0);
1694 } else {
1695 nir_copy_deref(&b, param_deref, evaluate_deref(param_rvalue));
1696 }
1697 }
1698 }
1699
1700 call->params[i] = nir_src_for_ssa(¶m_deref->def);
1701
1702 i++;
1703 }
1704
1705 nir_builder_instr_insert(&b, &call->instr);
1706
1707 /* Copy out params. We must do this after the function call to ensure we
1708 * do not overwrite global variables prematurely.
1709 */
1710 i = ir->return_deref ? 1 : 0;
1711 foreach_two_lists(formal_node, &ir->callee->parameters,
1712 actual_node, &ir->actual_parameters) {
1713 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1714 ir_variable *sig_param = (ir_variable *) formal_node;
1715
1716 if (sig_param->data.mode == ir_var_function_out ||
1717 sig_param->data.mode == ir_var_function_inout) {
1718 if (glsl_type_is_vector_or_scalar(sig_param->type)) {
1719 nir_store_deref(&b, evaluate_deref(param_rvalue),
1720 nir_load_deref(&b, nir_src_as_deref(call->params[i])),
1721 ~0);
1722 } else {
1723 nir_copy_deref(&b, evaluate_deref(param_rvalue),
1724 nir_src_as_deref(call->params[i]));
1725 }
1726 }
1727
1728 i++;
1729 }
1730
1731
1732 if (ir->return_deref) {
1733 if (glsl_type_is_vector_or_scalar(ir->return_deref->type)) {
1734 nir_store_deref(&b, evaluate_deref(ir->return_deref),
1735 nir_load_deref(&b, ret_deref), ~0);
1736 } else {
1737 nir_copy_deref(&b, evaluate_deref(ir->return_deref), ret_deref);
1738 }
1739 }
1740 }
1741
1742 void
visit(ir_assignment * ir)1743 nir_visitor::visit(ir_assignment *ir)
1744 {
1745 unsigned num_components = ir->lhs->type->vector_elements;
1746 unsigned write_mask = ir->write_mask;
1747
1748 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1749 ir->lhs->variable_referenced()->data.precise;
1750
1751 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1752 (write_mask == BITFIELD_MASK(num_components) || write_mask == 0)) {
1753 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1754 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1755 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1756 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1757
1758 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1759 rhs_qualifiers);
1760 return;
1761 }
1762
1763 ir_texture *tex = ir->rhs->as_texture();
1764 bool is_sparse = tex && tex->is_sparse;
1765
1766 if (!is_sparse)
1767 assert(glsl_type_is_scalar(ir->rhs->type) || glsl_type_is_vector(ir->rhs->type));
1768
1769 ir->lhs->accept(this);
1770 nir_deref_instr *lhs_deref = this->deref;
1771 nir_def *src = evaluate_rvalue(ir->rhs);
1772
1773 if (is_sparse) {
1774 adjust_sparse_variable(lhs_deref, tex->type, src);
1775
1776 /* correct component and mask because they are 0 for struct */
1777 num_components = src->num_components;
1778 write_mask = BITFIELD_MASK(num_components);
1779 }
1780
1781 if (write_mask != BITFIELD_MASK(num_components) && write_mask != 0) {
1782 /* GLSL IR will give us the input to the write-masked assignment in a
1783 * single packed vector. So, for example, if the writemask is xzw, then
1784 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1785 * from the load.
1786 */
1787 unsigned swiz[4];
1788 unsigned component = 0;
1789 for (unsigned i = 0; i < 4; i++) {
1790 swiz[i] = write_mask & (1 << i) ? component++ : 0;
1791 }
1792 src = nir_swizzle(&b, src, swiz, num_components);
1793 }
1794
1795 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1796
1797 nir_store_deref_with_access(&b, lhs_deref, src, write_mask,
1798 qualifiers);
1799 }
1800
1801 /*
1802 * Given an instruction, returns a pointer to its destination or NULL if there
1803 * is no destination.
1804 *
1805 * Note that this only handles instructions we generate at this level.
1806 */
1807 static nir_def *
get_instr_def(nir_instr * instr)1808 get_instr_def(nir_instr *instr)
1809 {
1810 nir_alu_instr *alu_instr;
1811 nir_intrinsic_instr *intrinsic_instr;
1812 nir_tex_instr *tex_instr;
1813
1814 switch (instr->type) {
1815 case nir_instr_type_alu:
1816 alu_instr = nir_instr_as_alu(instr);
1817 return &alu_instr->def;
1818
1819 case nir_instr_type_intrinsic:
1820 intrinsic_instr = nir_instr_as_intrinsic(instr);
1821 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1822 return &intrinsic_instr->def;
1823 else
1824 return NULL;
1825
1826 case nir_instr_type_tex:
1827 tex_instr = nir_instr_as_tex(instr);
1828 return &tex_instr->def;
1829
1830 default:
1831 unreachable("not reached");
1832 }
1833
1834 return NULL;
1835 }
1836
1837 void
add_instr(nir_instr * instr,unsigned num_components,unsigned bit_size)1838 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1839 unsigned bit_size)
1840 {
1841 nir_def *def = get_instr_def(instr);
1842
1843 if (def)
1844 nir_def_init(instr, def, num_components, bit_size);
1845
1846 nir_builder_instr_insert(&b, instr);
1847
1848 if (def)
1849 this->result = def;
1850 }
1851
1852 nir_def *
evaluate_rvalue(ir_rvalue * ir)1853 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1854 {
1855 ir->accept(this);
1856 if (ir->as_dereference() || ir->as_constant()) {
1857 /*
1858 * A dereference is being used on the right hand side, which means we
1859 * must emit a variable load.
1860 */
1861
1862 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1863 this->result = nir_load_deref_with_access(&b, this->deref, access);
1864 }
1865
1866 return this->result;
1867 }
1868
1869 static bool
type_is_float(glsl_base_type type)1870 type_is_float(glsl_base_type type)
1871 {
1872 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1873 type == GLSL_TYPE_FLOAT16;
1874 }
1875
1876 static bool
type_is_signed(glsl_base_type type)1877 type_is_signed(glsl_base_type type)
1878 {
1879 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1880 type == GLSL_TYPE_INT16;
1881 }
1882
1883 void
visit(ir_expression * ir)1884 nir_visitor::visit(ir_expression *ir)
1885 {
1886 /* Some special cases */
1887 switch (ir->operation) {
1888 case ir_unop_interpolate_at_centroid:
1889 case ir_binop_interpolate_at_offset:
1890 case ir_binop_interpolate_at_sample: {
1891 ir_dereference *deref = ir->operands[0]->as_dereference();
1892 ir_swizzle *swizzle = NULL;
1893 ir_expression *precision_op = NULL;
1894 if (!deref) {
1895 precision_op = ir->operands[0]->as_expression();
1896 if (precision_op) {
1897 /* For some builtins precision is lowered to mediump for certain
1898 * parameters that ignore precision. For example for Interpolation
1899 * and Bitfield functions.
1900 */
1901 assert(precision_op->operation == ir_unop_f2fmp);
1902 deref = precision_op->operands[0]->as_dereference();
1903 }
1904
1905 if (!deref) {
1906 swizzle = ir->operands[0]->as_swizzle();
1907 assert(swizzle);
1908 deref = swizzle->val->as_dereference();
1909 }
1910
1911 assert(deref);
1912 }
1913
1914 deref->accept(this);
1915
1916 assert(nir_deref_mode_is(this->deref, nir_var_shader_in));
1917 nir_intrinsic_op op;
1918 switch (ir->operation) {
1919 case ir_unop_interpolate_at_centroid:
1920 op = nir_intrinsic_interp_deref_at_centroid;
1921 break;
1922 case ir_binop_interpolate_at_offset:
1923 op = nir_intrinsic_interp_deref_at_offset;
1924 break;
1925 case ir_binop_interpolate_at_sample:
1926 op = nir_intrinsic_interp_deref_at_sample;
1927 break;
1928 default:
1929 unreachable("Invalid interpolation intrinsic");
1930 }
1931
1932 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1933 intrin->num_components = deref->type->vector_elements;
1934 intrin->src[0] = nir_src_for_ssa(&this->deref->def);
1935
1936 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1937 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1938 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1939
1940 unsigned bit_size = glsl_get_bit_size(deref->type);
1941 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1942
1943 if (swizzle) {
1944 unsigned swiz[4] = {
1945 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1946 };
1947
1948 result = nir_swizzle(&b, result, swiz,
1949 swizzle->type->vector_elements);
1950 }
1951
1952 if (precision_op) {
1953 result = nir_build_alu(&b, nir_op_f2fmp, result, NULL, NULL, NULL);
1954 }
1955
1956 return;
1957 }
1958
1959 case ir_unop_ssbo_unsized_array_length: {
1960 nir_intrinsic_instr *intrin =
1961 nir_intrinsic_instr_create(b.shader,
1962 nir_intrinsic_deref_buffer_array_length);
1963
1964 ir_dereference *deref = ir->operands[0]->as_dereference();
1965 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->def);
1966
1967 add_instr(&intrin->instr, 1, 32);
1968 return;
1969 }
1970
1971 default:
1972 break;
1973 }
1974
1975 nir_def *srcs[4];
1976 for (unsigned i = 0; i < ir->num_operands; i++)
1977 srcs[i] = evaluate_rvalue(ir->operands[i]);
1978
1979 glsl_base_type types[4];
1980 for (unsigned i = 0; i < ir->num_operands; i++)
1981 types[i] = ir->operands[i]->type->base_type;
1982
1983 glsl_base_type out_type = ir->type->base_type;
1984
1985 switch (ir->operation) {
1986 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1987 case ir_unop_logic_not:
1988 result = nir_inot(&b, srcs[0]);
1989 break;
1990 case ir_unop_neg:
1991 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1992 : nir_ineg(&b, srcs[0]);
1993 break;
1994 case ir_unop_abs:
1995 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1996 : nir_iabs(&b, srcs[0]);
1997 break;
1998 case ir_unop_clz:
1999 result = nir_uclz(&b, srcs[0]);
2000 break;
2001 case ir_unop_saturate:
2002 assert(type_is_float(types[0]));
2003 result = nir_fsat(&b, srcs[0]);
2004 break;
2005 case ir_unop_sign:
2006 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
2007 : nir_isign(&b, srcs[0]);
2008 break;
2009 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
2010
2011 case ir_unop_rsq:
2012 if (consts->ForceGLSLAbsSqrt)
2013 srcs[0] = nir_fabs(&b, srcs[0]);
2014 result = nir_frsq(&b, srcs[0]);
2015 break;
2016
2017 case ir_unop_sqrt:
2018 if (consts->ForceGLSLAbsSqrt)
2019 srcs[0] = nir_fabs(&b, srcs[0]);
2020 result = nir_fsqrt(&b, srcs[0]);
2021 break;
2022
2023 case ir_unop_exp: result = nir_fexp2(&b, nir_fmul_imm(&b, srcs[0], M_LOG2E)); break;
2024 case ir_unop_log: result = nir_fmul_imm(&b, nir_flog2(&b, srcs[0]), 1.0 / M_LOG2E); break;
2025 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
2026 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
2027 case ir_unop_i2f:
2028 case ir_unop_u2f:
2029 case ir_unop_b2f:
2030 case ir_unop_f2i:
2031 case ir_unop_f2u:
2032 case ir_unop_f2b:
2033 case ir_unop_i2b:
2034 case ir_unop_b2i:
2035 case ir_unop_b2i64:
2036 case ir_unop_d2f:
2037 case ir_unop_f2d:
2038 case ir_unop_f162u:
2039 case ir_unop_u2f16:
2040 case ir_unop_f162i:
2041 case ir_unop_i2f16:
2042 case ir_unop_f162f:
2043 case ir_unop_f2f16:
2044 case ir_unop_f162b:
2045 case ir_unop_b2f16:
2046 case ir_unop_f162d:
2047 case ir_unop_d2f16:
2048 case ir_unop_f162u64:
2049 case ir_unop_u642f16:
2050 case ir_unop_f162i64:
2051 case ir_unop_i642f16:
2052 case ir_unop_i2i:
2053 case ir_unop_u2u:
2054 case ir_unop_d2i:
2055 case ir_unop_d2u:
2056 case ir_unop_d2b:
2057 case ir_unop_i2d:
2058 case ir_unop_u2d:
2059 case ir_unop_i642i:
2060 case ir_unop_i642u:
2061 case ir_unop_i642f:
2062 case ir_unop_i642b:
2063 case ir_unop_i642d:
2064 case ir_unop_u642i:
2065 case ir_unop_u642u:
2066 case ir_unop_u642f:
2067 case ir_unop_u642d:
2068 case ir_unop_i2i64:
2069 case ir_unop_u2i64:
2070 case ir_unop_f2i64:
2071 case ir_unop_d2i64:
2072 case ir_unop_i2u64:
2073 case ir_unop_u2u64:
2074 case ir_unop_f2u64:
2075 case ir_unop_d2u64:
2076 case ir_unop_i2u:
2077 case ir_unop_u2i:
2078 case ir_unop_i642u64:
2079 case ir_unop_u642i64: {
2080 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2081 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2082 result = nir_type_convert(&b, srcs[0], src_type, dst_type,
2083 nir_rounding_mode_undef);
2084 /* b2i and b2f don't have fixed bit-size versions so the builder will
2085 * just assume 32 and we have to fix it up here.
2086 */
2087 result->bit_size = nir_alu_type_get_type_size(dst_type);
2088 break;
2089 }
2090
2091 case ir_unop_f2fmp: {
2092 result = nir_build_alu(&b, nir_op_f2fmp, srcs[0], NULL, NULL, NULL);
2093 break;
2094 }
2095
2096 case ir_unop_i2imp: {
2097 result = nir_build_alu(&b, nir_op_i2imp, srcs[0], NULL, NULL, NULL);
2098 break;
2099 }
2100
2101 case ir_unop_u2ump: {
2102 result = nir_build_alu(&b, nir_op_i2imp, srcs[0], NULL, NULL, NULL);
2103 break;
2104 }
2105
2106 case ir_unop_bitcast_i2f:
2107 case ir_unop_bitcast_f2i:
2108 case ir_unop_bitcast_u2f:
2109 case ir_unop_bitcast_f2u:
2110 case ir_unop_bitcast_i642d:
2111 case ir_unop_bitcast_d2i64:
2112 case ir_unop_bitcast_u642d:
2113 case ir_unop_bitcast_d2u64:
2114 case ir_unop_subroutine_to_int:
2115 /* no-op */
2116 result = nir_mov(&b, srcs[0]);
2117 break;
2118 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2119 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2120 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2121 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2122 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2123 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2124 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2125 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2126 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2127 case ir_unop_dFdx: result = nir_ddx(&b, srcs[0]); break;
2128 case ir_unop_dFdy: result = nir_ddy(&b, srcs[0]); break;
2129 case ir_unop_dFdx_fine: result = nir_ddx_fine(&b, srcs[0]); break;
2130 case ir_unop_dFdy_fine: result = nir_ddy_fine(&b, srcs[0]); break;
2131 case ir_unop_dFdx_coarse: result = nir_ddx_coarse(&b, srcs[0]); break;
2132 case ir_unop_dFdy_coarse: result = nir_ddy_coarse(&b, srcs[0]); break;
2133 case ir_unop_pack_snorm_2x16:
2134 result = nir_pack_snorm_2x16(&b, srcs[0]);
2135 break;
2136 case ir_unop_pack_snorm_4x8:
2137 result = nir_pack_snorm_4x8(&b, srcs[0]);
2138 break;
2139 case ir_unop_pack_unorm_2x16:
2140 result = nir_pack_unorm_2x16(&b, srcs[0]);
2141 break;
2142 case ir_unop_pack_unorm_4x8:
2143 result = nir_pack_unorm_4x8(&b, srcs[0]);
2144 break;
2145 case ir_unop_pack_half_2x16:
2146 result = nir_pack_half_2x16(&b, srcs[0]);
2147 break;
2148 case ir_unop_unpack_snorm_2x16:
2149 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2150 break;
2151 case ir_unop_unpack_snorm_4x8:
2152 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2153 break;
2154 case ir_unop_unpack_unorm_2x16:
2155 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2156 break;
2157 case ir_unop_unpack_unorm_4x8:
2158 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2159 break;
2160 case ir_unop_unpack_half_2x16:
2161 result = nir_unpack_half_2x16(&b, srcs[0]);
2162 break;
2163 case ir_unop_pack_sampler_2x32:
2164 case ir_unop_pack_image_2x32:
2165 case ir_unop_pack_double_2x32:
2166 case ir_unop_pack_int_2x32:
2167 case ir_unop_pack_uint_2x32:
2168 result = nir_pack_64_2x32(&b, srcs[0]);
2169 break;
2170 case ir_unop_unpack_sampler_2x32:
2171 case ir_unop_unpack_image_2x32:
2172 case ir_unop_unpack_double_2x32:
2173 case ir_unop_unpack_int_2x32:
2174 case ir_unop_unpack_uint_2x32:
2175 result = nir_unpack_64_2x32(&b, srcs[0]);
2176 break;
2177 case ir_unop_bitfield_reverse:
2178 result = nir_bitfield_reverse(&b, srcs[0]);
2179 break;
2180 case ir_unop_bit_count:
2181 result = nir_bit_count(&b, srcs[0]);
2182 break;
2183 case ir_unop_find_msb:
2184 switch (types[0]) {
2185 case GLSL_TYPE_UINT:
2186 result = nir_ufind_msb(&b, srcs[0]);
2187 break;
2188 case GLSL_TYPE_INT:
2189 result = nir_ifind_msb(&b, srcs[0]);
2190 break;
2191 default:
2192 unreachable("Invalid type for findMSB()");
2193 }
2194 break;
2195 case ir_unop_find_lsb:
2196 result = nir_find_lsb(&b, srcs[0]);
2197 break;
2198
2199 case ir_unop_get_buffer_size: {
2200 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2201 this->shader,
2202 nir_intrinsic_get_ssbo_size);
2203 load->num_components = ir->type->vector_elements;
2204 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2205 unsigned bit_size = glsl_get_bit_size(ir->type);
2206 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2207 return;
2208 }
2209
2210 case ir_unop_atan:
2211 result = nir_atan(&b, srcs[0]);
2212 break;
2213
2214 case ir_binop_add:
2215 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2216 : nir_iadd(&b, srcs[0], srcs[1]);
2217 break;
2218 case ir_binop_add_sat:
2219 result = type_is_signed(out_type) ? nir_iadd_sat(&b, srcs[0], srcs[1])
2220 : nir_uadd_sat(&b, srcs[0], srcs[1]);
2221 break;
2222 case ir_binop_sub:
2223 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2224 : nir_isub(&b, srcs[0], srcs[1]);
2225 break;
2226 case ir_binop_sub_sat:
2227 result = type_is_signed(out_type) ? nir_isub_sat(&b, srcs[0], srcs[1])
2228 : nir_usub_sat(&b, srcs[0], srcs[1]);
2229 break;
2230 case ir_binop_abs_sub:
2231 /* out_type is always unsigned for ir_binop_abs_sub, so we have to key
2232 * on the type of the sources.
2233 */
2234 result = type_is_signed(types[0]) ? nir_uabs_isub(&b, srcs[0], srcs[1])
2235 : nir_uabs_usub(&b, srcs[0], srcs[1]);
2236 break;
2237 case ir_binop_avg:
2238 result = type_is_signed(out_type) ? nir_ihadd(&b, srcs[0], srcs[1])
2239 : nir_uhadd(&b, srcs[0], srcs[1]);
2240 break;
2241 case ir_binop_avg_round:
2242 result = type_is_signed(out_type) ? nir_irhadd(&b, srcs[0], srcs[1])
2243 : nir_urhadd(&b, srcs[0], srcs[1]);
2244 break;
2245 case ir_binop_mul_32x16:
2246 result = type_is_signed(out_type) ? nir_imul_32x16(&b, srcs[0], srcs[1])
2247 : nir_umul_32x16(&b, srcs[0], srcs[1]);
2248 break;
2249 case ir_binop_mul:
2250 if (type_is_float(out_type))
2251 result = nir_fmul(&b, srcs[0], srcs[1]);
2252 else if (out_type == GLSL_TYPE_INT64 &&
2253 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2254 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2255 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2256 else if (out_type == GLSL_TYPE_UINT64 &&
2257 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2258 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2259 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2260 else
2261 result = nir_imul(&b, srcs[0], srcs[1]);
2262 break;
2263 case ir_binop_div:
2264 if (type_is_float(out_type))
2265 result = nir_fdiv(&b, srcs[0], srcs[1]);
2266 else if (type_is_signed(out_type))
2267 result = nir_idiv(&b, srcs[0], srcs[1]);
2268 else
2269 result = nir_udiv(&b, srcs[0], srcs[1]);
2270 break;
2271 case ir_binop_mod:
2272 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2273 : nir_umod(&b, srcs[0], srcs[1]);
2274 break;
2275 case ir_binop_min:
2276 if (type_is_float(out_type))
2277 result = nir_fmin(&b, srcs[0], srcs[1]);
2278 else if (type_is_signed(out_type))
2279 result = nir_imin(&b, srcs[0], srcs[1]);
2280 else
2281 result = nir_umin(&b, srcs[0], srcs[1]);
2282 break;
2283 case ir_binop_max:
2284 if (type_is_float(out_type))
2285 result = nir_fmax(&b, srcs[0], srcs[1]);
2286 else if (type_is_signed(out_type))
2287 result = nir_imax(&b, srcs[0], srcs[1]);
2288 else
2289 result = nir_umax(&b, srcs[0], srcs[1]);
2290 break;
2291 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2292 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2293 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2294 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2295 case ir_binop_logic_and:
2296 result = nir_iand(&b, srcs[0], srcs[1]);
2297 break;
2298 case ir_binop_logic_or:
2299 result = nir_ior(&b, srcs[0], srcs[1]);
2300 break;
2301 case ir_binop_logic_xor:
2302 result = nir_ixor(&b, srcs[0], srcs[1]);
2303 break;
2304 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], nir_u2u32(&b, srcs[1])); break;
2305 case ir_binop_rshift:
2306 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], nir_u2u32(&b, srcs[1]))
2307 : nir_ushr(&b, srcs[0], nir_u2u32(&b, srcs[1]));
2308 break;
2309 case ir_binop_imul_high:
2310 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2311 : nir_umul_high(&b, srcs[0], srcs[1]);
2312 break;
2313 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2314 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2315 case ir_binop_less:
2316 if (type_is_float(types[0]))
2317 result = nir_flt(&b, srcs[0], srcs[1]);
2318 else if (type_is_signed(types[0]))
2319 result = nir_ilt(&b, srcs[0], srcs[1]);
2320 else
2321 result = nir_ult(&b, srcs[0], srcs[1]);
2322 break;
2323 case ir_binop_gequal:
2324 if (type_is_float(types[0]))
2325 result = nir_fge(&b, srcs[0], srcs[1]);
2326 else if (type_is_signed(types[0]))
2327 result = nir_ige(&b, srcs[0], srcs[1]);
2328 else
2329 result = nir_uge(&b, srcs[0], srcs[1]);
2330 break;
2331 case ir_binop_equal:
2332 if (type_is_float(types[0]))
2333 result = nir_feq(&b, srcs[0], srcs[1]);
2334 else
2335 result = nir_ieq(&b, srcs[0], srcs[1]);
2336 break;
2337 case ir_binop_nequal:
2338 if (type_is_float(types[0]))
2339 result = nir_fneu(&b, srcs[0], srcs[1]);
2340 else
2341 result = nir_ine(&b, srcs[0], srcs[1]);
2342 break;
2343 case ir_binop_all_equal:
2344 if (type_is_float(types[0])) {
2345 switch (ir->operands[0]->type->vector_elements) {
2346 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2347 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2348 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2349 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2350 default:
2351 unreachable("not reached");
2352 }
2353 } else {
2354 switch (ir->operands[0]->type->vector_elements) {
2355 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2356 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2357 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2358 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2359 default:
2360 unreachable("not reached");
2361 }
2362 }
2363 break;
2364 case ir_binop_any_nequal:
2365 if (type_is_float(types[0])) {
2366 switch (ir->operands[0]->type->vector_elements) {
2367 case 1: result = nir_fneu(&b, srcs[0], srcs[1]); break;
2368 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2369 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2370 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2371 default:
2372 unreachable("not reached");
2373 }
2374 } else {
2375 switch (ir->operands[0]->type->vector_elements) {
2376 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2377 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2378 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2379 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2380 default:
2381 unreachable("not reached");
2382 }
2383 }
2384 break;
2385 case ir_binop_dot:
2386 result = nir_fdot(&b, srcs[0], srcs[1]);
2387 break;
2388
2389 case ir_binop_vector_extract:
2390 result = nir_vector_extract(&b, srcs[0], srcs[1]);
2391 break;
2392 case ir_triop_vector_insert:
2393 result = nir_vector_insert(&b, srcs[0], srcs[1], srcs[2]);
2394 break;
2395
2396 case ir_binop_atan2:
2397 result = nir_atan2(&b, srcs[0], srcs[1]);
2398 break;
2399
2400 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2401 case ir_triop_fma:
2402 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2403 break;
2404 case ir_triop_lrp:
2405 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2406 break;
2407 case ir_triop_csel:
2408 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2409 break;
2410 case ir_triop_bitfield_extract:
2411 result = glsl_type_is_int_16_32(ir->type) ?
2412 nir_ibitfield_extract(&b, nir_i2i32(&b, srcs[0]), nir_i2i32(&b, srcs[1]), nir_i2i32(&b, srcs[2])) :
2413 nir_ubitfield_extract(&b, nir_u2u32(&b, srcs[0]), nir_i2i32(&b, srcs[1]), nir_i2i32(&b, srcs[2]));
2414
2415 if (ir->type->base_type == GLSL_TYPE_INT16) {
2416 result = nir_i2i16(&b, result);
2417 } else if (ir->type->base_type == GLSL_TYPE_UINT16) {
2418 result = nir_u2u16(&b, result);
2419 }
2420
2421 break;
2422 case ir_quadop_bitfield_insert:
2423 result = nir_bitfield_insert(&b,
2424 nir_u2u32(&b, srcs[0]), nir_u2u32(&b, srcs[1]),
2425 nir_i2i32(&b, srcs[2]), nir_i2i32(&b, srcs[3]));
2426
2427 if (ir->type->base_type == GLSL_TYPE_INT16) {
2428 result = nir_i2i16(&b, result);
2429 } else if (ir->type->base_type == GLSL_TYPE_UINT16) {
2430 result = nir_u2u16(&b, result);
2431 }
2432
2433 break;
2434 case ir_quadop_vector:
2435 result = nir_vec(&b, srcs, ir->type->vector_elements);
2436 break;
2437
2438 default:
2439 unreachable("not reached");
2440 }
2441
2442 /* The bit-size of the NIR SSA value must match the bit-size of the
2443 * original GLSL IR expression.
2444 */
2445 assert(result->bit_size == glsl_base_type_get_bit_size(ir->type->base_type));
2446 }
2447
2448 void
visit(ir_swizzle * ir)2449 nir_visitor::visit(ir_swizzle *ir)
2450 {
2451 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2452 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2453 ir->type->vector_elements);
2454 }
2455
2456 void
visit(ir_texture * ir)2457 nir_visitor::visit(ir_texture *ir)
2458 {
2459 unsigned num_srcs;
2460 nir_texop op;
2461 switch (ir->op) {
2462 case ir_tex:
2463 op = nir_texop_tex;
2464 num_srcs = 1; /* coordinate */
2465 break;
2466
2467 case ir_txb:
2468 case ir_txl:
2469 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2470 num_srcs = 2; /* coordinate, bias/lod */
2471 break;
2472
2473 case ir_txd:
2474 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2475 num_srcs = 3;
2476 break;
2477
2478 case ir_txf:
2479 op = nir_texop_txf;
2480 if (ir->lod_info.lod != NULL)
2481 num_srcs = 2; /* coordinate, lod */
2482 else
2483 num_srcs = 1; /* coordinate */
2484 break;
2485
2486 case ir_txf_ms:
2487 op = nir_texop_txf_ms;
2488 num_srcs = 2; /* coordinate, sample_index */
2489 break;
2490
2491 case ir_txs:
2492 op = nir_texop_txs;
2493 if (ir->lod_info.lod != NULL)
2494 num_srcs = 1; /* lod */
2495 else
2496 num_srcs = 0;
2497 break;
2498
2499 case ir_lod:
2500 op = nir_texop_lod;
2501 num_srcs = 1; /* coordinate */
2502 break;
2503
2504 case ir_tg4:
2505 op = nir_texop_tg4;
2506 num_srcs = 1; /* coordinate */
2507 break;
2508
2509 case ir_query_levels:
2510 op = nir_texop_query_levels;
2511 num_srcs = 0;
2512 break;
2513
2514 case ir_texture_samples:
2515 op = nir_texop_texture_samples;
2516 num_srcs = 0;
2517 break;
2518
2519 case ir_samples_identical:
2520 op = nir_texop_samples_identical;
2521 num_srcs = 1; /* coordinate */
2522 break;
2523
2524 default:
2525 unreachable("not reached");
2526 }
2527
2528 if (ir->projector != NULL)
2529 num_srcs++;
2530 if (ir->shadow_comparator != NULL)
2531 num_srcs++;
2532 /* offsets are constants we store inside nir_tex_intrs.offsets */
2533 if (ir->offset != NULL && !glsl_type_is_array(ir->offset->type))
2534 num_srcs++;
2535 if (ir->clamp != NULL)
2536 num_srcs++;
2537
2538 /* Add one for the texture deref */
2539 num_srcs += 2;
2540
2541 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2542
2543 instr->op = op;
2544 instr->sampler_dim =
2545 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2546 instr->is_array = ir->sampler->type->sampler_array;
2547 instr->is_shadow = ir->sampler->type->sampler_shadow;
2548
2549 const glsl_type *dest_type
2550 = ir->is_sparse ? glsl_get_field_type(ir->type, "texel") : ir->type;
2551 assert(dest_type != &glsl_type_builtin_error);
2552 if (instr->is_shadow)
2553 instr->is_new_style_shadow = (dest_type->vector_elements == 1);
2554 instr->dest_type = nir_get_nir_type_for_glsl_type(dest_type);
2555 instr->is_sparse = ir->is_sparse;
2556
2557 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2558 nir_def *tex_intrin = nir_deref_texture_src(&b, 32, &sampler_deref->def);
2559
2560 instr->src[0] = nir_tex_src_for_ssa(nir_tex_src_sampler_deref_intrinsic,
2561 tex_intrin);
2562 instr->src[1] = nir_tex_src_for_ssa(nir_tex_src_texture_deref_intrinsic,
2563 tex_intrin);
2564
2565 unsigned src_number = 2;
2566
2567 if (ir->coordinate != NULL) {
2568 instr->coord_components = ir->coordinate->type->vector_elements;
2569 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_coord,
2570 evaluate_rvalue(ir->coordinate));
2571 src_number++;
2572 }
2573
2574 if (ir->projector != NULL) {
2575 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_projector,
2576 evaluate_rvalue(ir->projector));
2577 src_number++;
2578 }
2579
2580 if (ir->shadow_comparator != NULL) {
2581 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_comparator,
2582 evaluate_rvalue(ir->shadow_comparator));
2583 src_number++;
2584 }
2585
2586 if (ir->offset != NULL) {
2587 if (glsl_type_is_array(ir->offset->type)) {
2588 const int size = MIN2(glsl_array_size(ir->offset->type), 4);
2589 for (int i = 0; i < size; i++) {
2590 const ir_constant *c =
2591 ir->offset->as_constant()->get_array_element(i);
2592
2593 for (unsigned j = 0; j < 2; ++j) {
2594 int val = c->get_int_component(j);
2595 instr->tg4_offsets[i][j] = val;
2596 }
2597 }
2598 } else {
2599 assert(glsl_type_is_vector(ir->offset->type) || glsl_type_is_scalar(ir->offset->type));
2600
2601 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_offset,
2602 evaluate_rvalue(ir->offset));
2603 src_number++;
2604 }
2605 }
2606
2607 if (ir->clamp) {
2608 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_min_lod,
2609 evaluate_rvalue(ir->clamp));
2610 src_number++;
2611 }
2612
2613 switch (ir->op) {
2614 case ir_txb:
2615 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_bias,
2616 evaluate_rvalue(ir->lod_info.bias));
2617 src_number++;
2618 break;
2619
2620 case ir_txl:
2621 case ir_txf:
2622 case ir_txs:
2623 if (ir->lod_info.lod != NULL) {
2624 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_lod,
2625 evaluate_rvalue(ir->lod_info.lod));
2626 src_number++;
2627 }
2628 break;
2629
2630 case ir_txd:
2631 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ddx,
2632 evaluate_rvalue(ir->lod_info.grad.dPdx));
2633 src_number++;
2634 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ddy,
2635 evaluate_rvalue(ir->lod_info.grad.dPdy));
2636 src_number++;
2637 break;
2638
2639 case ir_txf_ms:
2640 instr->src[src_number] = nir_tex_src_for_ssa(nir_tex_src_ms_index,
2641 evaluate_rvalue(ir->lod_info.sample_index));
2642 src_number++;
2643 break;
2644
2645 case ir_tg4:
2646 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2647 break;
2648
2649 default:
2650 break;
2651 }
2652
2653 assert(src_number == num_srcs);
2654
2655 unsigned bit_size = glsl_get_bit_size(dest_type);
2656 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2657 }
2658
2659 void
visit(ir_constant * ir)2660 nir_visitor::visit(ir_constant *ir)
2661 {
2662 /*
2663 * We don't know if this variable is an array or struct that gets
2664 * dereferenced, so do the safe thing an make it a variable with a
2665 * constant initializer and return a dereference.
2666 */
2667
2668 nir_variable *var =
2669 nir_local_variable_create(this->impl, ir->type, "const_temp");
2670 var->data.read_only = true;
2671 var->constant_initializer = constant_copy(ir, var);
2672
2673 this->deref = nir_build_deref_var(&b, var);
2674 }
2675
2676 void
visit(ir_dereference_variable * ir)2677 nir_visitor::visit(ir_dereference_variable *ir)
2678 {
2679 if (ir->variable_referenced()->data.mode == ir_var_function_out ||
2680 ir->variable_referenced()->data.mode == ir_var_function_inout ||
2681 ir->variable_referenced()->data.mode == ir_var_function_in) {
2682 unsigned i = (sig->return_type != &glsl_type_builtin_void) ? 1 : 0;
2683
2684 foreach_in_list(ir_variable, param, &sig->parameters) {
2685 if (param == ir->variable_referenced()) {
2686 break;
2687 }
2688 i++;
2689 }
2690
2691 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2692 nir_var_function_temp, ir->type, 0);
2693 return;
2694 }
2695
2696 struct hash_entry *entry =
2697 _mesa_hash_table_search(this->var_table, ir->var);
2698 assert(entry);
2699 nir_variable *var = (nir_variable *) entry->data;
2700
2701 this->deref = nir_build_deref_var(&b, var);
2702 }
2703
2704 void
visit(ir_dereference_record * ir)2705 nir_visitor::visit(ir_dereference_record *ir)
2706 {
2707 ir->record->accept(this);
2708
2709 int field_index = ir->field_idx;
2710 assert(field_index >= 0);
2711
2712 /* sparse texture variable is a struct for ir_variable, but it has been
2713 * converted to a vector for nir_variable.
2714 */
2715 if (this->deref->deref_type == nir_deref_type_var &&
2716 _mesa_set_search(this->sparse_variable_set, this->deref->var)) {
2717 nir_def *load = nir_load_deref(&b, this->deref);
2718 assert(load->num_components >= 2);
2719
2720 nir_def *ssa;
2721 const glsl_type *type = ir->record->type;
2722 if (field_index == glsl_get_field_index(type, "code")) {
2723 /* last channel holds residency code */
2724 ssa = nir_channel(&b, load, load->num_components - 1);
2725 } else {
2726 assert(field_index == glsl_get_field_index(type, "texel"));
2727
2728 unsigned mask = BITFIELD_MASK(load->num_components - 1);
2729 ssa = nir_channels(&b, load, mask);
2730 }
2731
2732 /* still need to create a deref for return */
2733 nir_variable *tmp =
2734 nir_local_variable_create(this->impl, ir->type, "deref_tmp");
2735 this->deref = nir_build_deref_var(&b, tmp);
2736 nir_store_deref(&b, this->deref, ssa, ~0);
2737 } else
2738 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2739 }
2740
2741 void
visit(ir_dereference_array * ir)2742 nir_visitor::visit(ir_dereference_array *ir)
2743 {
2744 nir_def *index = evaluate_rvalue(ir->array_index);
2745
2746 ir->array->accept(this);
2747
2748 this->deref = nir_build_deref_array(&b, this->deref, index);
2749 }
2750
2751 void
visit(ir_barrier *)2752 nir_visitor::visit(ir_barrier *)
2753 {
2754 if (shader->info.stage == MESA_SHADER_COMPUTE) {
2755 nir_barrier(&b, SCOPE_WORKGROUP, SCOPE_WORKGROUP,
2756 NIR_MEMORY_ACQ_REL, nir_var_mem_shared);
2757 } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
2758 nir_barrier(&b, SCOPE_WORKGROUP, SCOPE_WORKGROUP,
2759 NIR_MEMORY_ACQ_REL, nir_var_shader_out);
2760 }
2761 }
2762
2763 nir_shader *
glsl_float64_funcs_to_nir(struct gl_context * ctx,const nir_shader_compiler_options * options)2764 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2765 const nir_shader_compiler_options *options)
2766 {
2767 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2768 * matter because we're not optimizing anything here.
2769 */
2770 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2771 sh->Source = float64_source;
2772 sh->CompileStatus = COMPILE_FAILURE;
2773 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2774
2775 if (!sh->CompileStatus) {
2776 if (sh->InfoLog) {
2777 _mesa_problem(ctx,
2778 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2779 sh->InfoLog, float64_source);
2780 }
2781 return NULL;
2782 }
2783
2784 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2785
2786 nir_visitor v1(&ctx->Const, nir);
2787 nir_function_visitor v2(&v1);
2788 v2.run(sh->ir);
2789 visit_exec_list(sh->ir, &v1);
2790
2791 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2792 sh->Source = NULL;
2793 _mesa_delete_shader(ctx, sh);
2794
2795 nir_validate_shader(nir, "float64_funcs_to_nir");
2796
2797 NIR_PASS(_, nir, nir_lower_variable_initializers, nir_var_function_temp);
2798 NIR_PASS(_, nir, nir_lower_returns);
2799 NIR_PASS(_, nir, nir_inline_functions);
2800 NIR_PASS(_, nir, nir_opt_deref);
2801
2802 /* Do some optimizations to clean up the shader now. By optimizing the
2803 * functions in the library, we avoid having to re-do that work every
2804 * time we inline a copy of a function. Reducing basic blocks also helps
2805 * with compile times.
2806 */
2807 NIR_PASS(_, nir, nir_lower_vars_to_ssa);
2808 NIR_PASS(_, nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
2809 NIR_PASS(_, nir, nir_copy_prop);
2810 NIR_PASS(_, nir, nir_opt_dce);
2811 NIR_PASS(_, nir, nir_opt_cse);
2812 NIR_PASS(_, nir, nir_opt_gcm, true);
2813 NIR_PASS(_, nir, nir_opt_peephole_select, 1, false, false);
2814 NIR_PASS(_, nir, nir_opt_dce);
2815
2816 return nir;
2817 }
2818