xref: /aosp_15_r20/external/ltp/testcases/kernel/syscalls/ptrace/ptrace07.c (revision 49cdfc7efb34551c7342be41a7384b9c40d7cab7)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (c) 2017 Google, Inc.
4  */
5 
6 /*
7  * Regression test for commit 814fb7bb7db5 ("x86/fpu: Don't let userspace set
8  * bogus xcomp_bv"), or CVE-2017-15537.  This bug allowed ptrace(pid,
9  * PTRACE_SETREGSET, NT_X86_XSTATE, &iov) to assign a task an invalid FPU state
10  * --- specifically, by setting reserved bits in xstate_header.xcomp_bv.  This
11  * made restoring the FPU registers fail when switching to the task, causing the
12  * FPU registers to take on the values from other tasks.
13  *
14  * To detect the bug, we have a subprocess run a loop checking its xmm0 register
15  * for corruption.  This detects the case where the FPU state became invalid and
16  * the kernel is not restoring the process's registers.  Note that we have to
17  * set the expected value of xmm0 to all 0's since it is acceptable behavior for
18  * the kernel to simply reinitialize the FPU state upon seeing that it is
19  * invalid.  To increase the chance of detecting the problem, we also create
20  * additional subprocesses that spin with different xmm0 contents.
21  *
22  * Thus bug affected the x86 architecture only.  Other architectures could have
23  * similar bugs as well, but this test has to be x86-specific because it has to
24  * know about the architecture-dependent FPU state.
25  */
26 
27 #include "tst_test.h"
28 
29 #ifdef __x86_64__
30 
31 #include <errno.h>
32 #include <inttypes.h>
33 #include <sched.h>
34 #include <stdbool.h>
35 #include <stdlib.h>
36 #include <sys/uio.h>
37 #include <sys/wait.h>
38 #include <sys/ptrace.h>
39 
40 #include "tst_safe_macros.h"
41 #include "lapi/cpuid.h"
42 
43 #ifndef PTRACE_GETREGSET
44 # define PTRACE_GETREGSET 0x4204
45 #endif
46 
47 #ifndef PTRACE_SETREGSET
48 # define PTRACE_SETREGSET 0x4205
49 #endif
50 
51 #ifndef NT_X86_XSTATE
52 # define NT_X86_XSTATE 0x202
53 #endif
54 
55 #ifndef CPUID_LEAF_XSTATE
56 # define CPUID_LEAF_XSTATE 0xd
57 #endif
58 
check_regs_loop(uint32_t initval)59 static void check_regs_loop(uint32_t initval)
60 {
61 	const unsigned long num_iters = 1000000000;
62 	uint32_t xmm0[4] = { initval, initval, initval, initval };
63 	int status = 1;
64 
65 	asm volatile("   movdqu %0, %%xmm0\n"
66 		     "   mov %0, %%rbx\n"
67 		     "1: dec %2\n"
68 		     "   jz 2f\n"
69 		     "   movdqu %%xmm0, %0\n"
70 		     "   mov %0, %%rax\n"
71 		     "   cmp %%rax, %%rbx\n"
72 		     "   je 1b\n"
73 		     "   jmp 3f\n"
74 		     "2: mov $0, %1\n"
75 		     "3:\n"
76 		     : "+m" (xmm0), "+r" (status)
77 		     : "r" (num_iters) : "rax", "rbx", "xmm0");
78 
79 	if (status) {
80 		tst_res(TFAIL,
81 			"xmm registers corrupted!  initval=%08X, xmm0=%08X%08X%08X%08X\n",
82 			initval, xmm0[0], xmm0[1], xmm0[2], xmm0[3]);
83 	}
84 	exit(status);
85 }
86 
do_test(void)87 static void do_test(void)
88 {
89 	int i;
90 	int num_cpus = tst_ncpus();
91 	pid_t pid;
92 	uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
93 	uint64_t *xstate;
94 	/*
95 	 * CPUID.(EAX=0DH, ECX=0H):EBX: maximum size (bytes, from the beginning
96 	 * of the XSAVE/XRSTOR save area) required by enabled features in XCR0.
97 	 */
98 	__cpuid_count(CPUID_LEAF_XSTATE, ecx, eax, ebx, ecx, edx);
99 	xstate = SAFE_MEMALIGN(64, ebx);
100 	struct iovec iov = { .iov_base = xstate, .iov_len = ebx };
101 	int status;
102 	bool okay;
103 
104 	tst_res(TINFO, "CPUID.(EAX=%u, ECX=0):EAX=%u, EBX=%u, ECX=%u, EDX=%u",
105 		CPUID_LEAF_XSTATE, eax, ebx, ecx, edx);
106 	pid = SAFE_FORK();
107 	if (pid == 0) {
108 		TST_CHECKPOINT_WAKE(0);
109 		check_regs_loop(0x00000000);
110 	}
111 	for (i = 0; i < num_cpus; i++) {
112 		if (SAFE_FORK() == 0)
113 			check_regs_loop(0xDEADBEEF);
114 	}
115 
116 	TST_CHECKPOINT_WAIT(0);
117 	sched_yield();
118 
119 	TEST(ptrace(PTRACE_ATTACH, pid, 0, 0));
120 	if (TST_RET != 0) {
121 		free(xstate);
122 		tst_brk(TBROK | TTERRNO, "PTRACE_ATTACH failed");
123 	}
124 
125 	SAFE_WAITPID(pid, NULL, 0);
126 	TEST(ptrace(PTRACE_GETREGSET, pid, NT_X86_XSTATE, &iov));
127 	if (TST_RET != 0) {
128 		free(xstate);
129 		if (TST_ERR == EIO)
130 			tst_brk(TCONF, "GETREGSET/SETREGSET is unsupported");
131 
132 		if (TST_ERR == EINVAL)
133 			tst_brk(TCONF, "NT_X86_XSTATE is unsupported");
134 
135 		if (TST_ERR == ENODEV)
136 			tst_brk(TCONF, "CPU doesn't support XSAVE instruction");
137 
138 		tst_brk(TBROK | TTERRNO,
139 			"PTRACE_GETREGSET failed with unexpected error");
140 	}
141 
142 	xstate[65] = -1; /* sets all bits in xstate_header.xcomp_bv */
143 
144 	/*
145 	 * Old kernels simply masked out all the reserved bits in the xstate
146 	 * header (causing the PTRACE_SETREGSET command here to succeed), while
147 	 * new kernels will reject them (causing the PTRACE_SETREGSET command
148 	 * here to fail with EINVAL).  We accept either behavior, as neither
149 	 * behavior reliably tells us whether the real bug (which we test for
150 	 * below in either case) is present.
151 	 */
152 	TEST(ptrace(PTRACE_SETREGSET, pid, NT_X86_XSTATE, &iov));
153 	if (TST_RET == 0) {
154 		tst_res(TINFO, "PTRACE_SETREGSET with reserved bits succeeded");
155 	} else if (TST_ERR == EINVAL) {
156 		tst_res(TINFO,
157 			"PTRACE_SETREGSET with reserved bits failed with EINVAL");
158 	} else {
159 		free(xstate);
160 		tst_brk(TBROK | TTERRNO,
161 			"PTRACE_SETREGSET failed with unexpected error");
162 	}
163 
164 	/*
165 	 * It is possible for test child 'pid' to crash on AMD
166 	 * systems (e.g. AMD Opteron(TM) Processor 6234) with
167 	 * older kernels. This causes tracee to stop and sleep
168 	 * in ptrace_stop(). Without resuming the tracee, the
169 	 * test hangs at do_test()->tst_reap_children() called
170 	 * by the library. Use detach here, so we don't need to
171 	 * worry about potential stops after this point.
172 	 */
173 	TEST(ptrace(PTRACE_DETACH, pid, 0, 0));
174 	if (TST_RET != 0) {
175 		free(xstate);
176 		tst_brk(TBROK | TTERRNO, "PTRACE_DETACH failed");
177 	}
178 
179 	/* If child 'pid' crashes, only report it as info. */
180 	SAFE_WAITPID(pid, &status, 0);
181 	if (WIFEXITED(status)) {
182 		tst_res(TINFO, "test child %d exited, retcode: %d",
183 			pid, WEXITSTATUS(status));
184 	}
185 	if (WIFSIGNALED(status)) {
186 		tst_res(TINFO, "test child %d exited, termsig: %d",
187 			pid, WTERMSIG(status));
188 	}
189 
190 	okay = true;
191 	for (i = 0; i < num_cpus; i++) {
192 		SAFE_WAIT(&status);
193 		okay &= (WIFEXITED(status) && WEXITSTATUS(status) == 0);
194 	}
195 	if (okay)
196 		tst_res(TPASS, "wasn't able to set invalid FPU state");
197 	free(xstate);
198 }
199 
200 static struct tst_test test = {
201 	.test_all = do_test,
202 	.forks_child = 1,
203 	.needs_checkpoints = 1,
204 	.supported_archs = (const char *const []) {
205 		"x86_64",
206 		NULL
207 	},
208 	.tags = (const struct tst_tag[]) {
209 		{"linux-git", "814fb7bb7db5"},
210 		{"CVE", "2017-15537"},
211 		{}
212 	}
213 
214 };
215 
216 #else
217 TST_TEST_TCONF("Tests an x86_64 feature");
218 #endif	/* if x86 */
219