xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/vec_set-6.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s
3
4define <4 x float> @test(float %a, float %b, float %c) nounwind {
5; CHECK-LABEL: test:
6; CHECK:       # BB#0:
7; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
8; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
9; CHECK-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,0],xmm1[0,1]
10; CHECK-NEXT:    retl
11  %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1
12  %tmp8 = insertelement <4 x float> %tmp, float %b, i32 2
13  %tmp10 = insertelement <4 x float> %tmp8, float %c, i32 3
14  ret <4 x float> %tmp10
15}
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