xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/reduce-trunc-shl.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
4
5define void @trunc_shl_7_v4i32_v4i64(<4 x i32> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
6; SSE2-LABEL: trunc_shl_7_v4i32_v4i64:
7; SSE2:       # BB#0:
8; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
9; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = mem[0,2,2,3]
10; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
11; SSE2-NEXT:    pslld $7, %xmm1
12; SSE2-NEXT:    movdqa %xmm1, (%rdi)
13; SSE2-NEXT:    retq
14;
15; AVX2-LABEL: trunc_shl_7_v4i32_v4i64:
16; AVX2:       # BB#0:
17; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = mem[0,2,0,2,4,6,4,6]
18; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
19; AVX2-NEXT:    vpslld $7, %xmm0, %xmm0
20; AVX2-NEXT:    vmovdqa %xmm0, (%rdi)
21; AVX2-NEXT:    vzeroupper
22; AVX2-NEXT:    retq
23  %val = load <4 x i64>, <4 x i64> addrspace(1)* %in
24  %shl = shl <4 x i64> %val, <i64 7, i64 7, i64 7, i64 7>
25  %trunc = trunc <4 x i64> %shl to <4 x i32>
26  store <4 x i32> %trunc, <4 x i32> addrspace(1)* %out
27  ret void
28}
29