1; RUN: llc < %s -march=x86 2; PR26652 3 4define <2 x i32> @test(<4 x i32> %a, <4 x i32> %b) { 5entry: 6 %0 = or <4 x i32> %a, %b 7 %1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3> 8 ret <2 x i32> %1 9} 10