xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/no-sse2-avg.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; REQUIRES: asserts
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
4
5define <16 x i8> @PR27973() {
6; CHECK-LABEL: PR27973:
7; CHECK:       # BB#0:
8; CHECK-NEXT:    movb $0, 15(%rdi)
9; CHECK-NEXT:    movb $0, 14(%rdi)
10; CHECK-NEXT:    movb $0, 13(%rdi)
11; CHECK-NEXT:    movb $0, 12(%rdi)
12; CHECK-NEXT:    movb $0, 11(%rdi)
13; CHECK-NEXT:    movb $0, 10(%rdi)
14; CHECK-NEXT:    movb $0, 9(%rdi)
15; CHECK-NEXT:    movb $0, 8(%rdi)
16; CHECK-NEXT:    movb $0, 7(%rdi)
17; CHECK-NEXT:    movb $0, 6(%rdi)
18; CHECK-NEXT:    movb $0, 5(%rdi)
19; CHECK-NEXT:    movb $0, 4(%rdi)
20; CHECK-NEXT:    movb $0, 3(%rdi)
21; CHECK-NEXT:    movb $0, 2(%rdi)
22; CHECK-NEXT:    movb $0, 1(%rdi)
23; CHECK-NEXT:    movb $0, (%rdi)
24; CHECK-NEXT:    movq %rdi, %rax
25; CHECK-NEXT:    retq
26;
27  %t0 = zext <16 x i8> zeroinitializer to <16 x i32>
28  %t1 = add nuw nsw <16 x i32> %t0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
29  %t2 = lshr <16 x i32> %t1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
30  %t3 = trunc <16 x i32> %t2 to <16 x i8>
31  ret <16 x i8> %t3
32}
33