xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1; RUN: llc < %s -march=x86-64 -stress-sched | FileCheck %s
2; REQUIRES: asserts
3; Test interference between physreg aliases during preRAsched.
4; mul wants an operand in AL, but call clobbers it.
5
6define i8 @f(i8 %v1, i8 %v2) nounwind {
7entry:
8; CHECK: callq
9; CHECK: movl %{{.*}}, %eax
10; CHECK: mulb
11; CHECK: mulb
12        %rval = tail call i8 @bar() nounwind
13        %m1 = mul i8 %v1, %v2
14        %m2 = mul i8 %m1, %rval
15        ret i8 %m2
16}
17
18declare i8 @bar()
19