xref: /aosp_15_r20/external/llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu \
2; RUN:   -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu \
4; RUN:   -verify-machineinstrs < %s | FileCheck %s
5define <4 x i32> @test1(<4 x i32> %a) {
6entry:
7; CHECK-LABEL: test1
8; CHECK: xxswapd 34, 34
9  %vecins6 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
10  ret <4 x i32> %vecins6
11}
12
13define <8 x i16> @test2(<8 x i16> %a) #0 {
14entry:
15; CHECK-LABEL: test2
16; CHECK: xxswapd 34, 34
17  %vecins14 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
18  ret <8 x i16> %vecins14
19}
20
21define <16 x i8> @test3(<16 x i8> %a) #0 {
22entry:
23; CHECK-LABEL: test3
24; CHECK: xxswapd 34, 34
25  %vecins30 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
26  ret <16 x i8> %vecins30
27}
28