xref: /aosp_15_r20/external/llvm/test/CodeGen/Mips/msa/elm_cxcmsa.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1; Test the MSA ctcmsa and cfcmsa intrinsics (which are encoded with the ELM
2; instruction format).
3
4; RUN: llc -march=mips -mattr=+msa,+fp64 -verify-machineinstrs < %s | FileCheck %s
5; RUN: llc -march=mipsel -mattr=+msa,+fp64 -verify-machineinstrs < %s | FileCheck %s
6
7define i32 @msa_ir_cfcmsa_test() nounwind {
8entry:
9  %0 = tail call i32 @llvm.mips.cfcmsa(i32 0)
10  ret i32 %0
11}
12
13; CHECK: msa_ir_cfcmsa_test:
14; CHECK: cfcmsa $[[R1:[0-9]+]], $0
15; CHECK: .size msa_ir_cfcmsa_test
16;
17define i32 @msa_csr_cfcmsa_test() nounwind {
18entry:
19  %0 = tail call i32 @llvm.mips.cfcmsa(i32 1)
20  ret i32 %0
21}
22
23; CHECK: msa_csr_cfcmsa_test:
24; CHECK: cfcmsa $[[R1:[0-9]+]], $1
25; CHECK: .size msa_csr_cfcmsa_test
26;
27define i32 @msa_access_cfcmsa_test() nounwind {
28entry:
29  %0 = tail call i32 @llvm.mips.cfcmsa(i32 2)
30  ret i32 %0
31}
32
33; CHECK: msa_access_cfcmsa_test:
34; CHECK: cfcmsa $[[R1:[0-9]+]], $2
35; CHECK: .size msa_access_cfcmsa_test
36;
37define i32 @msa_save_cfcmsa_test() nounwind {
38entry:
39  %0 = tail call i32 @llvm.mips.cfcmsa(i32 3)
40  ret i32 %0
41}
42
43; CHECK: msa_save_cfcmsa_test:
44; CHECK: cfcmsa $[[R1:[0-9]+]], $3
45; CHECK: .size msa_save_cfcmsa_test
46;
47define i32 @msa_modify_cfcmsa_test() nounwind {
48entry:
49  %0 = tail call i32 @llvm.mips.cfcmsa(i32 4)
50  ret i32 %0
51}
52
53; CHECK: msa_modify_cfcmsa_test:
54; CHECK: cfcmsa $[[R1:[0-9]+]], $4
55; CHECK: .size msa_modify_cfcmsa_test
56;
57define i32 @msa_request_cfcmsa_test() nounwind {
58entry:
59  %0 = tail call i32 @llvm.mips.cfcmsa(i32 5)
60  ret i32 %0
61}
62
63; CHECK: msa_request_cfcmsa_test:
64; CHECK: cfcmsa $[[R1:[0-9]+]], $5
65; CHECK: .size msa_request_cfcmsa_test
66;
67define i32 @msa_map_cfcmsa_test() nounwind {
68entry:
69  %0 = tail call i32 @llvm.mips.cfcmsa(i32 6)
70  ret i32 %0
71}
72
73; CHECK: msa_map_cfcmsa_test:
74; CHECK: cfcmsa $[[R1:[0-9]+]], $6
75; CHECK: .size msa_map_cfcmsa_test
76;
77define i32 @msa_unmap_cfcmsa_test() nounwind {
78entry:
79  %0 = tail call i32 @llvm.mips.cfcmsa(i32 7)
80  ret i32 %0
81}
82
83; CHECK: msa_unmap_cfcmsa_test:
84; CHECK: cfcmsa $[[R1:[0-9]+]], $7
85; CHECK: .size msa_unmap_cfcmsa_test
86;
87define void @msa_ir_ctcmsa_test() nounwind {
88entry:
89  tail call void @llvm.mips.ctcmsa(i32 0, i32 1)
90  ret void
91}
92
93; CHECK: msa_ir_ctcmsa_test:
94; CHECK: ctcmsa $0
95; CHECK: .size msa_ir_ctcmsa_test
96;
97define void @msa_csr_ctcmsa_test() nounwind {
98entry:
99  tail call void @llvm.mips.ctcmsa(i32 1, i32 1)
100  ret void
101}
102
103; CHECK: msa_csr_ctcmsa_test:
104; CHECK: ctcmsa $1
105; CHECK: .size msa_csr_ctcmsa_test
106;
107define void @msa_access_ctcmsa_test() nounwind {
108entry:
109  tail call void @llvm.mips.ctcmsa(i32 2, i32 1)
110  ret void
111}
112
113; CHECK: msa_access_ctcmsa_test:
114; CHECK: ctcmsa $2
115; CHECK: .size msa_access_ctcmsa_test
116;
117define void @msa_save_ctcmsa_test() nounwind {
118entry:
119  tail call void @llvm.mips.ctcmsa(i32 3, i32 1)
120  ret void
121}
122
123; CHECK: msa_save_ctcmsa_test:
124; CHECK: ctcmsa $3
125; CHECK: .size msa_save_ctcmsa_test
126;
127define void @msa_modify_ctcmsa_test() nounwind {
128entry:
129  tail call void @llvm.mips.ctcmsa(i32 4, i32 1)
130  ret void
131}
132
133; CHECK: msa_modify_ctcmsa_test:
134; CHECK: ctcmsa $4
135; CHECK: .size msa_modify_ctcmsa_test
136;
137define void @msa_request_ctcmsa_test() nounwind {
138entry:
139  tail call void @llvm.mips.ctcmsa(i32 5, i32 1)
140  ret void
141}
142
143; CHECK: msa_request_ctcmsa_test:
144; CHECK: ctcmsa $5
145; CHECK: .size msa_request_ctcmsa_test
146;
147define void @msa_map_ctcmsa_test() nounwind {
148entry:
149  tail call void @llvm.mips.ctcmsa(i32 6, i32 1)
150  ret void
151}
152
153; CHECK: msa_map_ctcmsa_test:
154; CHECK: ctcmsa $6
155; CHECK: .size msa_map_ctcmsa_test
156;
157define void @msa_unmap_ctcmsa_test() nounwind {
158entry:
159  tail call void @llvm.mips.ctcmsa(i32 7, i32 1)
160  ret void
161}
162
163; CHECK: msa_unmap_ctcmsa_test:
164; CHECK: ctcmsa $7
165; CHECK: .size msa_unmap_ctcmsa_test
166;
167declare i32 @llvm.mips.cfcmsa(i32) nounwind
168declare void @llvm.mips.ctcmsa(i32, i32) nounwind
169