xref: /aosp_15_r20/external/llvm/test/CodeGen/MIR/X86/machine-instructions.mir (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
2# This test ensures that the MIR parser parses X86 machine instructions
3# correctly.
4
5--- |
6
7  define i32 @inc(i32 %a) {
8  entry:
9    %b = mul i32 %a, 11
10    ret i32 %b
11  }
12
13...
14---
15# CHECK: name: inc
16name:            inc
17body: |
18  bb.0.entry:
19    ; CHECK:      MOV32rr
20    ; CHECK-NEXT: RETQ
21    %eax = MOV32rr %eax
22     RETQ %eax
23...
24