xref: /aosp_15_r20/external/llvm/test/CodeGen/Hexagon/vect/vect-no-tfrs.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)

; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-NOT: r1:0 = combine(r1, r0)

define <4 x i8> @t_i4x8(<4 x i8> %a, <4 x i8> %b) nounwind {
entry:
	%0 = mul <4 x i8> %a, %b
	ret <4 x i8> %0
}