xref: /aosp_15_r20/external/llvm/test/CodeGen/AArch64/arm64-2012-05-07-DAGCombineVectorExtract.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; RUN: llc < %s -march=arm64 | FileCheck %s
2
3define i32 @foo(<4 x i32> %a, i32 %n) nounwind {
4; CHECK-LABEL: foo:
5; CHECK: fmov w0, s0
6; CHECK-NEXT: ret
7  %b = bitcast <4 x i32> %a to i128
8  %c = trunc i128 %b to i32
9  ret i32 %c
10}
11
12define i64 @bar(<2 x i64> %a, i64 %n) nounwind {
13; CHECK-LABEL: bar:
14; CHECK: fmov x0, d0
15; CHECK-NEXT: ret
16  %b = bitcast <2 x i64> %a to i128
17  %c = trunc i128 %b to i64
18  ret i64 %c
19}
20
21