xref: /aosp_15_r20/external/libxaac/decoder/ixheaacd_mps_apply_m1.c (revision 15dc779a375ca8b5125643b829a8aa4b70d7f451)
1 /******************************************************************************
2  *
3  * Copyright (C) 2023 The Android Open Source Project
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at:
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  *****************************************************************************
18  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include "ixheaac_type_def.h"
22 #include "ixheaacd_mps_struct_def.h"
23 #include "ixheaacd_mps_res_rom.h"
24 #include "ixheaacd_mps_aac_struct.h"
25 #include "ixheaac_constants.h"
26 #include "ixheaac_basic_ops32.h"
27 #include "ixheaac_basic_ops40.h"
28 #include "ixheaacd_bitbuffer.h"
29 #include "ixheaacd_common_rom.h"
30 #include "ixheaacd_sbrdecsettings.h"
31 #include "ixheaacd_sbr_scale.h"
32 #include "ixheaacd_env_extr_part.h"
33 #include "ixheaacd_sbr_rom.h"
34 #include "ixheaacd_hybrid.h"
35 #include "ixheaacd_ps_dec.h"
36 #include "ixheaacd_mps_polyphase.h"
37 #include "ixheaacd_config.h"
38 #include "ixheaacd_qmf_dec.h"
39 #include "ixheaacd_mps_dec.h"
40 #include "ixheaacd_mps_macro_def.h"
41 #include "ixheaacd_mps_apply_common.h"
42 #include "ixheaacd_mps_basic_op.h"
43 
ixheaacd_mps_apply_m1(ia_heaac_mps_state_struct * pstr_mps_state)44 VOID ixheaacd_mps_apply_m1(ia_heaac_mps_state_struct *pstr_mps_state) {
45   ia_mps_dec_reuse_array_struct *p_array_struct = pstr_mps_state->array_struct;
46   ia_mps_dec_m1_param_struct *m1_param = p_array_struct->m1_param;
47   WORD32 ts, qs, row, col;
48   WORD32 temp_1, temp_2;
49   WORD32 *rout_real_ptr, *rout_imag_ptr, *rout_kernel_real_ptr, *rout_kernel_imag_ptr;
50   WORD32 *v_real, *v_imag, *x_real, *x_imag;
51   WORD32 *p_buffer_real, *p_buffer_imag, *p_v_real, *p_v_imag;
52 
53   ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
54   WORD32 *m1_param_real_prev = curr_state->mps_persistent_mem.m1_param_real_prev;
55   WORD32 *m1_param_imag_prev = curr_state->mps_persistent_mem.m1_param_imag_prev;
56   WORD32 imag_present = curr_state->m1_param_imag_present;
57   WORD32 v_channels = curr_state->num_v_channels;
58   WORD32 x_channels = curr_state->num_x_channels;
59   WORD32 hybrid_bands = curr_state->hybrid_bands;
60   WORD32 num_parameter_bands = curr_state->num_parameter_bands;
61   WORD32 *index = curr_state->index;
62 
63   WORD32 *p_x_re, *p_x_im;
64 
65   WORD32 hyb_bands = hybrid_bands;
66   WORD32 time_slots = curr_state->time_slots;
67   SIZE_T params[4];
68 
69   params[0] = (SIZE_T)(&curr_state->kernels[0]);
70   params[1] = time_slots;
71   params[2] = num_parameter_bands;
72   params[3] = hybrid_bands;
73 
74   rout_real_ptr = pstr_mps_state->mps_scratch_mem_v;
75   rout_kernel_real_ptr = rout_real_ptr + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
76                                              TSXHB, sizeof(*rout_kernel_real_ptr), BYTE_ALIGN_8);
77   rout_imag_ptr = rout_kernel_real_ptr +
78                   IXHEAAC_GET_SIZE_ALIGNED_TYPE(TSXHB, sizeof(*rout_imag_ptr), BYTE_ALIGN_8);
79   rout_kernel_imag_ptr = rout_imag_ptr + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
80                                              TSXHB, sizeof(*rout_kernel_imag_ptr), BYTE_ALIGN_8);
81 
82   p_buffer_real = p_array_struct->buf_real;
83   p_buffer_imag = p_array_struct->buf_imag;
84 
85   for (row = 0; row < v_channels; row++) {
86     v_real = p_buffer_real;
87     v_imag = p_buffer_imag;
88 
89     for (ts = 0; ts < time_slots; ts++) {
90       memset(v_real, 0, hybrid_bands * sizeof(v_real[0]));
91       memset(v_imag, 0, hybrid_bands * sizeof(v_imag[0]));
92 
93       v_real += MAX_HYBRID_BANDS;
94       v_imag += MAX_HYBRID_BANDS;
95     }
96     p_buffer_real += TSXHB;
97     p_buffer_imag += TSXHB;
98   }
99 
100   p_buffer_real = p_array_struct->buf_real;
101   p_buffer_imag = p_array_struct->buf_imag;
102 
103   if (!imag_present) {
104     for (row = 0; row < v_channels; row++) {
105       WORD32 *p_x_real = p_array_struct->x_real;
106       WORD32 *p_x_imag = p_array_struct->x_imag;
107 
108       for (col = 0; col < x_channels; col++) {
109         if (pstr_mps_state->m1_param_present[row][col]) {
110           WORD32 idx = index[col];
111 
112           ixheaacd_dec_interp_umx(m1_param->m1_param_real[row][col], rout_real_ptr,
113                                   m1_param_real_prev, pstr_mps_state);
114           ixheaacd_apply_abs_kernels(rout_real_ptr, rout_kernel_real_ptr, params);
115 
116           p_v_real = p_buffer_real;
117           p_v_imag = p_buffer_imag;
118 
119           p_x_re = p_x_real;
120           p_x_im = p_x_imag;
121 
122           for (ts = 0; ts < time_slots; ts++) {
123             v_real = p_v_real;
124             v_imag = p_v_imag;
125 
126             x_real = p_x_re;
127             x_imag = p_x_im;
128 
129             for (qs = 0; qs < idx; qs++) {
130               temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
131               *v_real = *v_real + temp_1;
132               v_real++;
133 
134               temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
135               rout_kernel_real_ptr++;
136               *v_imag = *v_imag + temp_1;
137               v_imag++;
138 
139               x_real++;
140               x_imag++;
141             }
142             rout_kernel_real_ptr += hyb_bands - idx;
143 
144             p_v_real += MAX_HYBRID_BANDS;
145             p_v_imag += MAX_HYBRID_BANDS;
146 
147             p_x_re += MAX_HYBRID_BANDS;
148             p_x_im += MAX_HYBRID_BANDS;
149           }
150 
151           m1_param_real_prev += num_parameter_bands;
152 
153           p_x_real += TSXHB;
154           p_x_imag += TSXHB;
155         } else {
156           m1_param_real_prev += num_parameter_bands;
157 
158           p_x_real += TSXHB;
159           p_x_imag += TSXHB;
160         }
161       }
162       p_buffer_real += TSXHB;
163       p_buffer_imag += TSXHB;
164     }
165   } else {
166     for (row = 0; row < v_channels; row++) {
167       WORD32 *p_x_real = p_array_struct->x_real;
168       WORD32 *p_x_imag = p_array_struct->x_imag;
169 
170       for (col = 0; col < x_channels; col++) {
171         if (pstr_mps_state->m1_param_present[row][col]) {
172           WORD32 idx = index[col];
173 
174           ixheaacd_dec_interp_umx(m1_param->m1_param_real[row][col], rout_real_ptr,
175                                   m1_param_real_prev, pstr_mps_state);
176           ixheaacd_dec_interp_umx(m1_param->m1_param_imag[row][col], rout_imag_ptr,
177                                   m1_param_imag_prev, pstr_mps_state);
178           ixheaacd_apply_abs_kernels(rout_real_ptr, rout_kernel_real_ptr, params);
179           ixheaacd_apply_abs_kernels(rout_imag_ptr, rout_kernel_imag_ptr, params);
180 
181           p_v_real = p_buffer_real;
182           p_v_imag = p_buffer_imag;
183 
184           p_x_re = p_x_real;
185           p_x_im = p_x_imag;
186 
187           for (ts = 0; ts < time_slots; ts++) {
188             v_real = p_v_real;
189             v_imag = p_v_imag;
190 
191             x_real = p_x_re;
192             x_imag = p_x_im;
193             for (qs = 0; qs < 2; qs++) {
194               temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
195               temp_2 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_imag_ptr);
196               temp_1 += temp_2;
197 
198               *v_real = *v_real + temp_1;
199               v_real++;
200 
201               temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
202               rout_kernel_real_ptr++;
203               temp_2 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_imag_ptr);
204               rout_kernel_imag_ptr++;
205               temp_1 -= temp_2;
206 
207               *v_imag = *v_imag + temp_1;
208               v_imag++;
209 
210               x_real++;
211               x_imag++;
212             }
213             for (; qs < idx; qs++) {
214               temp_1 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_real_ptr);
215               temp_2 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_imag_ptr);
216               temp_1 -= temp_2;
217 
218               *v_real = *v_real + temp_1;
219               v_real++;
220 
221               temp_1 = ixheaacd_mps_mult32_shr_15(*x_imag, *rout_kernel_real_ptr);
222               rout_kernel_real_ptr++;
223               temp_2 = ixheaacd_mps_mult32_shr_15(*x_real, *rout_kernel_imag_ptr);
224               rout_kernel_imag_ptr++;
225               temp_1 += temp_2;
226 
227               *v_imag = *v_imag + temp_1;
228               v_imag++;
229 
230               x_real++;
231               x_imag++;
232             }
233             rout_kernel_real_ptr += hyb_bands - idx;
234             rout_kernel_imag_ptr += hyb_bands - idx;
235 
236             p_v_real += MAX_HYBRID_BANDS;
237             p_v_imag += MAX_HYBRID_BANDS;
238 
239             p_x_re += MAX_HYBRID_BANDS;
240             p_x_im += MAX_HYBRID_BANDS;
241           }
242 
243           m1_param_real_prev += num_parameter_bands;
244           m1_param_imag_prev += num_parameter_bands;
245 
246           p_x_real += TSXHB;
247           p_x_imag += TSXHB;
248         } else {
249           m1_param_real_prev += num_parameter_bands;
250           m1_param_imag_prev += num_parameter_bands;
251 
252           p_x_real += TSXHB;
253           p_x_imag += TSXHB;
254         }
255       }
256       p_buffer_real += TSXHB;
257       p_buffer_imag += TSXHB;
258     }
259   }
260   return;
261 }
262