1 /*
2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved.
3 *
4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree.
9 */
10
11 #include <assert.h>
12
13 #include "./vp9_rtcd.h"
14 #include "vp9/common/vp9_enums.h"
15 #include "vp9/encoder/mips/msa/vp9_fdct_msa.h"
16
vp9_fwht4x4_msa(const int16_t * input,int16_t * output,int32_t src_stride)17 void vp9_fwht4x4_msa(const int16_t *input, int16_t *output,
18 int32_t src_stride) {
19 v8i16 in0, in1, in2, in3, in4;
20
21 LD_SH4(input, src_stride, in0, in1, in2, in3);
22
23 in0 += in1;
24 in3 -= in2;
25 in4 = (in0 - in3) >> 1;
26 SUB2(in4, in1, in4, in2, in1, in2);
27 in0 -= in2;
28 in3 += in1;
29
30 TRANSPOSE4x4_SH_SH(in0, in2, in3, in1, in0, in2, in3, in1);
31
32 in0 += in2;
33 in1 -= in3;
34 in4 = (in0 - in1) >> 1;
35 SUB2(in4, in2, in4, in3, in2, in3);
36 in0 -= in3;
37 in1 += in2;
38
39 SLLI_4V(in0, in1, in2, in3, 2);
40
41 TRANSPOSE4x4_SH_SH(in0, in3, in1, in2, in0, in3, in1, in2);
42
43 ST4x2_UB(in0, output, 4);
44 ST4x2_UB(in3, output + 4, 4);
45 ST4x2_UB(in1, output + 8, 4);
46 ST4x2_UB(in2, output + 12, 4);
47 }
48
vp9_fht4x4_msa(const int16_t * input,int16_t * output,int32_t stride,int32_t tx_type)49 void vp9_fht4x4_msa(const int16_t *input, int16_t *output, int32_t stride,
50 int32_t tx_type) {
51 v8i16 in0, in1, in2, in3;
52
53 LD_SH4(input, stride, in0, in1, in2, in3);
54
55 /* fdct4 pre-process */
56 {
57 v8i16 temp, mask;
58 v16i8 zero = { 0 };
59 v16i8 one = __msa_ldi_b(1);
60
61 mask = (v8i16)__msa_sldi_b(zero, one, 15);
62 SLLI_4V(in0, in1, in2, in3, 4);
63 temp = __msa_ceqi_h(in0, 0);
64 temp = (v8i16)__msa_xori_b((v16u8)temp, 255);
65 temp = mask & temp;
66 in0 += temp;
67 }
68
69 switch (tx_type) {
70 case DCT_DCT:
71 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
72 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
73 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
74 break;
75 case ADST_DCT:
76 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
77 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
78 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
79 break;
80 case DCT_ADST:
81 VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
82 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
83 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
84 break;
85 case ADST_ADST:
86 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
87 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
88 VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
89 break;
90 default: assert(0); break;
91 }
92
93 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
94 ADD4(in0, 1, in1, 1, in2, 1, in3, 1, in0, in1, in2, in3);
95 SRA_4V(in0, in1, in2, in3, 2);
96 PCKEV_D2_SH(in1, in0, in3, in2, in0, in2);
97 ST_SH2(in0, in2, output, 8);
98 }
99