xref: /aosp_15_r20/external/libmpeg2/decoder/impeg2d_api_main.c (revision a97c2a1f0a796dc32bed80d3353c69c5fc07c750)
1*a97c2a1fSXin Li /******************************************************************************
2*a97c2a1fSXin Li  *
3*a97c2a1fSXin Li  * Copyright (C) 2015 The Android Open Source Project
4*a97c2a1fSXin Li  *
5*a97c2a1fSXin Li  * Licensed under the Apache License, Version 2.0 (the "License");
6*a97c2a1fSXin Li  * you may not use this file except in compliance with the License.
7*a97c2a1fSXin Li  * You may obtain a copy of the License at:
8*a97c2a1fSXin Li  *
9*a97c2a1fSXin Li  * http://www.apache.org/licenses/LICENSE-2.0
10*a97c2a1fSXin Li  *
11*a97c2a1fSXin Li  * Unless required by applicable law or agreed to in writing, software
12*a97c2a1fSXin Li  * distributed under the License is distributed on an "AS IS" BASIS,
13*a97c2a1fSXin Li  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*a97c2a1fSXin Li  * See the License for the specific language governing permissions and
15*a97c2a1fSXin Li  * limitations under the License.
16*a97c2a1fSXin Li  *
17*a97c2a1fSXin Li  *****************************************************************************
18*a97c2a1fSXin Li  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*a97c2a1fSXin Li */
20*a97c2a1fSXin Li /*****************************************************************************/
21*a97c2a1fSXin Li /*                                                                           */
22*a97c2a1fSXin Li /*  File Name         : decoder_api_main.c                                   */
23*a97c2a1fSXin Li /*                                                                           */
24*a97c2a1fSXin Li /*  Description       : Functions which recieve the API call from user       */
25*a97c2a1fSXin Li /*                                                                           */
26*a97c2a1fSXin Li /*  List of Functions : <List the functions defined in this file>            */
27*a97c2a1fSXin Li /*                                                                           */
28*a97c2a1fSXin Li /*  Issues / Problems : None                                                 */
29*a97c2a1fSXin Li /*                                                                           */
30*a97c2a1fSXin Li /*  Revision History  :                                                      */
31*a97c2a1fSXin Li /*                                                                           */
32*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
33*a97c2a1fSXin Li /*         30 05 2007   Rajneesh        Creation                             */
34*a97c2a1fSXin Li /*                                                                           */
35*a97c2a1fSXin Li /*****************************************************************************/
36*a97c2a1fSXin Li 
37*a97c2a1fSXin Li /*****************************************************************************/
38*a97c2a1fSXin Li /* File Includes                                                             */
39*a97c2a1fSXin Li /*****************************************************************************/
40*a97c2a1fSXin Li 
41*a97c2a1fSXin Li /* System include files */
42*a97c2a1fSXin Li #include <stdio.h>
43*a97c2a1fSXin Li #include <stdlib.h>
44*a97c2a1fSXin Li #include <stddef.h>
45*a97c2a1fSXin Li #include <string.h>
46*a97c2a1fSXin Li 
47*a97c2a1fSXin Li /* User include files */
48*a97c2a1fSXin Li #include "iv_datatypedef.h"
49*a97c2a1fSXin Li #include "iv.h"
50*a97c2a1fSXin Li #include "ivd.h"
51*a97c2a1fSXin Li #include "ithread.h"
52*a97c2a1fSXin Li 
53*a97c2a1fSXin Li #include "impeg2_job_queue.h"
54*a97c2a1fSXin Li #include "impeg2_macros.h"
55*a97c2a1fSXin Li #include "impeg2_buf_mgr.h"
56*a97c2a1fSXin Li #include "impeg2_disp_mgr.h"
57*a97c2a1fSXin Li #include "impeg2_defs.h"
58*a97c2a1fSXin Li #include "impeg2_platform_macros.h"
59*a97c2a1fSXin Li #include "impeg2_inter_pred.h"
60*a97c2a1fSXin Li #include "impeg2_idct.h"
61*a97c2a1fSXin Li #include "impeg2_format_conv.h"
62*a97c2a1fSXin Li #include "impeg2_mem_func.h"
63*a97c2a1fSXin Li 
64*a97c2a1fSXin Li #include "impeg2d.h"
65*a97c2a1fSXin Li #include "impeg2d_api.h"
66*a97c2a1fSXin Li #include "impeg2d_bitstream.h"
67*a97c2a1fSXin Li #include "impeg2d_debug.h"
68*a97c2a1fSXin Li #include "impeg2d_structs.h"
69*a97c2a1fSXin Li #include "impeg2d_mc.h"
70*a97c2a1fSXin Li #include "impeg2d_pic_proc.h"
71*a97c2a1fSXin Li #include "impeg2d_deinterlace.h"
72*a97c2a1fSXin Li 
73*a97c2a1fSXin Li #define NUM_FRAMES_LIMIT_ENABLED 0
74*a97c2a1fSXin Li 
75*a97c2a1fSXin Li #ifdef LOGO_EN
76*a97c2a1fSXin Li #include "impeg2_ittiam_logo.h"
77*a97c2a1fSXin Li #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht) impeg2_insert_logo(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht);
78*a97c2a1fSXin Li #else
79*a97c2a1fSXin Li #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht)
80*a97c2a1fSXin Li #endif
81*a97c2a1fSXin Li 
82*a97c2a1fSXin Li #if NUM_FRAMES_LIMIT_ENABLED
83*a97c2a1fSXin Li #define NUM_FRAMES_LIMIT 10000
84*a97c2a1fSXin Li #else
85*a97c2a1fSXin Li #define NUM_FRAMES_LIMIT 0x7FFFFFFF
86*a97c2a1fSXin Li #endif
87*a97c2a1fSXin Li 
88*a97c2a1fSXin Li #define CODEC_NAME              "MPEG2VDEC"
89*a97c2a1fSXin Li #define CODEC_RELEASE_TYPE      "eval"
90*a97c2a1fSXin Li #define CODEC_RELEASE_VER       "01.00"
91*a97c2a1fSXin Li #define CODEC_VENDOR            "ITTIAM"
92*a97c2a1fSXin Li 
93*a97c2a1fSXin Li #ifdef ANDROID
94*a97c2a1fSXin Li #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor)    \
95*a97c2a1fSXin Li     strcpy(version_string,"@(#)Id:");                                                               \
96*a97c2a1fSXin Li     strcat(version_string,codec_name);                                                              \
97*a97c2a1fSXin Li     strcat(version_string,"_");                                                                     \
98*a97c2a1fSXin Li     strcat(version_string,codec_release_type);                                                      \
99*a97c2a1fSXin Li     strcat(version_string," Ver:");                                                                 \
100*a97c2a1fSXin Li     strcat(version_string,codec_release_ver);                                                       \
101*a97c2a1fSXin Li     strcat(version_string," Released by ");                                                         \
102*a97c2a1fSXin Li     strcat(version_string,codec_vendor);
103*a97c2a1fSXin Li #else
104*a97c2a1fSXin Li #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor)    \
105*a97c2a1fSXin Li     strcpy(version_string,"@(#)Id:");                                                               \
106*a97c2a1fSXin Li     strcat(version_string,codec_name);                                                              \
107*a97c2a1fSXin Li     strcat(version_string,"_");                                                                     \
108*a97c2a1fSXin Li     strcat(version_string,codec_release_type);                                                      \
109*a97c2a1fSXin Li     strcat(version_string," Ver:");                                                                 \
110*a97c2a1fSXin Li     strcat(version_string,codec_release_ver);                                                       \
111*a97c2a1fSXin Li     strcat(version_string," Released by ");                                                         \
112*a97c2a1fSXin Li     strcat(version_string,codec_vendor);                                                            \
113*a97c2a1fSXin Li     strcat(version_string," Build: ");                                                              \
114*a97c2a1fSXin Li     strcat(version_string,__DATE__);                                                                \
115*a97c2a1fSXin Li     strcat(version_string," @ ");                                                                       \
116*a97c2a1fSXin Li     strcat(version_string,__TIME__);
117*a97c2a1fSXin Li #endif
118*a97c2a1fSXin Li 
119*a97c2a1fSXin Li 
120*a97c2a1fSXin Li #define MIN_OUT_BUFS_420    3
121*a97c2a1fSXin Li #define MIN_OUT_BUFS_422ILE 1
122*a97c2a1fSXin Li #define MIN_OUT_BUFS_RGB565 1
123*a97c2a1fSXin Li #define MIN_OUT_BUFS_420SP  2
124*a97c2a1fSXin Li 
125*a97c2a1fSXin Li 
126*a97c2a1fSXin Li void impeg2d_init_arch(void *pv_codec);
127*a97c2a1fSXin Li void impeg2d_init_function_ptr(void *pv_codec);
128*a97c2a1fSXin Li UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size);
129*a97c2a1fSXin Li 
130*a97c2a1fSXin Li /*****************************************************************************/
131*a97c2a1fSXin Li /*                                                                           */
132*a97c2a1fSXin Li /*  Function Name : impeg2d_api_rel_display_frame                            */
133*a97c2a1fSXin Li /*                                                                           */
134*a97c2a1fSXin Li /*  Description   : Release displ buffers that will be shared between decoder */
135*a97c2a1fSXin Li /*                  and application                                          */
136*a97c2a1fSXin Li /*  Inputs        : Error message                                            */
137*a97c2a1fSXin Li /*  Globals       : None                                                     */
138*a97c2a1fSXin Li /*  Processing    : Just prints error message to console                     */
139*a97c2a1fSXin Li /*  Outputs       : Error mesage to the console                              */
140*a97c2a1fSXin Li /*  Returns       : None                                                     */
141*a97c2a1fSXin Li /*                                                                           */
142*a97c2a1fSXin Li /*  Issues        : <List any issues or problems with this function>         */
143*a97c2a1fSXin Li /*                                                                           */
144*a97c2a1fSXin Li /*  Revision History:                                                        */
145*a97c2a1fSXin Li /*                                                                           */
146*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
147*a97c2a1fSXin Li /*         27 05 2006   Sankar          Creation                             */
148*a97c2a1fSXin Li /*                                                                           */
149*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_rel_display_frame(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)150*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_rel_display_frame(iv_obj_t *ps_dechdl,
151*a97c2a1fSXin Li                                                    void *pv_api_ip,
152*a97c2a1fSXin Li                                                    void *pv_api_op)
153*a97c2a1fSXin Li {
154*a97c2a1fSXin Li 
155*a97c2a1fSXin Li     ivd_rel_display_frame_ip_t  *dec_rel_disp_ip;
156*a97c2a1fSXin Li     ivd_rel_display_frame_op_t  *dec_rel_disp_op;
157*a97c2a1fSXin Li 
158*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
159*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
160*a97c2a1fSXin Li 
161*a97c2a1fSXin Li 
162*a97c2a1fSXin Li     dec_rel_disp_ip = (ivd_rel_display_frame_ip_t  *)pv_api_ip;
163*a97c2a1fSXin Li     dec_rel_disp_op = (ivd_rel_display_frame_op_t  *)pv_api_op;
164*a97c2a1fSXin Li 
165*a97c2a1fSXin Li     dec_rel_disp_op->u4_error_code = 0;
166*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
167*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
168*a97c2a1fSXin Li 
169*a97c2a1fSXin Li 
170*a97c2a1fSXin Li     /* If not in shared disp buf mode, return */
171*a97c2a1fSXin Li     if(0 == ps_dec_state->u4_share_disp_buf)
172*a97c2a1fSXin Li         return IV_SUCCESS;
173*a97c2a1fSXin Li 
174*a97c2a1fSXin Li     if(NULL == ps_dec_state->pv_pic_buf_mg)
175*a97c2a1fSXin Li         return IV_SUCCESS;
176*a97c2a1fSXin Li 
177*a97c2a1fSXin Li 
178*a97c2a1fSXin Li     impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
179*a97c2a1fSXin Li 
180*a97c2a1fSXin Li     return IV_SUCCESS;
181*a97c2a1fSXin Li }
182*a97c2a1fSXin Li 
183*a97c2a1fSXin Li /*****************************************************************************/
184*a97c2a1fSXin Li /*                                                                           */
185*a97c2a1fSXin Li /*  Function Name : impeg2d_api_set_display_frame                            */
186*a97c2a1fSXin Li /*                                                                           */
187*a97c2a1fSXin Li /*  Description   : Sets display buffers that will be shared between decoder */
188*a97c2a1fSXin Li /*                  and application                                          */
189*a97c2a1fSXin Li /*  Inputs        : Error message                                            */
190*a97c2a1fSXin Li /*  Globals       : None                                                     */
191*a97c2a1fSXin Li /*  Processing    : Just prints error message to console                     */
192*a97c2a1fSXin Li /*  Outputs       : Error mesage to the console                              */
193*a97c2a1fSXin Li /*  Returns       : None                                                     */
194*a97c2a1fSXin Li /*                                                                           */
195*a97c2a1fSXin Li /*  Issues        : <List any issues or problems with this function>         */
196*a97c2a1fSXin Li /*                                                                           */
197*a97c2a1fSXin Li /*  Revision History:                                                        */
198*a97c2a1fSXin Li /*                                                                           */
199*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
200*a97c2a1fSXin Li /*         27 05 2006   Sankar          Creation                             */
201*a97c2a1fSXin Li /*                                                                           */
202*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_set_display_frame(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)203*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_set_display_frame(iv_obj_t *ps_dechdl,
204*a97c2a1fSXin Li                                           void *pv_api_ip,
205*a97c2a1fSXin Li                                           void *pv_api_op)
206*a97c2a1fSXin Li {
207*a97c2a1fSXin Li 
208*a97c2a1fSXin Li     ivd_set_display_frame_ip_t  *dec_disp_ip;
209*a97c2a1fSXin Li     ivd_set_display_frame_op_t  *dec_disp_op;
210*a97c2a1fSXin Li 
211*a97c2a1fSXin Li     UWORD32 i;
212*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
213*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
214*a97c2a1fSXin Li     UWORD32 u4_num_disp_bufs;
215*a97c2a1fSXin Li     UWORD32 u4_disp_buf_size[3];
216*a97c2a1fSXin Li     UWORD32 num_bufs;
217*a97c2a1fSXin Li 
218*a97c2a1fSXin Li 
219*a97c2a1fSXin Li     dec_disp_ip = (ivd_set_display_frame_ip_t  *)pv_api_ip;
220*a97c2a1fSXin Li     dec_disp_op = (ivd_set_display_frame_op_t  *)pv_api_op;
221*a97c2a1fSXin Li     dec_disp_op->u4_error_code = 0;
222*a97c2a1fSXin Li 
223*a97c2a1fSXin Li     u4_num_disp_bufs = dec_disp_ip->num_disp_bufs;
224*a97c2a1fSXin Li     if(u4_num_disp_bufs > BUF_MGR_MAX_CNT)
225*a97c2a1fSXin Li         u4_num_disp_bufs = BUF_MGR_MAX_CNT;
226*a97c2a1fSXin Li 
227*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
228*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
229*a97c2a1fSXin Li 
230*a97c2a1fSXin Li     num_bufs = dec_disp_ip->s_disp_buffer[0].u4_num_bufs;
231*a97c2a1fSXin Li 
232*a97c2a1fSXin Li     if(ps_dec_state->u4_share_disp_buf)
233*a97c2a1fSXin Li     {
234*a97c2a1fSXin Li         pic_buf_t *ps_pic_buf;
235*a97c2a1fSXin Li         ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base;
236*a97c2a1fSXin Li 
237*a97c2a1fSXin Li         /* Get the sizes of the first buffer structure. Compare this with the
238*a97c2a1fSXin Li          * rest to make sure all the buffers are of the same size.
239*a97c2a1fSXin Li          */
240*a97c2a1fSXin Li         u4_disp_buf_size[0] =
241*a97c2a1fSXin Li             dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[0];
242*a97c2a1fSXin Li         u4_disp_buf_size[1] =
243*a97c2a1fSXin Li             dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1];
244*a97c2a1fSXin Li         u4_disp_buf_size[2] =
245*a97c2a1fSXin Li             dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[2];
246*a97c2a1fSXin Li         for(i = 0; i < u4_num_disp_bufs; i++)
247*a97c2a1fSXin Li         {
248*a97c2a1fSXin Li             /* Verify all buffer structures have the same sized buffers as the
249*a97c2a1fSXin Li              * first buffer structure*/
250*a97c2a1fSXin Li             if ((dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0]
251*a97c2a1fSXin Li                  != u4_disp_buf_size[0])
252*a97c2a1fSXin Li                  || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1]
253*a97c2a1fSXin Li                      != u4_disp_buf_size[1])
254*a97c2a1fSXin Li                  || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2]
255*a97c2a1fSXin Li                      != u4_disp_buf_size[2]))
256*a97c2a1fSXin Li             {
257*a97c2a1fSXin Li               return IV_FAIL;
258*a97c2a1fSXin Li             }
259*a97c2a1fSXin Li             /* Verify all buffer structures have the same number of
260*a97c2a1fSXin Li              * buffers (e.g. y, u, v) */
261*a97c2a1fSXin Li             if (dec_disp_ip->s_disp_buffer[i].u4_num_bufs != num_bufs)
262*a97c2a1fSXin Li             {
263*a97c2a1fSXin Li                 return IV_FAIL;
264*a97c2a1fSXin Li             }
265*a97c2a1fSXin Li 
266*a97c2a1fSXin Li             ps_pic_buf->pu1_y = dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
267*a97c2a1fSXin Li             if(IV_YUV_420P == ps_dec_state->i4_chromaFormat)
268*a97c2a1fSXin Li             {
269*a97c2a1fSXin Li                 ps_pic_buf->pu1_u = dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
270*a97c2a1fSXin Li                 ps_pic_buf->pu1_v = dec_disp_ip->s_disp_buffer[i].pu1_bufs[2];
271*a97c2a1fSXin Li             }
272*a97c2a1fSXin Li             else
273*a97c2a1fSXin Li             {
274*a97c2a1fSXin Li                 ps_pic_buf->pu1_u = ps_dec_state->pu1_chroma_ref_buf[i];
275*a97c2a1fSXin Li                 ps_pic_buf->pu1_v = ps_dec_state->pu1_chroma_ref_buf[i] +
276*a97c2a1fSXin Li                         ((ps_dec_state->u2_create_max_width * ps_dec_state->u2_create_max_height) >> 2);
277*a97c2a1fSXin Li             }
278*a97c2a1fSXin Li 
279*a97c2a1fSXin Li             ps_pic_buf->i4_buf_id = i;
280*a97c2a1fSXin Li 
281*a97c2a1fSXin Li             ps_pic_buf->u1_used_as_ref = 0;
282*a97c2a1fSXin Li 
283*a97c2a1fSXin Li             ps_pic_buf->u4_ts = 0;
284*a97c2a1fSXin Li 
285*a97c2a1fSXin Li             impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i);
286*a97c2a1fSXin Li             impeg2_buf_mgr_set_status(ps_dec_state->pv_pic_buf_mg, i, BUF_MGR_DISP);
287*a97c2a1fSXin Li             ps_pic_buf++;
288*a97c2a1fSXin Li 
289*a97c2a1fSXin Li         }
290*a97c2a1fSXin Li     }
291*a97c2a1fSXin Li     memcpy(&(ps_dec_state->as_disp_buffers[0]),
292*a97c2a1fSXin Li            &(dec_disp_ip->s_disp_buffer),
293*a97c2a1fSXin Li            u4_num_disp_bufs * sizeof(ivd_out_bufdesc_t));
294*a97c2a1fSXin Li 
295*a97c2a1fSXin Li     return IV_SUCCESS;
296*a97c2a1fSXin Li 
297*a97c2a1fSXin Li }
298*a97c2a1fSXin Li 
impeg2d_api_set_num_cores(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)299*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_set_num_cores(iv_obj_t *ps_dechdl,
300*a97c2a1fSXin Li                                                void *pv_api_ip,
301*a97c2a1fSXin Li                                                void *pv_api_op)
302*a97c2a1fSXin Li {
303*a97c2a1fSXin Li     impeg2d_ctl_set_num_cores_ip_t   *ps_ip;
304*a97c2a1fSXin Li     impeg2d_ctl_set_num_cores_op_t *ps_op;
305*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
306*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
307*a97c2a1fSXin Li 
308*a97c2a1fSXin Li     ps_ip  = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip;
309*a97c2a1fSXin Li     ps_op =  (impeg2d_ctl_set_num_cores_op_t *)pv_api_op;
310*a97c2a1fSXin Li 
311*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
312*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
313*a97c2a1fSXin Li 
314*a97c2a1fSXin Li     if(ps_ip->u4_num_cores > 0)
315*a97c2a1fSXin Li     {
316*a97c2a1fSXin Li 
317*a97c2a1fSXin Li 
318*a97c2a1fSXin Li         WORD32 i;
319*a97c2a1fSXin Li         for(i = 0; i < MAX_THREADS; i++)
320*a97c2a1fSXin Li             ps_dec_state_multi_core->ps_dec_state[i]->i4_num_cores = ps_ip->u4_num_cores;
321*a97c2a1fSXin Li     }
322*a97c2a1fSXin Li     else
323*a97c2a1fSXin Li     {
324*a97c2a1fSXin Li         ps_dec_state->i4_num_cores = 1;
325*a97c2a1fSXin Li     }
326*a97c2a1fSXin Li     ps_op->u4_error_code = IV_SUCCESS;
327*a97c2a1fSXin Li 
328*a97c2a1fSXin Li     return IV_SUCCESS;
329*a97c2a1fSXin Li }
330*a97c2a1fSXin Li 
impeg2d_api_get_seq_info(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)331*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_get_seq_info(iv_obj_t *ps_dechdl,
332*a97c2a1fSXin Li                                                void *pv_api_ip,
333*a97c2a1fSXin Li                                                void *pv_api_op)
334*a97c2a1fSXin Li {
335*a97c2a1fSXin Li     impeg2d_ctl_get_seq_info_ip_t *ps_ip;
336*a97c2a1fSXin Li     impeg2d_ctl_get_seq_info_op_t *ps_op;
337*a97c2a1fSXin Li     dec_state_t *ps_codec;
338*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
339*a97c2a1fSXin Li 
340*a97c2a1fSXin Li     ps_ip  = (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip;
341*a97c2a1fSXin Li     ps_op =  (impeg2d_ctl_get_seq_info_op_t *)pv_api_op;
342*a97c2a1fSXin Li 
343*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
344*a97c2a1fSXin Li     ps_codec = ps_dec_state_multi_core->ps_dec_state[0];
345*a97c2a1fSXin Li     UNUSED(ps_ip);
346*a97c2a1fSXin Li     if(ps_codec->u2_header_done == 1)
347*a97c2a1fSXin Li     {
348*a97c2a1fSXin Li         ps_op->u1_aspect_ratio_information = ps_codec->u2_aspect_ratio_info;
349*a97c2a1fSXin Li         ps_op->u1_frame_rate_code = ps_codec->u2_frame_rate_code;
350*a97c2a1fSXin Li         ps_op->u1_frame_rate_extension_n = ps_codec->u2_frame_rate_extension_n;
351*a97c2a1fSXin Li         ps_op->u1_frame_rate_extension_d = ps_codec->u2_frame_rate_extension_d;
352*a97c2a1fSXin Li         if(ps_codec->u1_seq_disp_extn_present == 1)
353*a97c2a1fSXin Li         {
354*a97c2a1fSXin Li             ps_op->u1_video_format = ps_codec->u1_video_format;
355*a97c2a1fSXin Li             ps_op->u1_colour_primaries = ps_codec->u1_colour_primaries;
356*a97c2a1fSXin Li             ps_op->u1_transfer_characteristics = ps_codec->u1_transfer_characteristics;
357*a97c2a1fSXin Li             ps_op->u1_matrix_coefficients = ps_codec->u1_matrix_coefficients;
358*a97c2a1fSXin Li             ps_op->u2_display_horizontal_size = ps_codec->u2_display_horizontal_size;
359*a97c2a1fSXin Li             ps_op->u2_display_vertical_size = ps_codec->u2_display_vertical_size;
360*a97c2a1fSXin Li         }
361*a97c2a1fSXin Li         else
362*a97c2a1fSXin Li         {
363*a97c2a1fSXin Li             ps_op->u1_video_format = 5;
364*a97c2a1fSXin Li             ps_op->u1_colour_primaries = 2;
365*a97c2a1fSXin Li             ps_op->u1_transfer_characteristics = 2;
366*a97c2a1fSXin Li             ps_op->u1_matrix_coefficients = 2;
367*a97c2a1fSXin Li             ps_op->u2_display_horizontal_size = ps_codec->u2_horizontal_size;
368*a97c2a1fSXin Li             ps_op->u2_display_vertical_size = ps_codec->u2_vertical_size;
369*a97c2a1fSXin Li         }
370*a97c2a1fSXin Li         ps_op->u4_error_code = IV_SUCCESS;
371*a97c2a1fSXin Li         return IV_SUCCESS;
372*a97c2a1fSXin Li     }
373*a97c2a1fSXin Li     else
374*a97c2a1fSXin Li     {
375*a97c2a1fSXin Li         ps_op->u4_error_code = IV_FAIL;
376*a97c2a1fSXin Li         return IV_FAIL;
377*a97c2a1fSXin Li     }
378*a97c2a1fSXin Li }
379*a97c2a1fSXin Li 
380*a97c2a1fSXin Li /**
381*a97c2a1fSXin Li *******************************************************************************
382*a97c2a1fSXin Li *
383*a97c2a1fSXin Li * @brief
384*a97c2a1fSXin Li *  Sets Processor type
385*a97c2a1fSXin Li *
386*a97c2a1fSXin Li * @par Description:
387*a97c2a1fSXin Li *  Sets Processor type
388*a97c2a1fSXin Li *
389*a97c2a1fSXin Li * @param[in] ps_codec_obj
390*a97c2a1fSXin Li *  Pointer to codec object at API level
391*a97c2a1fSXin Li *
392*a97c2a1fSXin Li * @param[in] pv_api_ip
393*a97c2a1fSXin Li *  Pointer to input argument structure
394*a97c2a1fSXin Li *
395*a97c2a1fSXin Li * @param[out] pv_api_op
396*a97c2a1fSXin Li *  Pointer to output argument structure
397*a97c2a1fSXin Li *
398*a97c2a1fSXin Li * @returns  Status
399*a97c2a1fSXin Li *
400*a97c2a1fSXin Li * @remarks
401*a97c2a1fSXin Li *
402*a97c2a1fSXin Li *
403*a97c2a1fSXin Li *******************************************************************************
404*a97c2a1fSXin Li */
405*a97c2a1fSXin Li 
impeg2d_set_processor(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)406*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_set_processor(iv_obj_t *ps_codec_obj,
407*a97c2a1fSXin Li                             void *pv_api_ip,
408*a97c2a1fSXin Li                             void *pv_api_op)
409*a97c2a1fSXin Li {
410*a97c2a1fSXin Li     impeg2d_ctl_set_processor_ip_t *ps_ip;
411*a97c2a1fSXin Li     impeg2d_ctl_set_processor_op_t *ps_op;
412*a97c2a1fSXin Li     dec_state_t *ps_codec;
413*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
414*a97c2a1fSXin Li 
415*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle);
416*a97c2a1fSXin Li     ps_codec = ps_dec_state_multi_core->ps_dec_state[0];
417*a97c2a1fSXin Li 
418*a97c2a1fSXin Li     ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip;
419*a97c2a1fSXin Li     ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op;
420*a97c2a1fSXin Li 
421*a97c2a1fSXin Li     ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
422*a97c2a1fSXin Li     ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
423*a97c2a1fSXin Li 
424*a97c2a1fSXin Li     impeg2d_init_function_ptr(ps_codec);
425*a97c2a1fSXin Li 
426*a97c2a1fSXin Li 
427*a97c2a1fSXin Li     ps_op->u4_error_code = 0;
428*a97c2a1fSXin Li     return IV_SUCCESS;
429*a97c2a1fSXin Li }
430*a97c2a1fSXin Li /*****************************************************************************/
431*a97c2a1fSXin Li /*                                                                           */
432*a97c2a1fSXin Li /*  Function Name : impeg2d_fill_mem_rec                                     */
433*a97c2a1fSXin Li /*                                                                           */
434*a97c2a1fSXin Li /*  Description   :                                                          */
435*a97c2a1fSXin Li /*  Inputs        :                                                          */
436*a97c2a1fSXin Li /*  Globals       :                                                          */
437*a97c2a1fSXin Li /*  Processing    :                                                          */
438*a97c2a1fSXin Li /*  Outputs       :                                                          */
439*a97c2a1fSXin Li /*  Returns       :                                                          */
440*a97c2a1fSXin Li /*                                                                           */
441*a97c2a1fSXin Li /*  Issues        :                                                          */
442*a97c2a1fSXin Li /*                                                                           */
443*a97c2a1fSXin Li /*  Revision History:                                                        */
444*a97c2a1fSXin Li /*                                                                           */
445*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
446*a97c2a1fSXin Li /*         17 09 2007  Rajendra C Y          Draft                           */
447*a97c2a1fSXin Li /*                                                                           */
448*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_fill_mem_rec(impeg2d_fill_mem_rec_ip_t * ps_ip,impeg2d_fill_mem_rec_op_t * ps_op)449*a97c2a1fSXin Li void impeg2d_fill_mem_rec(impeg2d_fill_mem_rec_ip_t *ps_ip,
450*a97c2a1fSXin Li                   impeg2d_fill_mem_rec_op_t *ps_op)
451*a97c2a1fSXin Li {
452*a97c2a1fSXin Li     UWORD32 u4_i;
453*a97c2a1fSXin Li 
454*a97c2a1fSXin Li     UWORD8 u1_no_rec = 0;
455*a97c2a1fSXin Li     UWORD32 max_frm_width,max_frm_height,max_frm_size;
456*a97c2a1fSXin Li     iv_mem_rec_t *ps_mem_rec = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location;
457*a97c2a1fSXin Li     WORD32 i4_num_threads;
458*a97c2a1fSXin Li     WORD32 i4_share_disp_buf, i4_chroma_format;
459*a97c2a1fSXin Li     WORD32 i4_chroma_size;
460*a97c2a1fSXin Li     UWORD32 u4_deinterlace;
461*a97c2a1fSXin Li     UNUSED(u4_deinterlace);
462*a97c2a1fSXin Li     max_frm_width = ALIGN16(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd);
463*a97c2a1fSXin Li     /* In error clips with field prediction, the mv may incorrectly refer to
464*a97c2a1fSXin Li     * the last MB row, causing an out of bounds read access. Allocating 8 extra
465*a97c2a1fSXin Li     * rows to handle this. Adding another extra row to handle half_y prediction.
466*a97c2a1fSXin Li     */
467*a97c2a1fSXin Li     max_frm_height = ALIGN32(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht) + 9;
468*a97c2a1fSXin Li 
469*a97c2a1fSXin Li     max_frm_size = (max_frm_width * max_frm_height * 3) >> 1;/* 420 P */
470*a97c2a1fSXin Li 
471*a97c2a1fSXin Li     i4_chroma_size = max_frm_width * max_frm_height / 4;
472*a97c2a1fSXin Li 
473*a97c2a1fSXin Li     if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_share_disp_buf))
474*a97c2a1fSXin Li     {
475*a97c2a1fSXin Li #ifndef LOGO_EN
476*a97c2a1fSXin Li         i4_share_disp_buf = ps_ip->u4_share_disp_buf;
477*a97c2a1fSXin Li #else
478*a97c2a1fSXin Li         i4_share_disp_buf = 0;
479*a97c2a1fSXin Li #endif
480*a97c2a1fSXin Li     }
481*a97c2a1fSXin Li     else
482*a97c2a1fSXin Li     {
483*a97c2a1fSXin Li         i4_share_disp_buf = 0;
484*a97c2a1fSXin Li     }
485*a97c2a1fSXin Li     if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, e_output_format))
486*a97c2a1fSXin Li     {
487*a97c2a1fSXin Li         i4_chroma_format = ps_ip->e_output_format;
488*a97c2a1fSXin Li     }
489*a97c2a1fSXin Li     else
490*a97c2a1fSXin Li     {
491*a97c2a1fSXin Li         i4_chroma_format = -1;
492*a97c2a1fSXin Li     }
493*a97c2a1fSXin Li 
494*a97c2a1fSXin Li     if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_deinterlace))
495*a97c2a1fSXin Li     {
496*a97c2a1fSXin Li         u4_deinterlace = ps_ip->u4_deinterlace;
497*a97c2a1fSXin Li     }
498*a97c2a1fSXin Li     else
499*a97c2a1fSXin Li     {
500*a97c2a1fSXin Li         u4_deinterlace = 0;
501*a97c2a1fSXin Li     }
502*a97c2a1fSXin Li 
503*a97c2a1fSXin Li 
504*a97c2a1fSXin Li     if( (i4_chroma_format != IV_YUV_420P) &&
505*a97c2a1fSXin Li         (i4_chroma_format != IV_YUV_420SP_UV) &&
506*a97c2a1fSXin Li         (i4_chroma_format != IV_YUV_420SP_VU))
507*a97c2a1fSXin Li     {
508*a97c2a1fSXin Li         i4_share_disp_buf = 0;
509*a97c2a1fSXin Li     }
510*a97c2a1fSXin Li 
511*a97c2a1fSXin Li     /* Disable deinterlacer in shared mode */
512*a97c2a1fSXin Li     if(i4_share_disp_buf)
513*a97c2a1fSXin Li     {
514*a97c2a1fSXin Li         u4_deinterlace = 0;
515*a97c2a1fSXin Li     }
516*a97c2a1fSXin Li 
517*a97c2a1fSXin Li     /*************************************************************************/
518*a97c2a1fSXin Li     /*          Fill the memory requirement XDM Handle         */
519*a97c2a1fSXin Li     /*************************************************************************/
520*a97c2a1fSXin Li     /* ! */
521*a97c2a1fSXin Li     ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
522*a97c2a1fSXin Li     ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
523*a97c2a1fSXin Li     ps_mem_rec->u4_mem_size     = sizeof(iv_obj_t);
524*a97c2a1fSXin Li 
525*a97c2a1fSXin Li     ps_mem_rec++;
526*a97c2a1fSXin Li     u1_no_rec++;
527*a97c2a1fSXin Li 
528*a97c2a1fSXin Li     {
529*a97c2a1fSXin Li         /*************************************************************************/
530*a97c2a1fSXin Li         /*        Fill the memory requirement for threads context         */
531*a97c2a1fSXin Li         /*************************************************************************/
532*a97c2a1fSXin Li         /* ! */
533*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
534*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
535*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = sizeof(dec_state_multi_core_t);
536*a97c2a1fSXin Li 
537*a97c2a1fSXin Li         ps_mem_rec++;
538*a97c2a1fSXin Li         u1_no_rec++;
539*a97c2a1fSXin Li     }
540*a97c2a1fSXin Li 
541*a97c2a1fSXin Li     for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++)
542*a97c2a1fSXin Li     {
543*a97c2a1fSXin Li         /*************************************************************************/
544*a97c2a1fSXin Li         /*          Fill the memory requirement for MPEG2 Decoder Context        */
545*a97c2a1fSXin Li         /*************************************************************************/
546*a97c2a1fSXin Li         /* ! */
547*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
548*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
549*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = sizeof(dec_state_t);
550*a97c2a1fSXin Li 
551*a97c2a1fSXin Li         ps_mem_rec++;
552*a97c2a1fSXin Li         u1_no_rec++;
553*a97c2a1fSXin Li 
554*a97c2a1fSXin Li         /* To store thread handle */
555*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
556*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
557*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = ithread_get_handle_size();
558*a97c2a1fSXin Li 
559*a97c2a1fSXin Li         ps_mem_rec++;
560*a97c2a1fSXin Li         u1_no_rec++;
561*a97c2a1fSXin Li 
562*a97c2a1fSXin Li         /* To store start/done mutex */
563*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/;
564*a97c2a1fSXin Li         ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
565*a97c2a1fSXin Li         /* Request memory to hold mutex (start/done) */
566*a97c2a1fSXin Li         WORD32 size = 2 * ithread_get_mutex_lock_size();
567*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size = size;
568*a97c2a1fSXin Li 
569*a97c2a1fSXin Li         ps_mem_rec++;
570*a97c2a1fSXin Li         u1_no_rec++;
571*a97c2a1fSXin Li 
572*a97c2a1fSXin Li         /* To store start/done condition variables */
573*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/;
574*a97c2a1fSXin Li         ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
575*a97c2a1fSXin Li         /* Request memory to hold condition variables */
576*a97c2a1fSXin Li         size = 2 * ithread_get_cond_struct_size();
577*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size = size;
578*a97c2a1fSXin Li 
579*a97c2a1fSXin Li         ps_mem_rec++;
580*a97c2a1fSXin Li         u1_no_rec++;
581*a97c2a1fSXin Li 
582*a97c2a1fSXin Li         /*************************************************************************/
583*a97c2a1fSXin Li         /*      Fill the memory requirement for Motion Compensation Buffers      */
584*a97c2a1fSXin Li         /*************************************************************************/
585*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
586*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_SCRATCH_MEM;
587*a97c2a1fSXin Li 
588*a97c2a1fSXin Li         /* for mc_fw_buf.pu1_y */
589*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = MB_LUMA_MEM_SIZE;
590*a97c2a1fSXin Li 
591*a97c2a1fSXin Li         /* for mc_fw_buf.pu1_u */
592*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
593*a97c2a1fSXin Li 
594*a97c2a1fSXin Li         /* for mc_fw_buf.pu1_v */
595*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
596*a97c2a1fSXin Li 
597*a97c2a1fSXin Li         /* for mc_bk_buf.pu1_y */
598*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_LUMA_MEM_SIZE;
599*a97c2a1fSXin Li 
600*a97c2a1fSXin Li         /* for mc_bk_buf.pu1_u */
601*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
602*a97c2a1fSXin Li 
603*a97c2a1fSXin Li         /* for mc_bk_buf.pu1_v */
604*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
605*a97c2a1fSXin Li 
606*a97c2a1fSXin Li         /* for mc_buf.pu1_y */
607*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_LUMA_MEM_SIZE;
608*a97c2a1fSXin Li 
609*a97c2a1fSXin Li         /* for mc_buf.pu1_u */
610*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
611*a97c2a1fSXin Li 
612*a97c2a1fSXin Li         /* for mc_buf.pu1_v */
613*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size    += MB_CHROMA_MEM_SIZE;
614*a97c2a1fSXin Li 
615*a97c2a1fSXin Li         ps_mem_rec++;
616*a97c2a1fSXin Li         u1_no_rec++;
617*a97c2a1fSXin Li 
618*a97c2a1fSXin Li 
619*a97c2a1fSXin Li         /*************************************************************************/
620*a97c2a1fSXin Li         /*             Fill the memory requirement Stack Context                 */
621*a97c2a1fSXin Li         /*************************************************************************/
622*a97c2a1fSXin Li         /* ! */
623*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
624*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
625*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = 392;
626*a97c2a1fSXin Li 
627*a97c2a1fSXin Li         ps_mem_rec++;
628*a97c2a1fSXin Li         u1_no_rec++;
629*a97c2a1fSXin Li     }
630*a97c2a1fSXin Li 
631*a97c2a1fSXin Li 
632*a97c2a1fSXin Li 
633*a97c2a1fSXin Li     {
634*a97c2a1fSXin Li         /*************************************************************************/
635*a97c2a1fSXin Li         /*        Fill the memory requirement for Picture Buffer Manager         */
636*a97c2a1fSXin Li         /*************************************************************************/
637*a97c2a1fSXin Li         /* ! */
638*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
639*a97c2a1fSXin Li         ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
640*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size     = sizeof(buf_mgr_t) + sizeof(pic_buf_t) * BUF_MGR_MAX_CNT;
641*a97c2a1fSXin Li 
642*a97c2a1fSXin Li         ps_mem_rec++;
643*a97c2a1fSXin Li         u1_no_rec++;
644*a97c2a1fSXin Li     }
645*a97c2a1fSXin Li     /*************************************************************************/
646*a97c2a1fSXin Li     /*             Internal Frame Buffers                                    */
647*a97c2a1fSXin Li     /*************************************************************************/
648*a97c2a1fSXin Li /* ! */
649*a97c2a1fSXin Li 
650*a97c2a1fSXin Li     {
651*a97c2a1fSXin Li         for(u4_i = 0; u4_i < NUM_INT_FRAME_BUFFERS; u4_i++)
652*a97c2a1fSXin Li         {
653*a97c2a1fSXin Li             /* ! */
654*a97c2a1fSXin Li             ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/;
655*a97c2a1fSXin Li             ps_mem_rec->e_mem_type      = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
656*a97c2a1fSXin Li             if(0 == i4_share_disp_buf)
657*a97c2a1fSXin Li                 ps_mem_rec->u4_mem_size     = max_frm_size;
658*a97c2a1fSXin Li             else if(IV_YUV_420P != i4_chroma_format)
659*a97c2a1fSXin Li             {
660*a97c2a1fSXin Li                 /* If color format is not 420P and it is shared, then allocate for chroma */
661*a97c2a1fSXin Li                 ps_mem_rec->u4_mem_size     = i4_chroma_size * 2;
662*a97c2a1fSXin Li             }
663*a97c2a1fSXin Li             else
664*a97c2a1fSXin Li                 ps_mem_rec->u4_mem_size     = 64;
665*a97c2a1fSXin Li             ps_mem_rec++;
666*a97c2a1fSXin Li             u1_no_rec++;
667*a97c2a1fSXin Li         }
668*a97c2a1fSXin Li     }
669*a97c2a1fSXin Li 
670*a97c2a1fSXin Li     ps_mem_rec->u4_mem_alignment = 128;
671*a97c2a1fSXin Li     ps_mem_rec->e_mem_type       = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
672*a97c2a1fSXin Li     ps_mem_rec->u4_mem_size      = MAX_BITSTREAM_BUFFER_SIZE + MIN_BUFFER_BYTES_AT_EOS;
673*a97c2a1fSXin Li     ps_mem_rec++;
674*a97c2a1fSXin Li     u1_no_rec++;
675*a97c2a1fSXin Li 
676*a97c2a1fSXin Li     {
677*a97c2a1fSXin Li         WORD32 i4_job_queue_size;
678*a97c2a1fSXin Li         WORD32 i4_num_jobs;
679*a97c2a1fSXin Li 
680*a97c2a1fSXin Li         /* One job per row of MBs */
681*a97c2a1fSXin Li         i4_num_jobs  = max_frm_height >> 4;
682*a97c2a1fSXin Li 
683*a97c2a1fSXin Li         /* One format convert/frame copy job per row of MBs for non-shared mode*/
684*a97c2a1fSXin Li         i4_num_jobs  += max_frm_height >> 4;
685*a97c2a1fSXin Li 
686*a97c2a1fSXin Li 
687*a97c2a1fSXin Li         i4_job_queue_size = impeg2_jobq_ctxt_size();
688*a97c2a1fSXin Li         i4_job_queue_size += i4_num_jobs * sizeof(job_t);
689*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size = i4_job_queue_size;
690*a97c2a1fSXin Li         ps_mem_rec->u4_mem_alignment = 128;
691*a97c2a1fSXin Li         ps_mem_rec->e_mem_type       = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
692*a97c2a1fSXin Li 
693*a97c2a1fSXin Li         ps_mem_rec++;
694*a97c2a1fSXin Li         u1_no_rec++;
695*a97c2a1fSXin Li 
696*a97c2a1fSXin Li     }
697*a97c2a1fSXin Li 
698*a97c2a1fSXin Li     ps_mem_rec->u4_mem_alignment = 128;
699*a97c2a1fSXin Li     ps_mem_rec->e_mem_type       = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
700*a97c2a1fSXin Li     ps_mem_rec->u4_mem_size      = impeg2d_deint_ctxt_size();
701*a97c2a1fSXin Li     ps_mem_rec++;
702*a97c2a1fSXin Li     u1_no_rec++;
703*a97c2a1fSXin Li 
704*a97c2a1fSXin Li     ps_mem_rec->u4_mem_alignment = 128;
705*a97c2a1fSXin Li     ps_mem_rec->e_mem_type       = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
706*a97c2a1fSXin Li 
707*a97c2a1fSXin Li     if(IV_YUV_420P != i4_chroma_format)
708*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size  = max_frm_size;
709*a97c2a1fSXin Li     else
710*a97c2a1fSXin Li         ps_mem_rec->u4_mem_size  = 64;
711*a97c2a1fSXin Li 
712*a97c2a1fSXin Li     ps_mem_rec++;
713*a97c2a1fSXin Li     u1_no_rec++;
714*a97c2a1fSXin Li 
715*a97c2a1fSXin Li     ps_mem_rec->u4_mem_alignment = 128;
716*a97c2a1fSXin Li     ps_mem_rec->e_mem_type       = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM;
717*a97c2a1fSXin Li     ps_mem_rec->u4_mem_size      = sizeof(iv_mem_rec_t) * (NUM_MEM_RECORDS);
718*a97c2a1fSXin Li     ps_mem_rec++;
719*a97c2a1fSXin Li     u1_no_rec++;
720*a97c2a1fSXin Li 
721*a97c2a1fSXin Li     ps_op->s_ivd_fill_mem_rec_op_t.u4_num_mem_rec_filled = u1_no_rec;
722*a97c2a1fSXin Li     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0;
723*a97c2a1fSXin Li }
724*a97c2a1fSXin Li 
725*a97c2a1fSXin Li 
726*a97c2a1fSXin Li /*****************************************************************************/
727*a97c2a1fSXin Li /*                                                                           */
728*a97c2a1fSXin Li /*  Function Name : impeg2d_api_get_version                                  */
729*a97c2a1fSXin Li /*                                                                           */
730*a97c2a1fSXin Li /*  Description   :                                                          */
731*a97c2a1fSXin Li /*                                                                           */
732*a97c2a1fSXin Li /*  Inputs        :                                                          */
733*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
734*a97c2a1fSXin Li /*  Outputs       :                                                          */
735*a97c2a1fSXin Li /*  Returns       : void                                                     */
736*a97c2a1fSXin Li /*                                                                           */
737*a97c2a1fSXin Li /*  Issues        : none                                                     */
738*a97c2a1fSXin Li /*                                                                           */
739*a97c2a1fSXin Li /*  Revision History:                                                        */
740*a97c2a1fSXin Li /*                                                                           */
741*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
742*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
743*a97c2a1fSXin Li /*                                                                           */
744*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_get_version(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)745*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_get_version(iv_obj_t *ps_dechdl,
746*a97c2a1fSXin Li                                              void *pv_api_ip,
747*a97c2a1fSXin Li                                              void *pv_api_op)
748*a97c2a1fSXin Li {
749*a97c2a1fSXin Li     char au1_version_string[512];
750*a97c2a1fSXin Li 
751*a97c2a1fSXin Li     impeg2d_ctl_getversioninfo_ip_t *ps_ip;
752*a97c2a1fSXin Li     impeg2d_ctl_getversioninfo_op_t *ps_op;
753*a97c2a1fSXin Li 
754*a97c2a1fSXin Li     UNUSED(ps_dechdl);
755*a97c2a1fSXin Li 
756*a97c2a1fSXin Li     ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip;
757*a97c2a1fSXin Li     ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op;
758*a97c2a1fSXin Li 
759*a97c2a1fSXin Li     ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS;
760*a97c2a1fSXin Li 
761*a97c2a1fSXin Li     VERSION(au1_version_string, CODEC_NAME, CODEC_RELEASE_TYPE, CODEC_RELEASE_VER,
762*a97c2a1fSXin Li             CODEC_VENDOR);
763*a97c2a1fSXin Li 
764*a97c2a1fSXin Li     if((WORD32)ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size <= 0)
765*a97c2a1fSXin Li     {
766*a97c2a1fSXin Li         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL;
767*a97c2a1fSXin Li         return (IV_FAIL);
768*a97c2a1fSXin Li     }
769*a97c2a1fSXin Li 
770*a97c2a1fSXin Li     if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size
771*a97c2a1fSXin Li                     >= (strlen(au1_version_string) + 1))
772*a97c2a1fSXin Li     {
773*a97c2a1fSXin Li         memcpy(ps_ip->s_ivd_ctl_getversioninfo_ip_t.pv_version_buffer,
774*a97c2a1fSXin Li                au1_version_string, (strlen(au1_version_string) + 1));
775*a97c2a1fSXin Li         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS;
776*a97c2a1fSXin Li     }
777*a97c2a1fSXin Li     else
778*a97c2a1fSXin Li     {
779*a97c2a1fSXin Li         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL;
780*a97c2a1fSXin Li     }
781*a97c2a1fSXin Li 
782*a97c2a1fSXin Li     return (IV_SUCCESS);
783*a97c2a1fSXin Li }
784*a97c2a1fSXin Li 
impeg2d_join_threads(dec_state_multi_core_t * ps_dec_state_multi_core)785*a97c2a1fSXin Li WORD32 impeg2d_join_threads(dec_state_multi_core_t *ps_dec_state_multi_core)
786*a97c2a1fSXin Li {
787*a97c2a1fSXin Li     dec_state_t *ps_dec_thd, *ps_dec_state;
788*a97c2a1fSXin Li 
789*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
790*a97c2a1fSXin Li 
791*a97c2a1fSXin Li     if(ps_dec_state->i4_threads_active)
792*a97c2a1fSXin Li     {
793*a97c2a1fSXin Li         int i;
794*a97c2a1fSXin Li         for(i = 0; i < MAX_THREADS; i++)
795*a97c2a1fSXin Li         {
796*a97c2a1fSXin Li             WORD32 ret;
797*a97c2a1fSXin Li             ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[i];
798*a97c2a1fSXin Li             if(ps_dec_state_multi_core->au4_thread_launched[i])
799*a97c2a1fSXin Li             {
800*a97c2a1fSXin Li                 ret = ithread_mutex_lock(ps_dec_thd->pv_proc_start_mutex);
801*a97c2a1fSXin Li                 if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL);
802*a97c2a1fSXin Li 
803*a97c2a1fSXin Li                 // set process start for the threads waiting on the start condition
804*a97c2a1fSXin Li                 // in the decode routine so as to break them
805*a97c2a1fSXin Li                 ps_dec_thd->ai4_process_start = 1;
806*a97c2a1fSXin Li                 ps_dec_state_multi_core->i4_break_threads = 1;
807*a97c2a1fSXin Li 
808*a97c2a1fSXin Li                 ret = ithread_cond_signal(ps_dec_thd->pv_proc_start_condition);
809*a97c2a1fSXin Li                 if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL);
810*a97c2a1fSXin Li 
811*a97c2a1fSXin Li                 ret = ithread_mutex_unlock(ps_dec_thd->pv_proc_start_mutex);
812*a97c2a1fSXin Li                 if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL);
813*a97c2a1fSXin Li 
814*a97c2a1fSXin Li                 ithread_join(ps_dec_thd->pv_codec_thread_handle, NULL);
815*a97c2a1fSXin Li                 ps_dec_state_multi_core->au4_thread_launched[i] = 0;
816*a97c2a1fSXin Li                 ps_dec_state_multi_core->i4_break_threads = 0;
817*a97c2a1fSXin Li             }
818*a97c2a1fSXin Li         }
819*a97c2a1fSXin Li     }
820*a97c2a1fSXin Li 
821*a97c2a1fSXin Li     return IV_SUCCESS;
822*a97c2a1fSXin Li }
823*a97c2a1fSXin Li 
824*a97c2a1fSXin Li /*****************************************************************************/
825*a97c2a1fSXin Li /*                                                                           */
826*a97c2a1fSXin Li /*  Function Name : impeg2d_api_get_buf_info                                 */
827*a97c2a1fSXin Li /*                                                                           */
828*a97c2a1fSXin Li /*  Description   :                                                          */
829*a97c2a1fSXin Li /*                                                                           */
830*a97c2a1fSXin Li /*  Inputs        :                                                          */
831*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
832*a97c2a1fSXin Li /*  Outputs       :                                                          */
833*a97c2a1fSXin Li /*  Returns       : void                                                     */
834*a97c2a1fSXin Li /*                                                                           */
835*a97c2a1fSXin Li /*  Issues        : none                                                     */
836*a97c2a1fSXin Li /*                                                                           */
837*a97c2a1fSXin Li /*  Revision History:                                                        */
838*a97c2a1fSXin Li /*                                                                           */
839*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
840*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
841*a97c2a1fSXin Li /*                                                                           */
842*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_get_buf_info(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)843*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_get_buf_info(iv_obj_t *ps_dechdl,
844*a97c2a1fSXin Li                                               void *pv_api_ip,
845*a97c2a1fSXin Li                                               void *pv_api_op)
846*a97c2a1fSXin Li {
847*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
848*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
849*a97c2a1fSXin Li     impeg2d_ctl_getbufinfo_ip_t *ps_ctl_bufinfo_ip =
850*a97c2a1fSXin Li                     (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip;
851*a97c2a1fSXin Li     impeg2d_ctl_getbufinfo_op_t *ps_ctl_bufinfo_op =
852*a97c2a1fSXin Li                     (impeg2d_ctl_getbufinfo_op_t *)pv_api_op;
853*a97c2a1fSXin Li     UWORD32 u4_i, u4_stride, u4_height;
854*a97c2a1fSXin Li     UNUSED(ps_ctl_bufinfo_ip);
855*a97c2a1fSXin Li 
856*a97c2a1fSXin Li     ps_dec_state_multi_core =
857*a97c2a1fSXin Li                     (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle);
858*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
859*a97c2a1fSXin Li 
860*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs = 1;
861*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs = 1;
862*a97c2a1fSXin Li 
863*a97c2a1fSXin Li     for(u4_i = 0; u4_i < IVD_VIDDEC_MAX_IO_BUFFERS; u4_i++)
864*a97c2a1fSXin Li     {
865*a97c2a1fSXin Li         ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] =
866*a97c2a1fSXin Li                         0;
867*a97c2a1fSXin Li         ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[u4_i] =
868*a97c2a1fSXin Li                         0;
869*a97c2a1fSXin Li     }
870*a97c2a1fSXin Li 
871*a97c2a1fSXin Li     for(u4_i = 0;
872*a97c2a1fSXin Li         u4_i < ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs;
873*a97c2a1fSXin Li         u4_i++)
874*a97c2a1fSXin Li     {
875*a97c2a1fSXin Li         ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] =
876*a97c2a1fSXin Li                         MAX_BITSTREAM_BUFFER_SIZE;
877*a97c2a1fSXin Li     }
878*a97c2a1fSXin Li 
879*a97c2a1fSXin Li     if (0 == ps_dec_state->u4_frm_buf_stride)
880*a97c2a1fSXin Li     {
881*a97c2a1fSXin Li         if (1 == ps_dec_state->u2_header_done)
882*a97c2a1fSXin Li         {
883*a97c2a1fSXin Li             u4_stride   = ps_dec_state->u2_horizontal_size;
884*a97c2a1fSXin Li         }
885*a97c2a1fSXin Li         else
886*a97c2a1fSXin Li         {
887*a97c2a1fSXin Li             u4_stride   = ps_dec_state->u2_create_max_width;
888*a97c2a1fSXin Li         }
889*a97c2a1fSXin Li     }
890*a97c2a1fSXin Li     else
891*a97c2a1fSXin Li     {
892*a97c2a1fSXin Li         u4_stride = ps_dec_state->u4_frm_buf_stride;
893*a97c2a1fSXin Li     }
894*a97c2a1fSXin Li     u4_stride = ALIGN16(u4_stride);
895*a97c2a1fSXin Li     u4_height = ALIGN32(ps_dec_state->u2_frame_height) + 9;
896*a97c2a1fSXin Li 
897*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs =
898*a97c2a1fSXin Li                     impeg2d_get_outbuf_size(
899*a97c2a1fSXin Li                                     u4_stride,
900*a97c2a1fSXin Li                                     u4_height,
901*a97c2a1fSXin Li                                     ps_dec_state->i4_chromaFormat,
902*a97c2a1fSXin Li                                     &ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[0]);
903*a97c2a1fSXin Li 
904*a97c2a1fSXin Li     if (0 == ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs)
905*a97c2a1fSXin Li     {
906*a97c2a1fSXin Li         //Invalid chroma format; Error code may be updated, verify in testing if needed
907*a97c2a1fSXin Li         ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code =
908*a97c2a1fSXin Li                         IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
909*a97c2a1fSXin Li         return IV_FAIL;
910*a97c2a1fSXin Li     }
911*a97c2a1fSXin Li 
912*a97c2a1fSXin Li     /* Adding initialization for 2 uninitialized values */
913*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs = 1;
914*a97c2a1fSXin Li     if(ps_dec_state->u4_share_disp_buf)
915*a97c2a1fSXin Li         ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs =
916*a97c2a1fSXin Li                         NUM_INT_FRAME_BUFFERS;
917*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_size = MAX_FRM_SIZE;
918*a97c2a1fSXin Li 
919*a97c2a1fSXin Li     ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = IV_SUCCESS;
920*a97c2a1fSXin Li 
921*a97c2a1fSXin Li     return (IV_SUCCESS);
922*a97c2a1fSXin Li }
923*a97c2a1fSXin Li 
924*a97c2a1fSXin Li /*****************************************************************************/
925*a97c2a1fSXin Li /*                                                                           */
926*a97c2a1fSXin Li /*  Function Name :  impeg2d_api_set_flush_mode                              */
927*a97c2a1fSXin Li /*                                                                           */
928*a97c2a1fSXin Li /*  Description   :                                                          */
929*a97c2a1fSXin Li /*                                                                           */
930*a97c2a1fSXin Li /*  Inputs        :                                                          */
931*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
932*a97c2a1fSXin Li /*  Outputs       :                                                          */
933*a97c2a1fSXin Li /*  Returns       : void                                                     */
934*a97c2a1fSXin Li /*                                                                           */
935*a97c2a1fSXin Li /*  Issues        : none                                                     */
936*a97c2a1fSXin Li /*                                                                           */
937*a97c2a1fSXin Li /*  Revision History:                                                        */
938*a97c2a1fSXin Li /*                                                                           */
939*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
940*a97c2a1fSXin Li /*         08 06 2009    100356         RAVI                                 */
941*a97c2a1fSXin Li /*                                                                           */
942*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_set_flush_mode(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)943*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_set_flush_mode(iv_obj_t *ps_dechdl,
944*a97c2a1fSXin Li                                                 void *pv_api_ip,
945*a97c2a1fSXin Li                                                 void *pv_api_op)
946*a97c2a1fSXin Li {
947*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
948*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
949*a97c2a1fSXin Li     impeg2d_ctl_flush_op_t *ps_ctl_dec_op =
950*a97c2a1fSXin Li                     (impeg2d_ctl_flush_op_t*)pv_api_op;
951*a97c2a1fSXin Li 
952*a97c2a1fSXin Li     UNUSED(pv_api_ip);
953*a97c2a1fSXin Li 
954*a97c2a1fSXin Li     ps_dec_state_multi_core =
955*a97c2a1fSXin Li                     (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle);
956*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
957*a97c2a1fSXin Li     impeg2d_join_threads(ps_dec_state_multi_core);
958*a97c2a1fSXin Li 
959*a97c2a1fSXin Li     ps_dec_state->u1_flushfrm = 1;
960*a97c2a1fSXin Li 
961*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_size =
962*a97c2a1fSXin Li                     sizeof(impeg2d_ctl_flush_op_t);
963*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_error_code = IV_SUCCESS;
964*a97c2a1fSXin Li 
965*a97c2a1fSXin Li     return (IV_SUCCESS);
966*a97c2a1fSXin Li }
967*a97c2a1fSXin Li 
968*a97c2a1fSXin Li /*****************************************************************************/
969*a97c2a1fSXin Li /*                                                                           */
970*a97c2a1fSXin Li /*  Function Name :  impeg2d_api_set_default                                 */
971*a97c2a1fSXin Li /*                                                                           */
972*a97c2a1fSXin Li /*  Description   :                                                          */
973*a97c2a1fSXin Li /*                                                                           */
974*a97c2a1fSXin Li /*  Inputs        :                                                          */
975*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
976*a97c2a1fSXin Li /*  Outputs       :                                                          */
977*a97c2a1fSXin Li /*  Returns       : void                                                     */
978*a97c2a1fSXin Li /*                                                                           */
979*a97c2a1fSXin Li /*  Issues        : none                                                     */
980*a97c2a1fSXin Li /*                                                                           */
981*a97c2a1fSXin Li /*  Revision History:                                                        */
982*a97c2a1fSXin Li /*                                                                           */
983*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
984*a97c2a1fSXin Li /*         08 06 2009    100356         RAVI                                 */
985*a97c2a1fSXin Li /*                                                                           */
986*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_set_default(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)987*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_set_default(iv_obj_t *ps_dechdl,
988*a97c2a1fSXin Li                                              void *pv_api_ip,
989*a97c2a1fSXin Li                                              void *pv_api_op)
990*a97c2a1fSXin Li {
991*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
992*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
993*a97c2a1fSXin Li     impeg2d_ctl_set_config_op_t *ps_ctl_dec_op =
994*a97c2a1fSXin Li                     (impeg2d_ctl_set_config_op_t *)pv_api_op;
995*a97c2a1fSXin Li 
996*a97c2a1fSXin Li     UNUSED(pv_api_ip);
997*a97c2a1fSXin Li 
998*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code  = IV_SUCCESS;
999*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_size        =
1000*a97c2a1fSXin Li                     sizeof(impeg2d_ctl_set_config_op_t);
1001*a97c2a1fSXin Li 
1002*a97c2a1fSXin Li     ps_dec_state_multi_core =
1003*a97c2a1fSXin Li                     (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle);
1004*a97c2a1fSXin Li     ps_dec_state            = ps_dec_state_multi_core->ps_dec_state[0];
1005*a97c2a1fSXin Li 
1006*a97c2a1fSXin Li     ps_dec_state->u1_flushfrm   = 0;
1007*a97c2a1fSXin Li     ps_dec_state->u2_decode_header = 1;
1008*a97c2a1fSXin Li 
1009*a97c2a1fSXin Li     if (1 == ps_dec_state->u2_header_done)
1010*a97c2a1fSXin Li     {
1011*a97c2a1fSXin Li         ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width;
1012*a97c2a1fSXin Li     }
1013*a97c2a1fSXin Li 
1014*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS;
1015*a97c2a1fSXin Li 
1016*a97c2a1fSXin Li     return (IV_SUCCESS);
1017*a97c2a1fSXin Li 
1018*a97c2a1fSXin Li }
1019*a97c2a1fSXin Li 
1020*a97c2a1fSXin Li 
1021*a97c2a1fSXin Li /*****************************************************************************/
1022*a97c2a1fSXin Li /*                                                                           */
1023*a97c2a1fSXin Li /*  Function Name :  impeg2d_api_reset                                       */
1024*a97c2a1fSXin Li /*                                                                           */
1025*a97c2a1fSXin Li /*  Description   :                                                          */
1026*a97c2a1fSXin Li /*                                                                           */
1027*a97c2a1fSXin Li /*  Inputs        :                                                          */
1028*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
1029*a97c2a1fSXin Li /*  Outputs       :                                                          */
1030*a97c2a1fSXin Li /*  Returns       : void                                                     */
1031*a97c2a1fSXin Li /*                                                                           */
1032*a97c2a1fSXin Li /*  Issues        : none                                                     */
1033*a97c2a1fSXin Li /*                                                                           */
1034*a97c2a1fSXin Li /*  Revision History:                                                        */
1035*a97c2a1fSXin Li /*                                                                           */
1036*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1037*a97c2a1fSXin Li /*         08 06 2009    100356         RAVI                                 */
1038*a97c2a1fSXin Li /*                                                                           */
1039*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_reset(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)1040*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_reset(iv_obj_t *ps_dechdl,
1041*a97c2a1fSXin Li                                        void *pv_api_ip,
1042*a97c2a1fSXin Li                                        void *pv_api_op)
1043*a97c2a1fSXin Li {
1044*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
1045*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
1046*a97c2a1fSXin Li     UNUSED(pv_api_ip);
1047*a97c2a1fSXin Li     impeg2d_ctl_reset_op_t *s_ctl_reset_op = (impeg2d_ctl_reset_op_t *)pv_api_op;
1048*a97c2a1fSXin Li 
1049*a97c2a1fSXin Li     WORD32 i4_num_threads;
1050*a97c2a1fSXin Li 
1051*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
1052*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
1053*a97c2a1fSXin Li 
1054*a97c2a1fSXin Li     if(ps_dec_state_multi_core != NULL)
1055*a97c2a1fSXin Li     {
1056*a97c2a1fSXin Li         impeg2d_join_threads(ps_dec_state_multi_core);
1057*a97c2a1fSXin Li         impeg2_buf_mgr_reset(ps_dec_state->pv_pic_buf_mg);
1058*a97c2a1fSXin Li         /* Display buffer manager init behaves like a reset
1059*a97c2a1fSXin Li          * as it doesn't need to preserve picture buffer addresses
1060*a97c2a1fSXin Li          * like buffer manager */
1061*a97c2a1fSXin Li         impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr);
1062*a97c2a1fSXin Li 
1063*a97c2a1fSXin Li         for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++)
1064*a97c2a1fSXin Li         {
1065*a97c2a1fSXin Li             ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads];
1066*a97c2a1fSXin Li 
1067*a97c2a1fSXin Li 
1068*a97c2a1fSXin Li             /* --------------------------------------------------------------------- */
1069*a97c2a1fSXin Li             /* Initializations */
1070*a97c2a1fSXin Li 
1071*a97c2a1fSXin Li             ps_dec_state->u2_header_done    = 0;  /* Header decoding not done */
1072*a97c2a1fSXin Li             ps_dec_state->u4_frm_buf_stride = 0;
1073*a97c2a1fSXin Li             ps_dec_state->i4_pic_count      = 0;
1074*a97c2a1fSXin Li             ps_dec_state->u2_is_mpeg2       = 0;
1075*a97c2a1fSXin Li             ps_dec_state->aps_ref_pics[0] = NULL;
1076*a97c2a1fSXin Li             ps_dec_state->aps_ref_pics[1] = NULL;
1077*a97c2a1fSXin Li             ps_dec_state->ps_deint_pic = NULL;
1078*a97c2a1fSXin Li         }
1079*a97c2a1fSXin Li     }
1080*a97c2a1fSXin Li     else
1081*a97c2a1fSXin Li     {
1082*a97c2a1fSXin Li         s_ctl_reset_op->s_ivd_ctl_reset_op_t.u4_error_code =
1083*a97c2a1fSXin Li                         IMPEG2D_INIT_NOT_DONE;
1084*a97c2a1fSXin Li     }
1085*a97c2a1fSXin Li 
1086*a97c2a1fSXin Li     return(IV_SUCCESS);
1087*a97c2a1fSXin Li }
1088*a97c2a1fSXin Li 
1089*a97c2a1fSXin Li /*****************************************************************************/
1090*a97c2a1fSXin Li /*                                                                           */
1091*a97c2a1fSXin Li /*  Function Name :  impeg2d_api_set_params                                  */
1092*a97c2a1fSXin Li /*                                                                           */
1093*a97c2a1fSXin Li /*  Description   :                                                          */
1094*a97c2a1fSXin Li /*                                                                           */
1095*a97c2a1fSXin Li /*  Inputs        :                                                          */
1096*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
1097*a97c2a1fSXin Li /*  Outputs       :                                                          */
1098*a97c2a1fSXin Li /*  Returns       : void                                                     */
1099*a97c2a1fSXin Li /*                                                                           */
1100*a97c2a1fSXin Li /*  Issues        : none                                                     */
1101*a97c2a1fSXin Li /*                                                                           */
1102*a97c2a1fSXin Li /*  Revision History:                                                        */
1103*a97c2a1fSXin Li /*                                                                           */
1104*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1105*a97c2a1fSXin Li /*         08 06 2009    100356         RAVI                                 */
1106*a97c2a1fSXin Li /*                                                                           */
1107*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_set_params(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)1108*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_set_params(iv_obj_t *ps_dechdl,void *pv_api_ip,void *pv_api_op)
1109*a97c2a1fSXin Li {
1110*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
1111*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
1112*a97c2a1fSXin Li     impeg2d_ctl_set_config_ip_t  *ps_ctl_dec_ip = (impeg2d_ctl_set_config_ip_t  *)pv_api_ip;
1113*a97c2a1fSXin Li     impeg2d_ctl_set_config_op_t  *ps_ctl_dec_op = (impeg2d_ctl_set_config_op_t  *)pv_api_op;
1114*a97c2a1fSXin Li 
1115*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
1116*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
1117*a97c2a1fSXin Li 
1118*a97c2a1fSXin Li     if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_HEADER) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_FRAME))
1119*a97c2a1fSXin Li     {
1120*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL;
1121*a97c2a1fSXin Li         return(IV_FAIL);
1122*a97c2a1fSXin Li     }
1123*a97c2a1fSXin Li 
1124*a97c2a1fSXin Li     if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DISPLAY_FRAME_OUT) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DECODE_FRAME_OUT))
1125*a97c2a1fSXin Li     {
1126*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL;
1127*a97c2a1fSXin Li         return(IV_FAIL);
1128*a97c2a1fSXin Li     }
1129*a97c2a1fSXin Li 
1130*a97c2a1fSXin Li     if( (WORD32) ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_skip_mode < IVD_SKIP_NONE)
1131*a97c2a1fSXin Li     {
1132*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL;
1133*a97c2a1fSXin Li         return(IV_FAIL);
1134*a97c2a1fSXin Li     }
1135*a97c2a1fSXin Li 
1136*a97c2a1fSXin Li     if(ps_dec_state->u2_header_done == 1)
1137*a97c2a1fSXin Li     {
1138*a97c2a1fSXin Li         if(((WORD32)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < 0) ||
1139*a97c2a1fSXin Li             ((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < ps_dec_state->u2_frame_width)))
1140*a97c2a1fSXin Li         {
1141*a97c2a1fSXin Li             ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL;
1142*a97c2a1fSXin Li             return(IV_FAIL);
1143*a97c2a1fSXin Li         }
1144*a97c2a1fSXin Li 
1145*a97c2a1fSXin Li     }
1146*a97c2a1fSXin Li 
1147*a97c2a1fSXin Li 
1148*a97c2a1fSXin Li     ps_dec_state->u2_decode_header    = (UWORD8)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode;
1149*a97c2a1fSXin Li 
1150*a97c2a1fSXin Li     if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0)
1151*a97c2a1fSXin Li     {
1152*a97c2a1fSXin Li         ps_dec_state->u4_frm_buf_stride = ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd;
1153*a97c2a1fSXin Li     }
1154*a97c2a1fSXin Li     else
1155*a97c2a1fSXin Li     {
1156*a97c2a1fSXin Li 
1157*a97c2a1fSXin Li             if(ps_dec_state->u2_header_done == 1)
1158*a97c2a1fSXin Li             {
1159*a97c2a1fSXin Li                 ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width;
1160*a97c2a1fSXin Li             }
1161*a97c2a1fSXin Li             else
1162*a97c2a1fSXin Li             {
1163*a97c2a1fSXin Li                 ps_dec_state->u4_frm_buf_stride = 0;
1164*a97c2a1fSXin Li             }
1165*a97c2a1fSXin Li     }
1166*a97c2a1fSXin Li 
1167*a97c2a1fSXin Li 
1168*a97c2a1fSXin Li         if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode  == IVD_DECODE_FRAME)
1169*a97c2a1fSXin Li         {
1170*a97c2a1fSXin Li             ps_dec_state->u1_flushfrm = 0;
1171*a97c2a1fSXin Li         }
1172*a97c2a1fSXin Li 
1173*a97c2a1fSXin Li 
1174*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS;
1175*a97c2a1fSXin Li     return(IV_SUCCESS);
1176*a97c2a1fSXin Li 
1177*a97c2a1fSXin Li }
1178*a97c2a1fSXin Li 
1179*a97c2a1fSXin Li /*****************************************************************************/
1180*a97c2a1fSXin Li /*                                                                           */
1181*a97c2a1fSXin Li /*  Function Name :  impeg2d_api_get_status                                  */
1182*a97c2a1fSXin Li /*                                                                           */
1183*a97c2a1fSXin Li /*  Description   :                                                          */
1184*a97c2a1fSXin Li /*                                                                           */
1185*a97c2a1fSXin Li /*  Inputs        :                                                          */
1186*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
1187*a97c2a1fSXin Li /*  Outputs       :                                                          */
1188*a97c2a1fSXin Li /*  Returns       : void                                                     */
1189*a97c2a1fSXin Li /*                                                                           */
1190*a97c2a1fSXin Li /*  Issues        : none                                                     */
1191*a97c2a1fSXin Li /*                                                                           */
1192*a97c2a1fSXin Li /*  Revision History:                                                        */
1193*a97c2a1fSXin Li /*                                                                           */
1194*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1195*a97c2a1fSXin Li /*         08 06 2009    100356         RAVI                                 */
1196*a97c2a1fSXin Li /*                                                                           */
1197*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_get_status(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)1198*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_get_status(iv_obj_t *ps_dechdl,
1199*a97c2a1fSXin Li                                                   void *pv_api_ip,
1200*a97c2a1fSXin Li                                                   void *pv_api_op)
1201*a97c2a1fSXin Li {
1202*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
1203*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
1204*a97c2a1fSXin Li     UWORD32 u4_i,u4_stride,u4_height;
1205*a97c2a1fSXin Li     impeg2d_ctl_getstatus_ip_t *ps_ctl_dec_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip;
1206*a97c2a1fSXin Li     impeg2d_ctl_getstatus_op_t *ps_ctl_dec_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op;
1207*a97c2a1fSXin Li     UNUSED(ps_ctl_dec_ip);
1208*a97c2a1fSXin Li 
1209*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
1210*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
1211*a97c2a1fSXin Li 
1212*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_size             = sizeof(impeg2d_ctl_getstatus_op_t);
1213*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_num_disp_bufs    = 1;
1214*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_ht           = ps_dec_state->u2_frame_height;
1215*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_wd           = ps_dec_state->u2_frame_width;
1216*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_frame_rate           = ps_dec_state->u2_framePeriod;
1217*a97c2a1fSXin Li 
1218*a97c2a1fSXin Li 
1219*a97c2a1fSXin Li     if(ps_dec_state->u2_progressive_sequence == 1)
1220*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type          =   IV_PROGRESSIVE ;
1221*a97c2a1fSXin Li     else
1222*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type          = IV_INTERLACED;
1223*a97c2a1fSXin Li 
1224*a97c2a1fSXin Li 
1225*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_output_chroma_format  = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat;
1226*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs          = 1;
1227*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs     = 1;
1228*a97c2a1fSXin Li 
1229*a97c2a1fSXin Li 
1230*a97c2a1fSXin Li     if(ps_dec_state->i4_chromaFormat == IV_YUV_420P)
1231*a97c2a1fSXin Li     {
1232*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs     = MIN_OUT_BUFS_420;
1233*a97c2a1fSXin Li     }
1234*a97c2a1fSXin Li     else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE)
1235*a97c2a1fSXin Li     {
1236*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs     = MIN_OUT_BUFS_422ILE;
1237*a97c2a1fSXin Li     }
1238*a97c2a1fSXin Li     else if(ps_dec_state->i4_chromaFormat == IV_RGB_565)
1239*a97c2a1fSXin Li     {
1240*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
1241*a97c2a1fSXin Li     }
1242*a97c2a1fSXin Li     else
1243*a97c2a1fSXin Li     {
1244*a97c2a1fSXin Li         //Invalid chroma format; Error code may be updated, verify in testing if needed
1245*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code   = IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
1246*a97c2a1fSXin Li         return IV_FAIL;
1247*a97c2a1fSXin Li     }
1248*a97c2a1fSXin Li 
1249*a97c2a1fSXin Li     memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS));
1250*a97c2a1fSXin Li     memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS));
1251*a97c2a1fSXin Li 
1252*a97c2a1fSXin Li     for(u4_i = 0; u4_i < ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs; u4_i++)
1253*a97c2a1fSXin Li     {
1254*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[u4_i] = MAX_BITSTREAM_BUFFER_SIZE;
1255*a97c2a1fSXin Li     }
1256*a97c2a1fSXin Li 
1257*a97c2a1fSXin Li     u4_stride = ps_dec_state->u4_frm_buf_stride;
1258*a97c2a1fSXin Li     u4_height = ((ps_dec_state->u2_frame_height + 15) >> 4) << 4;
1259*a97c2a1fSXin Li 
1260*a97c2a1fSXin Li     if(ps_dec_state->i4_chromaFormat == IV_YUV_420P)
1261*a97c2a1fSXin Li     {
1262*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height);
1263*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>2 ;
1264*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = (u4_stride * u4_height)>>2;
1265*a97c2a1fSXin Li     }
1266*a97c2a1fSXin Li     else if((ps_dec_state->i4_chromaFormat == IV_YUV_420SP_UV) || (ps_dec_state->i4_chromaFormat == IV_YUV_420SP_VU))
1267*a97c2a1fSXin Li     {
1268*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height);
1269*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>1 ;
1270*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0;
1271*a97c2a1fSXin Li     }
1272*a97c2a1fSXin Li     else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE)
1273*a97c2a1fSXin Li     {
1274*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height)*2;
1275*a97c2a1fSXin Li         ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0;
1276*a97c2a1fSXin Li     }
1277*a97c2a1fSXin Li 
1278*a97c2a1fSXin Li     ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code = IV_SUCCESS;
1279*a97c2a1fSXin Li 
1280*a97c2a1fSXin Li     return(IV_SUCCESS);
1281*a97c2a1fSXin Li 
1282*a97c2a1fSXin Li }
1283*a97c2a1fSXin Li 
1284*a97c2a1fSXin Li /**
1285*a97c2a1fSXin Li *******************************************************************************
1286*a97c2a1fSXin Li *
1287*a97c2a1fSXin Li * @brief
1288*a97c2a1fSXin Li *  Gets frame dimensions/offsets
1289*a97c2a1fSXin Li *
1290*a97c2a1fSXin Li * @par Description:
1291*a97c2a1fSXin Li *  Gets frame buffer chararacteristics such a x & y offsets  display and
1292*a97c2a1fSXin Li * buffer dimensions
1293*a97c2a1fSXin Li *
1294*a97c2a1fSXin Li * @param[in] ps_codec_obj
1295*a97c2a1fSXin Li *  Pointer to codec object at API level
1296*a97c2a1fSXin Li *
1297*a97c2a1fSXin Li * @param[in] pv_api_ip
1298*a97c2a1fSXin Li *  Pointer to input argument structure
1299*a97c2a1fSXin Li *
1300*a97c2a1fSXin Li * @param[out] pv_api_op
1301*a97c2a1fSXin Li *  Pointer to output argument structure
1302*a97c2a1fSXin Li *
1303*a97c2a1fSXin Li * @returns  Status
1304*a97c2a1fSXin Li *
1305*a97c2a1fSXin Li * @remarks
1306*a97c2a1fSXin Li *
1307*a97c2a1fSXin Li *
1308*a97c2a1fSXin Li *******************************************************************************
1309*a97c2a1fSXin Li */
impeg2d_get_frame_dimensions(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)1310*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_get_frame_dimensions(iv_obj_t *ps_codec_obj,
1311*a97c2a1fSXin Li                                    void *pv_api_ip,
1312*a97c2a1fSXin Li                                    void *pv_api_op)
1313*a97c2a1fSXin Li {
1314*a97c2a1fSXin Li     impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip;
1315*a97c2a1fSXin Li     impeg2d_ctl_get_frame_dimensions_op_t *ps_op;
1316*a97c2a1fSXin Li     WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
1317*a97c2a1fSXin Li     dec_state_t *ps_codec;
1318*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
1319*a97c2a1fSXin Li 
1320*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle);
1321*a97c2a1fSXin Li     ps_codec = ps_dec_state_multi_core->ps_dec_state[0];
1322*a97c2a1fSXin Li 
1323*a97c2a1fSXin Li 
1324*a97c2a1fSXin Li     ps_ip = (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
1325*a97c2a1fSXin Li     ps_op = (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op;
1326*a97c2a1fSXin Li     UNUSED(ps_ip);
1327*a97c2a1fSXin Li     if(ps_codec->u2_header_done)
1328*a97c2a1fSXin Li     {
1329*a97c2a1fSXin Li         disp_wd = ps_codec->u2_horizontal_size;
1330*a97c2a1fSXin Li         disp_ht = ps_codec->u2_vertical_size;
1331*a97c2a1fSXin Li 
1332*a97c2a1fSXin Li         if(0 == ps_codec->u4_share_disp_buf)
1333*a97c2a1fSXin Li         {
1334*a97c2a1fSXin Li             buffer_wd = disp_wd;
1335*a97c2a1fSXin Li             buffer_ht = disp_ht;
1336*a97c2a1fSXin Li         }
1337*a97c2a1fSXin Li         else
1338*a97c2a1fSXin Li         {
1339*a97c2a1fSXin Li             buffer_wd = ps_codec->u2_frame_width;
1340*a97c2a1fSXin Li             buffer_ht = ps_codec->u2_frame_height;
1341*a97c2a1fSXin Li         }
1342*a97c2a1fSXin Li     }
1343*a97c2a1fSXin Li     else
1344*a97c2a1fSXin Li     {
1345*a97c2a1fSXin Li 
1346*a97c2a1fSXin Li         disp_wd = ps_codec->u2_create_max_width;
1347*a97c2a1fSXin Li         disp_ht = ps_codec->u2_create_max_height;
1348*a97c2a1fSXin Li 
1349*a97c2a1fSXin Li         if(0 == ps_codec->u4_share_disp_buf)
1350*a97c2a1fSXin Li         {
1351*a97c2a1fSXin Li             buffer_wd = disp_wd;
1352*a97c2a1fSXin Li             buffer_ht = disp_ht;
1353*a97c2a1fSXin Li         }
1354*a97c2a1fSXin Li         else
1355*a97c2a1fSXin Li         {
1356*a97c2a1fSXin Li             buffer_wd = ALIGN16(disp_wd);
1357*a97c2a1fSXin Li             buffer_ht = ALIGN16(disp_ht);
1358*a97c2a1fSXin Li 
1359*a97c2a1fSXin Li         }
1360*a97c2a1fSXin Li     }
1361*a97c2a1fSXin Li     if(ps_codec->u2_frame_width > buffer_wd)
1362*a97c2a1fSXin Li         buffer_wd = ps_codec->u2_frame_width;
1363*a97c2a1fSXin Li 
1364*a97c2a1fSXin Li     x_offset = 0;
1365*a97c2a1fSXin Li     y_offset = 0;
1366*a97c2a1fSXin Li 
1367*a97c2a1fSXin Li 
1368*a97c2a1fSXin Li     ps_op->u4_disp_wd[0] = disp_wd;
1369*a97c2a1fSXin Li     ps_op->u4_disp_ht[0] = disp_ht;
1370*a97c2a1fSXin Li     ps_op->u4_buffer_wd[0] = buffer_wd;
1371*a97c2a1fSXin Li     ps_op->u4_buffer_ht[0] = buffer_ht;
1372*a97c2a1fSXin Li     ps_op->u4_x_offset[0] = x_offset;
1373*a97c2a1fSXin Li     ps_op->u4_y_offset[0] = y_offset;
1374*a97c2a1fSXin Li 
1375*a97c2a1fSXin Li     ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
1376*a97c2a1fSXin Li                     >> 1);
1377*a97c2a1fSXin Li     ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
1378*a97c2a1fSXin Li                     >> 1);
1379*a97c2a1fSXin Li     ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
1380*a97c2a1fSXin Li                     >> 1);
1381*a97c2a1fSXin Li     ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
1382*a97c2a1fSXin Li                     >> 1);
1383*a97c2a1fSXin Li     ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
1384*a97c2a1fSXin Li                     >> 1);
1385*a97c2a1fSXin Li     ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
1386*a97c2a1fSXin Li                     >> 1);
1387*a97c2a1fSXin Li 
1388*a97c2a1fSXin Li     if((ps_codec->i4_chromaFormat == IV_YUV_420SP_UV)
1389*a97c2a1fSXin Li                     || (ps_codec->i4_chromaFormat == IV_YUV_420SP_VU))
1390*a97c2a1fSXin Li     {
1391*a97c2a1fSXin Li         ps_op->u4_disp_wd[2] = 0;
1392*a97c2a1fSXin Li         ps_op->u4_disp_ht[2] = 0;
1393*a97c2a1fSXin Li         ps_op->u4_buffer_wd[2] = 0;
1394*a97c2a1fSXin Li         ps_op->u4_buffer_ht[2] = 0;
1395*a97c2a1fSXin Li         ps_op->u4_x_offset[2] = 0;
1396*a97c2a1fSXin Li         ps_op->u4_y_offset[2] = 0;
1397*a97c2a1fSXin Li 
1398*a97c2a1fSXin Li         ps_op->u4_disp_wd[1] <<= 1;
1399*a97c2a1fSXin Li         ps_op->u4_buffer_wd[1] <<= 1;
1400*a97c2a1fSXin Li         ps_op->u4_x_offset[1] <<= 1;
1401*a97c2a1fSXin Li     }
1402*a97c2a1fSXin Li 
1403*a97c2a1fSXin Li     return IV_SUCCESS;
1404*a97c2a1fSXin Li 
1405*a97c2a1fSXin Li }
1406*a97c2a1fSXin Li 
impeg2d_api_function(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)1407*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_function (iv_obj_t *ps_dechdl, void *pv_api_ip,void *pv_api_op)
1408*a97c2a1fSXin Li {
1409*a97c2a1fSXin Li     WORD32 i4_cmd;
1410*a97c2a1fSXin Li     IV_API_CALL_STATUS_T u4_error_code;
1411*a97c2a1fSXin Li     UWORD32 *pu4_api_ip;
1412*a97c2a1fSXin Li 
1413*a97c2a1fSXin Li     u4_error_code = impeg2d_api_check_struct_sanity(ps_dechdl,pv_api_ip,pv_api_op);
1414*a97c2a1fSXin Li     if(IV_SUCCESS != u4_error_code)
1415*a97c2a1fSXin Li     {
1416*a97c2a1fSXin Li         return u4_error_code;
1417*a97c2a1fSXin Li     }
1418*a97c2a1fSXin Li 
1419*a97c2a1fSXin Li 
1420*a97c2a1fSXin Li     pu4_api_ip  = (UWORD32 *)pv_api_ip;
1421*a97c2a1fSXin Li     i4_cmd = *(pu4_api_ip + 1);
1422*a97c2a1fSXin Li 
1423*a97c2a1fSXin Li     switch(i4_cmd)
1424*a97c2a1fSXin Li     {
1425*a97c2a1fSXin Li 
1426*a97c2a1fSXin Li     case IV_CMD_GET_NUM_MEM_REC:
1427*a97c2a1fSXin Li         u4_error_code = impeg2d_api_num_mem_rec((void *)pv_api_ip,(void *)pv_api_op);
1428*a97c2a1fSXin Li         break;
1429*a97c2a1fSXin Li 
1430*a97c2a1fSXin Li     case IV_CMD_FILL_NUM_MEM_REC:
1431*a97c2a1fSXin Li         u4_error_code = impeg2d_api_fill_mem_rec((void *)pv_api_ip,(void *)pv_api_op);
1432*a97c2a1fSXin Li         break;
1433*a97c2a1fSXin Li 
1434*a97c2a1fSXin Li     case IV_CMD_INIT:
1435*a97c2a1fSXin Li         u4_error_code = impeg2d_api_init(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op);
1436*a97c2a1fSXin Li         break;
1437*a97c2a1fSXin Li 
1438*a97c2a1fSXin Li     case IVD_CMD_SET_DISPLAY_FRAME:
1439*a97c2a1fSXin Li         u4_error_code = impeg2d_api_set_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op);
1440*a97c2a1fSXin Li         break;
1441*a97c2a1fSXin Li 
1442*a97c2a1fSXin Li     case IVD_CMD_REL_DISPLAY_FRAME:
1443*a97c2a1fSXin Li         u4_error_code = impeg2d_api_rel_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op);
1444*a97c2a1fSXin Li         break;
1445*a97c2a1fSXin Li 
1446*a97c2a1fSXin Li     case IVD_CMD_VIDEO_DECODE:
1447*a97c2a1fSXin Li         u4_error_code = impeg2d_api_entity(ps_dechdl, (void *)pv_api_ip,(void *)pv_api_op);
1448*a97c2a1fSXin Li         break;
1449*a97c2a1fSXin Li 
1450*a97c2a1fSXin Li     case IV_CMD_RETRIEVE_MEMREC:
1451*a97c2a1fSXin Li         u4_error_code = impeg2d_api_retrieve_mem_rec(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op);
1452*a97c2a1fSXin Li         break;
1453*a97c2a1fSXin Li 
1454*a97c2a1fSXin Li     case IVD_CMD_VIDEO_CTL:
1455*a97c2a1fSXin Li         u4_error_code = impeg2d_api_ctl(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op);
1456*a97c2a1fSXin Li         break;
1457*a97c2a1fSXin Li 
1458*a97c2a1fSXin Li     default:
1459*a97c2a1fSXin Li             break;
1460*a97c2a1fSXin Li     }
1461*a97c2a1fSXin Li 
1462*a97c2a1fSXin Li     return(u4_error_code);
1463*a97c2a1fSXin Li 
1464*a97c2a1fSXin Li }
1465*a97c2a1fSXin Li 
1466*a97c2a1fSXin Li /*****************************************************************************/
1467*a97c2a1fSXin Li /*                                                                           */
1468*a97c2a1fSXin Li /*  Function Name : impeg2d_api_num_mem_rec                                  */
1469*a97c2a1fSXin Li /*                                                                           */
1470*a97c2a1fSXin Li /*  Description   : The function get the number mem records library needs    */
1471*a97c2a1fSXin Li /*  Inputs        : Error message                                            */
1472*a97c2a1fSXin Li /*  Globals       : None                                                     */
1473*a97c2a1fSXin Li /*  Processing    : Just prints error message to console                     */
1474*a97c2a1fSXin Li /*  Outputs       : Error mesage to the console                              */
1475*a97c2a1fSXin Li /*  Returns       : None                                                     */
1476*a97c2a1fSXin Li /*                                                                           */
1477*a97c2a1fSXin Li /*  Issues        : <List any issues or problems with this function>         */
1478*a97c2a1fSXin Li /*                                                                           */
1479*a97c2a1fSXin Li /*  Revision History:                                                        */
1480*a97c2a1fSXin Li /*                                                                           */
1481*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1482*a97c2a1fSXin Li /*         23 09 2010   Hamsalekha          Creation                             */
1483*a97c2a1fSXin Li /*                                                                           */
1484*a97c2a1fSXin Li /*****************************************************************************/
1485*a97c2a1fSXin Li 
1486*a97c2a1fSXin Li 
impeg2d_api_num_mem_rec(void * pv_api_ip,void * pv_api_op)1487*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_num_mem_rec(void *pv_api_ip,void *pv_api_op)
1488*a97c2a1fSXin Li {
1489*a97c2a1fSXin Li     /* To Query No of Memory Records */
1490*a97c2a1fSXin Li     impeg2d_num_mem_rec_ip_t *ps_query_mem_rec_ip;
1491*a97c2a1fSXin Li     impeg2d_num_mem_rec_op_t *ps_query_mem_rec_op;
1492*a97c2a1fSXin Li 
1493*a97c2a1fSXin Li     ps_query_mem_rec_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip;
1494*a97c2a1fSXin Li     ps_query_mem_rec_op = (impeg2d_num_mem_rec_op_t *)pv_api_op;
1495*a97c2a1fSXin Li 
1496*a97c2a1fSXin Li     UNUSED(ps_query_mem_rec_ip);
1497*a97c2a1fSXin Li     ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_size = sizeof(impeg2d_num_mem_rec_op_t);
1498*a97c2a1fSXin Li 
1499*a97c2a1fSXin Li     ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_num_mem_rec  = (UWORD32)NUM_MEM_RECORDS;
1500*a97c2a1fSXin Li 
1501*a97c2a1fSXin Li     ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_error_code = IV_SUCCESS;
1502*a97c2a1fSXin Li 
1503*a97c2a1fSXin Li 
1504*a97c2a1fSXin Li     return(IV_SUCCESS);
1505*a97c2a1fSXin Li 
1506*a97c2a1fSXin Li }
1507*a97c2a1fSXin Li 
1508*a97c2a1fSXin Li 
1509*a97c2a1fSXin Li /*****************************************************************************/
1510*a97c2a1fSXin Li /*                                                                           */
1511*a97c2a1fSXin Li /*  Function Name : impeg2d_api_fill_mem_rec                                 */
1512*a97c2a1fSXin Li /*                                                                           */
1513*a97c2a1fSXin Li /*  Description   : Thsi functions fills details of each mem record lib needs*/
1514*a97c2a1fSXin Li /*  Inputs        : Error message                                            */
1515*a97c2a1fSXin Li /*  Globals       : None                                                     */
1516*a97c2a1fSXin Li /*  Processing    : Just prints error message to console                     */
1517*a97c2a1fSXin Li /*  Outputs       : Error mesage to the console                              */
1518*a97c2a1fSXin Li /*  Returns       : None                                                     */
1519*a97c2a1fSXin Li /*                                                                           */
1520*a97c2a1fSXin Li /*  Issues        : <List any issues or problems with this function>         */
1521*a97c2a1fSXin Li /*                                                                           */
1522*a97c2a1fSXin Li /*  Revision History:                                                        */
1523*a97c2a1fSXin Li /*                                                                           */
1524*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1525*a97c2a1fSXin Li /*         23 09 2010   Hamsalekha          Creation                         */
1526*a97c2a1fSXin Li /*                                                                           */
1527*a97c2a1fSXin Li /*****************************************************************************/
1528*a97c2a1fSXin Li 
1529*a97c2a1fSXin Li 
impeg2d_api_fill_mem_rec(void * pv_api_ip,void * pv_api_op)1530*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_fill_mem_rec(void *pv_api_ip,void *pv_api_op)
1531*a97c2a1fSXin Li {
1532*a97c2a1fSXin Li 
1533*a97c2a1fSXin Li     impeg2d_fill_mem_rec_ip_t *ps_mem_q_ip;
1534*a97c2a1fSXin Li     impeg2d_fill_mem_rec_op_t *ps_mem_q_op;
1535*a97c2a1fSXin Li 
1536*a97c2a1fSXin Li 
1537*a97c2a1fSXin Li     ps_mem_q_ip = pv_api_ip;
1538*a97c2a1fSXin Li     ps_mem_q_op = pv_api_op;
1539*a97c2a1fSXin Li 
1540*a97c2a1fSXin Li 
1541*a97c2a1fSXin Li     impeg2d_fill_mem_rec((impeg2d_fill_mem_rec_ip_t *)ps_mem_q_ip,
1542*a97c2a1fSXin Li                            (impeg2d_fill_mem_rec_op_t *)ps_mem_q_op);
1543*a97c2a1fSXin Li 
1544*a97c2a1fSXin Li 
1545*a97c2a1fSXin Li     return(IV_SUCCESS);
1546*a97c2a1fSXin Li 
1547*a97c2a1fSXin Li }
1548*a97c2a1fSXin Li 
impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht,WORD32 u1_chroma_format,UWORD32 * p_buf_size)1549*a97c2a1fSXin Li UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size)
1550*a97c2a1fSXin Li {
1551*a97c2a1fSXin Li     UWORD32 u4_min_num_out_bufs = 0;
1552*a97c2a1fSXin Li     if(u1_chroma_format == IV_YUV_420P)
1553*a97c2a1fSXin Li         u4_min_num_out_bufs = MIN_OUT_BUFS_420;
1554*a97c2a1fSXin Li     else if(u1_chroma_format == IV_YUV_422ILE)
1555*a97c2a1fSXin Li         u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
1556*a97c2a1fSXin Li     else if(u1_chroma_format == IV_RGB_565)
1557*a97c2a1fSXin Li         u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
1558*a97c2a1fSXin Li     else if((u1_chroma_format == IV_YUV_420SP_UV)
1559*a97c2a1fSXin Li                     || (u1_chroma_format == IV_YUV_420SP_VU))
1560*a97c2a1fSXin Li         u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
1561*a97c2a1fSXin Li 
1562*a97c2a1fSXin Li     if(u1_chroma_format == IV_YUV_420P)
1563*a97c2a1fSXin Li     {
1564*a97c2a1fSXin Li         p_buf_size[0] = (pic_wd * pic_ht);
1565*a97c2a1fSXin Li         p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1);
1566*a97c2a1fSXin Li         p_buf_size[2] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1);
1567*a97c2a1fSXin Li     }
1568*a97c2a1fSXin Li     else if(u1_chroma_format == IV_YUV_422ILE)
1569*a97c2a1fSXin Li     {
1570*a97c2a1fSXin Li         p_buf_size[0] = (pic_wd * pic_ht)
1571*a97c2a1fSXin Li                         * 2;
1572*a97c2a1fSXin Li         p_buf_size[1] =
1573*a97c2a1fSXin Li                         p_buf_size[2] = 0;
1574*a97c2a1fSXin Li     }
1575*a97c2a1fSXin Li     else if(u1_chroma_format == IV_RGB_565)
1576*a97c2a1fSXin Li     {
1577*a97c2a1fSXin Li         p_buf_size[0] = (pic_wd * pic_ht)
1578*a97c2a1fSXin Li                         * 2;
1579*a97c2a1fSXin Li         p_buf_size[1] =
1580*a97c2a1fSXin Li                         p_buf_size[2] = 0;
1581*a97c2a1fSXin Li     }
1582*a97c2a1fSXin Li     else if((u1_chroma_format == IV_YUV_420SP_UV)
1583*a97c2a1fSXin Li                     || (u1_chroma_format == IV_YUV_420SP_VU))
1584*a97c2a1fSXin Li     {
1585*a97c2a1fSXin Li         p_buf_size[0] = (pic_wd * pic_ht);
1586*a97c2a1fSXin Li         p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1) * 2;
1587*a97c2a1fSXin Li         p_buf_size[2] = 0;
1588*a97c2a1fSXin Li     }
1589*a97c2a1fSXin Li     return u4_min_num_out_bufs;
1590*a97c2a1fSXin Li }
1591*a97c2a1fSXin Li 
check_app_out_buf_size(dec_state_t * ps_dec)1592*a97c2a1fSXin Li WORD32 check_app_out_buf_size(dec_state_t *ps_dec)
1593*a97c2a1fSXin Li {
1594*a97c2a1fSXin Li     UWORD32 au4_min_out_buf_size[IVD_VIDDEC_MAX_IO_BUFFERS];
1595*a97c2a1fSXin Li     UWORD32 u4_min_num_out_bufs, i;
1596*a97c2a1fSXin Li     UWORD32 pic_wd, pic_ht;
1597*a97c2a1fSXin Li 
1598*a97c2a1fSXin Li     pic_wd = ps_dec->u2_horizontal_size;
1599*a97c2a1fSXin Li     pic_ht = ps_dec->u2_vertical_size;
1600*a97c2a1fSXin Li 
1601*a97c2a1fSXin Li     if(ps_dec->u4_frm_buf_stride > pic_wd)
1602*a97c2a1fSXin Li         pic_wd = ps_dec->u4_frm_buf_stride;
1603*a97c2a1fSXin Li 
1604*a97c2a1fSXin Li     u4_min_num_out_bufs = impeg2d_get_outbuf_size(pic_wd, pic_ht, ps_dec->i4_chromaFormat, &au4_min_out_buf_size[0]);
1605*a97c2a1fSXin Li 
1606*a97c2a1fSXin Li     if (0 == ps_dec->u4_share_disp_buf)
1607*a97c2a1fSXin Li     {
1608*a97c2a1fSXin Li         if(ps_dec->ps_out_buf->u4_num_bufs < u4_min_num_out_bufs)
1609*a97c2a1fSXin Li         {
1610*a97c2a1fSXin Li             return IV_FAIL;
1611*a97c2a1fSXin Li         }
1612*a97c2a1fSXin Li 
1613*a97c2a1fSXin Li         for (i = 0 ; i < u4_min_num_out_bufs; i++)
1614*a97c2a1fSXin Li         {
1615*a97c2a1fSXin Li             if(ps_dec->ps_out_buf->u4_min_out_buf_size[i] < au4_min_out_buf_size[i])
1616*a97c2a1fSXin Li                 return (IV_FAIL);
1617*a97c2a1fSXin Li         }
1618*a97c2a1fSXin Li     }
1619*a97c2a1fSXin Li     else
1620*a97c2a1fSXin Li     {
1621*a97c2a1fSXin Li         if(ps_dec->as_disp_buffers[0].u4_num_bufs < u4_min_num_out_bufs)
1622*a97c2a1fSXin Li             return IV_FAIL;
1623*a97c2a1fSXin Li 
1624*a97c2a1fSXin Li         for (i = 0 ; i < u4_min_num_out_bufs; i++)
1625*a97c2a1fSXin Li         {
1626*a97c2a1fSXin Li             /* We need to check only with the disp_buffer[0], because we have
1627*a97c2a1fSXin Li             * already ensured that all the buffers are of the same size in
1628*a97c2a1fSXin Li             * impeg2d_api_set_display_frame.
1629*a97c2a1fSXin Li             */
1630*a97c2a1fSXin Li             if(ps_dec->as_disp_buffers[0].u4_min_out_buf_size[i] <
1631*a97c2a1fSXin Li                    au4_min_out_buf_size[i])
1632*a97c2a1fSXin Li                 return (IV_FAIL);
1633*a97c2a1fSXin Li         }
1634*a97c2a1fSXin Li     }
1635*a97c2a1fSXin Li 
1636*a97c2a1fSXin Li     return(IV_SUCCESS);
1637*a97c2a1fSXin Li }
1638*a97c2a1fSXin Li 
1639*a97c2a1fSXin Li 
1640*a97c2a1fSXin Li 
1641*a97c2a1fSXin Li /*****************************************************************************/
1642*a97c2a1fSXin Li /*                                                                           */
1643*a97c2a1fSXin Li /*  Function Name : impeg2d_api_init                                         */
1644*a97c2a1fSXin Li /*                                                                           */
1645*a97c2a1fSXin Li /*  Description   :                                                          */
1646*a97c2a1fSXin Li /*  Inputs        :                                                          */
1647*a97c2a1fSXin Li /*  Globals       :                                                          */
1648*a97c2a1fSXin Li /*  Processing    :                                                          */
1649*a97c2a1fSXin Li /*  Outputs       :                                                          */
1650*a97c2a1fSXin Li /*  Returns       :                                                          */
1651*a97c2a1fSXin Li /*                                                                           */
1652*a97c2a1fSXin Li /*  Issues        :                                                          */
1653*a97c2a1fSXin Li /*                                                                           */
1654*a97c2a1fSXin Li /*  Revision History:                                                        */
1655*a97c2a1fSXin Li /*                                                                           */
1656*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1657*a97c2a1fSXin Li /*         17 09 2007  Rajendra C Y          Draft                           */
1658*a97c2a1fSXin Li /*                                                                           */
1659*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_init(iv_obj_t * ps_dechdl,void * ps_ip,void * ps_op)1660*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_init(iv_obj_t *ps_dechdl,
1661*a97c2a1fSXin Li                                       void *ps_ip,
1662*a97c2a1fSXin Li                                       void *ps_op)
1663*a97c2a1fSXin Li {
1664*a97c2a1fSXin Li     UWORD32 i;
1665*a97c2a1fSXin Li 
1666*a97c2a1fSXin Li     void *pv;
1667*a97c2a1fSXin Li     UWORD32 u4_size;
1668*a97c2a1fSXin Li 
1669*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
1670*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
1671*a97c2a1fSXin Li     UWORD32 u4_num_mem_rec;
1672*a97c2a1fSXin Li     iv_mem_rec_t *ps_mem_rec ;
1673*a97c2a1fSXin Li     iv_mem_rec_t *ps_frm_buf;
1674*a97c2a1fSXin Li     iv_obj_t *ps_dec_handle;
1675*a97c2a1fSXin Li     WORD32 i4_max_wd, i4_max_ht;
1676*a97c2a1fSXin Li 
1677*a97c2a1fSXin Li     impeg2d_init_ip_t *ps_dec_init_ip;
1678*a97c2a1fSXin Li     impeg2d_init_op_t *ps_dec_init_op;
1679*a97c2a1fSXin Li     WORD32 i4_num_threads;
1680*a97c2a1fSXin Li     UWORD32 u4_share_disp_buf, u4_chroma_format;
1681*a97c2a1fSXin Li     UWORD32 u4_deinterlace;
1682*a97c2a1fSXin Li     WORD32 i4_threads_active;
1683*a97c2a1fSXin Li 
1684*a97c2a1fSXin Li     ps_dec_init_ip = (impeg2d_init_ip_t *)ps_ip;
1685*a97c2a1fSXin Li     ps_dec_init_op = (impeg2d_init_op_t *)ps_op;
1686*a97c2a1fSXin Li 
1687*a97c2a1fSXin Li     i4_max_wd = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd);
1688*a97c2a1fSXin Li     i4_max_ht = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht);
1689*a97c2a1fSXin Li 
1690*a97c2a1fSXin Li     if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_share_disp_buf))
1691*a97c2a1fSXin Li     {
1692*a97c2a1fSXin Li #ifndef LOGO_EN
1693*a97c2a1fSXin Li         u4_share_disp_buf = ps_dec_init_ip->u4_share_disp_buf;
1694*a97c2a1fSXin Li #else
1695*a97c2a1fSXin Li         u4_share_disp_buf = 0;
1696*a97c2a1fSXin Li #endif
1697*a97c2a1fSXin Li     }
1698*a97c2a1fSXin Li     else
1699*a97c2a1fSXin Li     {
1700*a97c2a1fSXin Li         u4_share_disp_buf = 0;
1701*a97c2a1fSXin Li     }
1702*a97c2a1fSXin Li 
1703*a97c2a1fSXin Li     u4_chroma_format = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format;
1704*a97c2a1fSXin Li 
1705*a97c2a1fSXin Li     if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_deinterlace))
1706*a97c2a1fSXin Li     {
1707*a97c2a1fSXin Li         u4_deinterlace = ps_dec_init_ip->u4_deinterlace;
1708*a97c2a1fSXin Li     }
1709*a97c2a1fSXin Li     else
1710*a97c2a1fSXin Li     {
1711*a97c2a1fSXin Li         u4_deinterlace = 0;
1712*a97c2a1fSXin Li     }
1713*a97c2a1fSXin Li 
1714*a97c2a1fSXin Li     if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_keep_threads_active))
1715*a97c2a1fSXin Li     {
1716*a97c2a1fSXin Li         i4_threads_active = ps_dec_init_ip->u4_keep_threads_active;
1717*a97c2a1fSXin Li     }
1718*a97c2a1fSXin Li     else
1719*a97c2a1fSXin Li     {
1720*a97c2a1fSXin Li         i4_threads_active = 0;
1721*a97c2a1fSXin Li     }
1722*a97c2a1fSXin Li 
1723*a97c2a1fSXin Li     if( (u4_chroma_format != IV_YUV_420P) &&
1724*a97c2a1fSXin Li         (u4_chroma_format != IV_YUV_420SP_UV) &&
1725*a97c2a1fSXin Li         (u4_chroma_format != IV_YUV_420SP_VU))
1726*a97c2a1fSXin Li     {
1727*a97c2a1fSXin Li         u4_share_disp_buf = 0;
1728*a97c2a1fSXin Li     }
1729*a97c2a1fSXin Li 
1730*a97c2a1fSXin Li     /* Disable deinterlacer in shared mode */
1731*a97c2a1fSXin Li     if(u4_share_disp_buf)
1732*a97c2a1fSXin Li     {
1733*a97c2a1fSXin Li         u4_deinterlace = 0;
1734*a97c2a1fSXin Li     }
1735*a97c2a1fSXin Li 
1736*a97c2a1fSXin Li     ps_mem_rec = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location;
1737*a97c2a1fSXin Li     ps_mem_rec ++;
1738*a97c2a1fSXin Li 
1739*a97c2a1fSXin Li 
1740*a97c2a1fSXin Li     ps_dec_init_op->s_ivd_init_op_t.u4_size = sizeof(impeg2d_init_op_t);
1741*a97c2a1fSXin Li 
1742*a97c2a1fSXin Li 
1743*a97c2a1fSXin Li     /* Except memTab[0], all other memTabs are initialized to zero */
1744*a97c2a1fSXin Li     for(i = 1; i < ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++)
1745*a97c2a1fSXin Li     {
1746*a97c2a1fSXin Li         memset(ps_mem_rec->pv_base,0,ps_mem_rec->u4_mem_size);
1747*a97c2a1fSXin Li         ps_mem_rec++;
1748*a97c2a1fSXin Li     }
1749*a97c2a1fSXin Li 
1750*a97c2a1fSXin Li     /* Reinitializing memTab[0] memory base address */
1751*a97c2a1fSXin Li     ps_mem_rec     = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location;
1752*a97c2a1fSXin Li 
1753*a97c2a1fSXin Li 
1754*a97c2a1fSXin Li     /* memTab[0] is for codec Handle,redundant currently not being used */
1755*a97c2a1fSXin Li     ps_dec_handle  = ps_mem_rec->pv_base;
1756*a97c2a1fSXin Li     u4_num_mem_rec = 1;
1757*a97c2a1fSXin Li     ps_mem_rec++;
1758*a97c2a1fSXin Li 
1759*a97c2a1fSXin Li 
1760*a97c2a1fSXin Li 
1761*a97c2a1fSXin Li 
1762*a97c2a1fSXin Li 
1763*a97c2a1fSXin Li     /* decoder handle */
1764*a97c2a1fSXin Li     ps_dec_state_multi_core = ps_mem_rec->pv_base;
1765*a97c2a1fSXin Li     u4_num_mem_rec++;
1766*a97c2a1fSXin Li     ps_mem_rec++;
1767*a97c2a1fSXin Li 
1768*a97c2a1fSXin Li 
1769*a97c2a1fSXin Li     {
1770*a97c2a1fSXin Li         ps_dec_handle->pv_codec_handle = (void *)ps_dec_state_multi_core; /* Initializing codec context */
1771*a97c2a1fSXin Li 
1772*a97c2a1fSXin Li         ps_dechdl->pv_codec_handle =  (void *)ps_dec_state_multi_core;
1773*a97c2a1fSXin Li         ps_dechdl->pv_fxns = (void *)impeg2d_api_function;
1774*a97c2a1fSXin Li     }
1775*a97c2a1fSXin Li 
1776*a97c2a1fSXin Li 
1777*a97c2a1fSXin Li     for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++)
1778*a97c2a1fSXin Li     {
1779*a97c2a1fSXin Li         WORD32 ret;
1780*a97c2a1fSXin Li         UWORD8 *pv_buf;
1781*a97c2a1fSXin Li         WORD32 mutex_size = ithread_get_mutex_lock_size();
1782*a97c2a1fSXin Li         WORD32 cond_size = ithread_get_cond_struct_size();
1783*a97c2a1fSXin Li         /*************************************************************************/
1784*a97c2a1fSXin Li         /*                      For MPEG2 Decoder Context                        */
1785*a97c2a1fSXin Li         /*************************************************************************/
1786*a97c2a1fSXin Li         ps_dec_state = ps_mem_rec->pv_base;
1787*a97c2a1fSXin Li 
1788*a97c2a1fSXin Li         ps_dec_state_multi_core->ps_dec_state[i4_num_threads] = ps_dec_state;
1789*a97c2a1fSXin Li 
1790*a97c2a1fSXin Li         ps_dec_state->ps_dec_state_multi_core = ps_dec_state_multi_core;
1791*a97c2a1fSXin Li 
1792*a97c2a1fSXin Li         ps_dec_state->i4_num_cores = 1;
1793*a97c2a1fSXin Li         /* @ */  /* Used for storing MemRecords */
1794*a97c2a1fSXin Li         u4_num_mem_rec++;
1795*a97c2a1fSXin Li         ps_mem_rec++;
1796*a97c2a1fSXin Li 
1797*a97c2a1fSXin Li         /* Thread handle */
1798*a97c2a1fSXin Li         ps_dec_state->pv_codec_thread_handle = ps_mem_rec->pv_base;
1799*a97c2a1fSXin Li         u4_num_mem_rec++;
1800*a97c2a1fSXin Li         ps_mem_rec++;
1801*a97c2a1fSXin Li 
1802*a97c2a1fSXin Li         pv_buf = ps_mem_rec->pv_base;
1803*a97c2a1fSXin Li         if (ps_mem_rec->u4_mem_size < 2 * mutex_size)
1804*a97c2a1fSXin Li         {
1805*a97c2a1fSXin Li             ps_dec_init_op->s_ivd_init_op_t.u4_error_code =
1806*a97c2a1fSXin Li                 IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT;
1807*a97c2a1fSXin Li             return(IV_FAIL);
1808*a97c2a1fSXin Li         }
1809*a97c2a1fSXin Li 
1810*a97c2a1fSXin Li         ps_dec_state->pv_proc_start_mutex = (UWORD8 *)pv_buf;
1811*a97c2a1fSXin Li         ps_dec_state->pv_proc_done_mutex = (UWORD8 *)pv_buf + mutex_size;
1812*a97c2a1fSXin Li 
1813*a97c2a1fSXin Li         ret = ithread_mutex_init(ps_dec_state->pv_proc_start_mutex);
1814*a97c2a1fSXin Li         RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret);
1815*a97c2a1fSXin Li 
1816*a97c2a1fSXin Li         ret = ithread_mutex_init(ps_dec_state->pv_proc_done_mutex);
1817*a97c2a1fSXin Li         RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret);
1818*a97c2a1fSXin Li 
1819*a97c2a1fSXin Li         u4_num_mem_rec++;
1820*a97c2a1fSXin Li         ps_mem_rec++;
1821*a97c2a1fSXin Li 
1822*a97c2a1fSXin Li         pv_buf = ps_mem_rec->pv_base;
1823*a97c2a1fSXin Li         if (ps_mem_rec->u4_mem_size < 2 * cond_size)
1824*a97c2a1fSXin Li         {
1825*a97c2a1fSXin Li             ps_dec_init_op->s_ivd_init_op_t.u4_error_code =
1826*a97c2a1fSXin Li                 IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT;
1827*a97c2a1fSXin Li             return(IV_FAIL);
1828*a97c2a1fSXin Li         }
1829*a97c2a1fSXin Li         ps_dec_state->pv_proc_start_condition = (UWORD8 *)pv_buf;
1830*a97c2a1fSXin Li         ps_dec_state->pv_proc_done_condition = (UWORD8 *)pv_buf + cond_size;
1831*a97c2a1fSXin Li 
1832*a97c2a1fSXin Li         ret = ithread_cond_init(ps_dec_state->pv_proc_start_condition);
1833*a97c2a1fSXin Li         RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret);
1834*a97c2a1fSXin Li 
1835*a97c2a1fSXin Li         ret = ithread_cond_init(ps_dec_state->pv_proc_done_condition);
1836*a97c2a1fSXin Li         RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret);
1837*a97c2a1fSXin Li 
1838*a97c2a1fSXin Li         u4_num_mem_rec++;
1839*a97c2a1fSXin Li         ps_mem_rec++;
1840*a97c2a1fSXin Li 
1841*a97c2a1fSXin Li     /*************************************************************************/
1842*a97c2a1fSXin Li     /*                      For Motion Compensation Buffers                  */
1843*a97c2a1fSXin Li     /*************************************************************************/
1844*a97c2a1fSXin Li     pv = ps_mem_rec->pv_base;
1845*a97c2a1fSXin Li 
1846*a97c2a1fSXin Li     /* for mc_fw_buf.pu1_y */
1847*a97c2a1fSXin Li 
1848*a97c2a1fSXin Li     ps_dec_state->s_mc_fw_buf.pu1_y = pv;
1849*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE);
1850*a97c2a1fSXin Li 
1851*a97c2a1fSXin Li     u4_size = sizeof(UWORD8) * MB_LUMA_MEM_SIZE;
1852*a97c2a1fSXin Li     /* for mc_fw_buf.pu1_u */
1853*a97c2a1fSXin Li 
1854*a97c2a1fSXin Li     ps_dec_state->s_mc_fw_buf.pu1_u = pv;
1855*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE);
1856*a97c2a1fSXin Li 
1857*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1858*a97c2a1fSXin Li 
1859*a97c2a1fSXin Li     /* for mc_fw_buf.pu1_v */
1860*a97c2a1fSXin Li 
1861*a97c2a1fSXin Li     ps_dec_state->s_mc_fw_buf.pu1_v = pv;
1862*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE);
1863*a97c2a1fSXin Li 
1864*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1865*a97c2a1fSXin Li 
1866*a97c2a1fSXin Li     /* for mc_bk_buf.pu1_y */
1867*a97c2a1fSXin Li 
1868*a97c2a1fSXin Li     ps_dec_state->s_mc_bk_buf.pu1_y = pv;
1869*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE);
1870*a97c2a1fSXin Li 
1871*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE;
1872*a97c2a1fSXin Li 
1873*a97c2a1fSXin Li     /* for mc_bk_buf.pu1_u */
1874*a97c2a1fSXin Li 
1875*a97c2a1fSXin Li     ps_dec_state->s_mc_bk_buf.pu1_u = pv;
1876*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE);
1877*a97c2a1fSXin Li 
1878*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1879*a97c2a1fSXin Li 
1880*a97c2a1fSXin Li     /* for mc_bk_buf.pu1_v */
1881*a97c2a1fSXin Li 
1882*a97c2a1fSXin Li     ps_dec_state->s_mc_bk_buf.pu1_v = pv;
1883*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE);
1884*a97c2a1fSXin Li 
1885*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1886*a97c2a1fSXin Li 
1887*a97c2a1fSXin Li     /* for mc_buf.pu1_y */
1888*a97c2a1fSXin Li 
1889*a97c2a1fSXin Li     ps_dec_state->s_mc_buf.pu1_y = pv;
1890*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE);
1891*a97c2a1fSXin Li 
1892*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE;
1893*a97c2a1fSXin Li 
1894*a97c2a1fSXin Li     /* for mc_buf.pu1_u */
1895*a97c2a1fSXin Li 
1896*a97c2a1fSXin Li     ps_dec_state->s_mc_buf.pu1_u = pv;
1897*a97c2a1fSXin Li     pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE);
1898*a97c2a1fSXin Li 
1899*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1900*a97c2a1fSXin Li 
1901*a97c2a1fSXin Li     /* for mc_buf.pu1_v */
1902*a97c2a1fSXin Li 
1903*a97c2a1fSXin Li     ps_dec_state->s_mc_buf.pu1_v = pv;
1904*a97c2a1fSXin Li 
1905*a97c2a1fSXin Li     u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE;
1906*a97c2a1fSXin Li 
1907*a97c2a1fSXin Li     u4_num_mem_rec++;
1908*a97c2a1fSXin Li     ps_mem_rec++;
1909*a97c2a1fSXin Li 
1910*a97c2a1fSXin Li 
1911*a97c2a1fSXin Li 
1912*a97c2a1fSXin Li     ps_dec_state->pv_pic_buf_mg = 0;
1913*a97c2a1fSXin Li 
1914*a97c2a1fSXin Li     /*************************************************************************/
1915*a97c2a1fSXin Li     /*        For saving stack context to support global error handling      */
1916*a97c2a1fSXin Li     /*************************************************************************/
1917*a97c2a1fSXin Li     ps_dec_state->pv_stack_cntxt = ps_mem_rec->pv_base;
1918*a97c2a1fSXin Li     u4_num_mem_rec++;
1919*a97c2a1fSXin Li     ps_mem_rec++;
1920*a97c2a1fSXin Li 
1921*a97c2a1fSXin Li     }
1922*a97c2a1fSXin Li 
1923*a97c2a1fSXin Li 
1924*a97c2a1fSXin Li 
1925*a97c2a1fSXin Li 
1926*a97c2a1fSXin Li 
1927*a97c2a1fSXin Li     /*************************************************************************/
1928*a97c2a1fSXin Li     /*                          For Picture Buffer Manager                   */
1929*a97c2a1fSXin Li     /*************************************************************************/
1930*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
1931*a97c2a1fSXin Li 
1932*a97c2a1fSXin Li     ps_dec_state->pv_pic_buf_mg = ps_mem_rec->pv_base;
1933*a97c2a1fSXin Li     ps_dec_state->pv_pic_buf_base = (UWORD8 *)ps_mem_rec->pv_base + sizeof(buf_mgr_t);
1934*a97c2a1fSXin Li 
1935*a97c2a1fSXin Li     u4_num_mem_rec++;
1936*a97c2a1fSXin Li     ps_mem_rec++;
1937*a97c2a1fSXin Li 
1938*a97c2a1fSXin Li 
1939*a97c2a1fSXin Li 
1940*a97c2a1fSXin Li     for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++)
1941*a97c2a1fSXin Li     {
1942*a97c2a1fSXin Li 
1943*a97c2a1fSXin Li         ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads];
1944*a97c2a1fSXin Li 
1945*a97c2a1fSXin Li 
1946*a97c2a1fSXin Li         /* --------------------------------------------------------------------- */
1947*a97c2a1fSXin Li         /* Initializations */
1948*a97c2a1fSXin Li 
1949*a97c2a1fSXin Li         ps_dec_state->u2_header_done  = 0;  /* Header decoding not done */
1950*a97c2a1fSXin Li 
1951*a97c2a1fSXin Li 
1952*a97c2a1fSXin Li         {
1953*a97c2a1fSXin Li             UWORD32 u4_max_frm_width,u4_max_frm_height;
1954*a97c2a1fSXin Li 
1955*a97c2a1fSXin Li             u4_max_frm_width = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd);
1956*a97c2a1fSXin Li             u4_max_frm_height = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht);
1957*a97c2a1fSXin Li 
1958*a97c2a1fSXin Li             ps_dec_state->u2_create_max_width   = u4_max_frm_width;
1959*a97c2a1fSXin Li             ps_dec_state->u2_create_max_height  = u4_max_frm_height;
1960*a97c2a1fSXin Li 
1961*a97c2a1fSXin Li             ps_dec_state->i4_chromaFormat = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format;
1962*a97c2a1fSXin Li             ps_dec_state->u4_frm_buf_stride  = 0 ;
1963*a97c2a1fSXin Li             ps_dec_state->u2_frame_width  = u4_max_frm_width;
1964*a97c2a1fSXin Li             ps_dec_state->u2_picture_width  = u4_max_frm_width;
1965*a97c2a1fSXin Li             ps_dec_state->u2_horizontal_size  = u4_max_frm_width;
1966*a97c2a1fSXin Li 
1967*a97c2a1fSXin Li             ps_dec_state->u2_frame_height = u4_max_frm_height;
1968*a97c2a1fSXin Li             ps_dec_state->u2_vertical_size = u4_max_frm_height;
1969*a97c2a1fSXin Li             ps_dec_state->u4_share_disp_buf = u4_share_disp_buf;
1970*a97c2a1fSXin Li             ps_dec_state->u4_deinterlace = u4_deinterlace;
1971*a97c2a1fSXin Li             ps_dec_state->i4_threads_active = i4_threads_active;
1972*a97c2a1fSXin Li             ps_dec_state->ps_deint_pic = NULL;
1973*a97c2a1fSXin Li         }
1974*a97c2a1fSXin Li     }
1975*a97c2a1fSXin Li 
1976*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
1977*a97c2a1fSXin Li 
1978*a97c2a1fSXin Li     if((ps_dec_state->i4_chromaFormat  == IV_YUV_422ILE)
1979*a97c2a1fSXin Li         &&((ps_dec_state->u2_vertical_size & 0x1) != 0))
1980*a97c2a1fSXin Li     {
1981*a97c2a1fSXin Li         //printf("Error! Height should be multiple of 2 if Chroma format is 422ILE\n");
1982*a97c2a1fSXin Li         ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_CHROMA_FORMAT_HEIGHT_ERROR;
1983*a97c2a1fSXin Li         return(IV_FAIL);
1984*a97c2a1fSXin Li 
1985*a97c2a1fSXin Li 
1986*a97c2a1fSXin Li     }
1987*a97c2a1fSXin Li 
1988*a97c2a1fSXin Li     /* --------------------------------------------------------------------- */
1989*a97c2a1fSXin Li 
1990*a97c2a1fSXin Li 
1991*a97c2a1fSXin Li /* ! */
1992*a97c2a1fSXin Li     // picture buffer manager initialization will be done only for first thread
1993*a97c2a1fSXin Li     impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr);
1994*a97c2a1fSXin Li     impeg2_buf_mgr_init((buf_mgr_t *)ps_dec_state->pv_pic_buf_mg);
1995*a97c2a1fSXin Li 
1996*a97c2a1fSXin Li     /*************************************************************************/
1997*a97c2a1fSXin Li     /*             Internal Frame Buffers                                    */
1998*a97c2a1fSXin Li     /*************************************************************************/
1999*a97c2a1fSXin Li 
2000*a97c2a1fSXin Li 
2001*a97c2a1fSXin Li     /* Set first frame to grey */
2002*a97c2a1fSXin Li     {
2003*a97c2a1fSXin Li         ps_frm_buf = ps_mem_rec;
2004*a97c2a1fSXin Li         memset(ps_frm_buf->pv_base, 128, ps_frm_buf->u4_mem_size);
2005*a97c2a1fSXin Li         ps_frm_buf++;
2006*a97c2a1fSXin Li     }
2007*a97c2a1fSXin Li 
2008*a97c2a1fSXin Li     if(0 == ps_dec_state->u4_share_disp_buf)
2009*a97c2a1fSXin Li     {
2010*a97c2a1fSXin Li         pic_buf_t *ps_pic_buf;
2011*a97c2a1fSXin Li         ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base;
2012*a97c2a1fSXin Li         for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++)
2013*a97c2a1fSXin Li         {
2014*a97c2a1fSXin Li             UWORD8 *pu1_buf;
2015*a97c2a1fSXin Li             pu1_buf = ps_mem_rec->pv_base;
2016*a97c2a1fSXin Li 
2017*a97c2a1fSXin Li             ps_pic_buf->pu1_y = pu1_buf;
2018*a97c2a1fSXin Li             pu1_buf += i4_max_ht * i4_max_wd;
2019*a97c2a1fSXin Li 
2020*a97c2a1fSXin Li             ps_pic_buf->pu1_u = pu1_buf;
2021*a97c2a1fSXin Li             pu1_buf += i4_max_ht * i4_max_wd >> 2;
2022*a97c2a1fSXin Li 
2023*a97c2a1fSXin Li             ps_pic_buf->pu1_v = pu1_buf;
2024*a97c2a1fSXin Li             pu1_buf += i4_max_ht * i4_max_wd >> 2;
2025*a97c2a1fSXin Li 
2026*a97c2a1fSXin Li             ps_pic_buf->i4_buf_id = i;
2027*a97c2a1fSXin Li 
2028*a97c2a1fSXin Li             ps_pic_buf->u1_used_as_ref = 0;
2029*a97c2a1fSXin Li 
2030*a97c2a1fSXin Li             ps_pic_buf->u4_ts = 0;
2031*a97c2a1fSXin Li 
2032*a97c2a1fSXin Li             impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i);
2033*a97c2a1fSXin Li             ps_mem_rec++;
2034*a97c2a1fSXin Li             ps_pic_buf++;
2035*a97c2a1fSXin Li         }
2036*a97c2a1fSXin Li         u4_num_mem_rec += NUM_INT_FRAME_BUFFERS;
2037*a97c2a1fSXin Li     }
2038*a97c2a1fSXin Li     else if (ps_dec_state->i4_chromaFormat  != IV_YUV_420P)
2039*a97c2a1fSXin Li     {
2040*a97c2a1fSXin Li         for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++)
2041*a97c2a1fSXin Li         {
2042*a97c2a1fSXin Li             ps_dec_state->pu1_chroma_ref_buf[i] = ps_mem_rec->pv_base;
2043*a97c2a1fSXin Li             ps_mem_rec++;
2044*a97c2a1fSXin Li         }
2045*a97c2a1fSXin Li 
2046*a97c2a1fSXin Li         u4_num_mem_rec += NUM_INT_FRAME_BUFFERS;
2047*a97c2a1fSXin Li     }
2048*a97c2a1fSXin Li     else
2049*a97c2a1fSXin Li     {
2050*a97c2a1fSXin Li         ps_mem_rec+=NUM_INT_FRAME_BUFFERS;
2051*a97c2a1fSXin Li         u4_num_mem_rec += NUM_INT_FRAME_BUFFERS;
2052*a97c2a1fSXin Li     }
2053*a97c2a1fSXin Li 
2054*a97c2a1fSXin Li 
2055*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
2056*a97c2a1fSXin Li 
2057*a97c2a1fSXin Li     ps_dec_state->pu1_input_buffer = ps_mem_rec->pv_base;
2058*a97c2a1fSXin Li     u4_num_mem_rec++;
2059*a97c2a1fSXin Li     ps_mem_rec++;
2060*a97c2a1fSXin Li 
2061*a97c2a1fSXin Li     ps_dec_state->pv_jobq_buf = ps_mem_rec->pv_base;
2062*a97c2a1fSXin Li     ps_dec_state->i4_jobq_buf_size = ps_mem_rec->u4_mem_size;
2063*a97c2a1fSXin Li     u4_num_mem_rec++;
2064*a97c2a1fSXin Li     ps_mem_rec++;
2065*a97c2a1fSXin Li 
2066*a97c2a1fSXin Li     ps_dec_state->u1_flushfrm = 0;
2067*a97c2a1fSXin Li     ps_dec_state->u1_flushcnt = 0;
2068*a97c2a1fSXin Li     ps_dec_state->pv_jobq = impeg2_jobq_init(ps_dec_state->pv_jobq_buf, ps_dec_state->i4_jobq_buf_size);
2069*a97c2a1fSXin Li 
2070*a97c2a1fSXin Li 
2071*a97c2a1fSXin Li     ps_dec_state->pv_deinterlacer_ctxt = ps_mem_rec->pv_base;
2072*a97c2a1fSXin Li     u4_num_mem_rec++;
2073*a97c2a1fSXin Li     ps_mem_rec++;
2074*a97c2a1fSXin Li 
2075*a97c2a1fSXin Li     ps_dec_state->pu1_deint_fmt_buf = ps_mem_rec->pv_base;
2076*a97c2a1fSXin Li     u4_num_mem_rec++;
2077*a97c2a1fSXin Li     ps_mem_rec++;
2078*a97c2a1fSXin Li 
2079*a97c2a1fSXin Li 
2080*a97c2a1fSXin Li     /*************************************************************************/
2081*a97c2a1fSXin Li     /*        Last MemTab is used for storing TabRecords                     */
2082*a97c2a1fSXin Li     /*************************************************************************/
2083*a97c2a1fSXin Li     ps_dec_state->pv_memTab     = (void *)ps_mem_rec->pv_base;
2084*a97c2a1fSXin Li     memcpy(ps_mem_rec->pv_base,ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location, ps_mem_rec->u4_mem_size);
2085*a97c2a1fSXin Li     /* Updating in Decoder Context with memRecords  */
2086*a97c2a1fSXin Li     u4_num_mem_rec++;
2087*a97c2a1fSXin Li     ps_mem_rec++;
2088*a97c2a1fSXin Li     ps_dec_state->u4_num_mem_records = u4_num_mem_rec;
2089*a97c2a1fSXin Li 
2090*a97c2a1fSXin Li     if(u4_num_mem_rec != ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec)
2091*a97c2a1fSXin Li     {
2092*a97c2a1fSXin Li         ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_NUM_MEM_REC_NOT_SUFFICIENT;
2093*a97c2a1fSXin Li         return(IV_FAIL);
2094*a97c2a1fSXin Li     }
2095*a97c2a1fSXin Li 
2096*a97c2a1fSXin Li     ps_dec_state->u4_num_frames_decoded    = 0;
2097*a97c2a1fSXin Li     ps_dec_state->aps_ref_pics[0] = NULL;
2098*a97c2a1fSXin Li     ps_dec_state->aps_ref_pics[1] = NULL;
2099*a97c2a1fSXin Li 
2100*a97c2a1fSXin Li     ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IV_SUCCESS;
2101*a97c2a1fSXin Li 
2102*a97c2a1fSXin Li     impeg2d_init_arch(ps_dec_state);
2103*a97c2a1fSXin Li 
2104*a97c2a1fSXin Li     impeg2d_init_function_ptr(ps_dec_state);
2105*a97c2a1fSXin Li 
2106*a97c2a1fSXin Li     return(IV_SUCCESS);
2107*a97c2a1fSXin Li }
2108*a97c2a1fSXin Li 
2109*a97c2a1fSXin Li /*****************************************************************************/
2110*a97c2a1fSXin Li /*                                                                           */
2111*a97c2a1fSXin Li /*  Function Name : impeg2d_api_retrieve_mem_rec                             */
2112*a97c2a1fSXin Li /*                                                                           */
2113*a97c2a1fSXin Li /*  Description   :                                                          */
2114*a97c2a1fSXin Li /*                                                                           */
2115*a97c2a1fSXin Li /*  Inputs        :                                                          */
2116*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
2117*a97c2a1fSXin Li /*  Outputs       :                                                          */
2118*a97c2a1fSXin Li /*  Returns       : void                                                     */
2119*a97c2a1fSXin Li /*                                                                           */
2120*a97c2a1fSXin Li /*  Issues        : none                                                     */
2121*a97c2a1fSXin Li /*                                                                           */
2122*a97c2a1fSXin Li /*  Revision History:                                                        */
2123*a97c2a1fSXin Li /*                                                                           */
2124*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
2125*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
2126*a97c2a1fSXin Li /*                                                                           */
2127*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_retrieve_mem_rec(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)2128*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_retrieve_mem_rec(iv_obj_t *ps_dechdl,
2129*a97c2a1fSXin Li                                             void *pv_api_ip,
2130*a97c2a1fSXin Li                                             void *pv_api_op)
2131*a97c2a1fSXin Li {
2132*a97c2a1fSXin Li     UWORD32 u4_i;
2133*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
2134*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
2135*a97c2a1fSXin Li     iv_mem_rec_t *ps_mem_rec;
2136*a97c2a1fSXin Li     iv_mem_rec_t *ps_temp_rec;
2137*a97c2a1fSXin Li     IMPEG2D_ERROR_CODES_T ret;
2138*a97c2a1fSXin Li     dec_state_t *ps_dec_thd;
2139*a97c2a1fSXin Li 
2140*a97c2a1fSXin Li 
2141*a97c2a1fSXin Li 
2142*a97c2a1fSXin Li     impeg2d_retrieve_mem_rec_ip_t *ps_retr_mem_rec_ip;
2143*a97c2a1fSXin Li     impeg2d_retrieve_mem_rec_op_t *ps_retr_mem_rec_op;
2144*a97c2a1fSXin Li 
2145*a97c2a1fSXin Li     ps_retr_mem_rec_ip  = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip;
2146*a97c2a1fSXin Li     ps_retr_mem_rec_op  = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op;
2147*a97c2a1fSXin Li 
2148*a97c2a1fSXin Li     ps_mem_rec          = ps_retr_mem_rec_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location;
2149*a97c2a1fSXin Li     ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle);
2150*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
2151*a97c2a1fSXin Li     ps_temp_rec        = ps_dec_state->pv_memTab;
2152*a97c2a1fSXin Li 
2153*a97c2a1fSXin Li     for(u4_i = 0; u4_i < (ps_dec_state->u4_num_mem_records);u4_i++)
2154*a97c2a1fSXin Li     {
2155*a97c2a1fSXin Li         ps_mem_rec[u4_i].u4_mem_size        = ps_temp_rec[u4_i].u4_mem_size;
2156*a97c2a1fSXin Li         ps_mem_rec[u4_i].u4_mem_alignment   = ps_temp_rec[u4_i].u4_mem_alignment;
2157*a97c2a1fSXin Li         ps_mem_rec[u4_i].e_mem_type         = ps_temp_rec[u4_i].e_mem_type;
2158*a97c2a1fSXin Li         ps_mem_rec[u4_i].pv_base            = ps_temp_rec[u4_i].pv_base;
2159*a97c2a1fSXin Li     }
2160*a97c2a1fSXin Li 
2161*a97c2a1fSXin Li     ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code       = IV_SUCCESS;
2162*a97c2a1fSXin Li     ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_num_mem_rec_filled   = ps_dec_state->u4_num_mem_records;
2163*a97c2a1fSXin Li 
2164*a97c2a1fSXin Li     if(ps_dec_state->i4_threads_active)
2165*a97c2a1fSXin Li     {
2166*a97c2a1fSXin Li         impeg2d_join_threads(ps_dec_state_multi_core);
2167*a97c2a1fSXin Li 
2168*a97c2a1fSXin Li         for(u4_i = 0; u4_i < MAX_THREADS; u4_i++)
2169*a97c2a1fSXin Li         {
2170*a97c2a1fSXin Li             ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[u4_i];
2171*a97c2a1fSXin Li 
2172*a97c2a1fSXin Li             ret = ithread_cond_destroy(ps_dec_thd->pv_proc_start_condition);
2173*a97c2a1fSXin Li             if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret)
2174*a97c2a1fSXin Li                 return(IV_FAIL);
2175*a97c2a1fSXin Li 
2176*a97c2a1fSXin Li             ret = ithread_cond_destroy(ps_dec_thd->pv_proc_done_condition);
2177*a97c2a1fSXin Li             if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret)
2178*a97c2a1fSXin Li                 return(IV_FAIL);
2179*a97c2a1fSXin Li 
2180*a97c2a1fSXin Li             ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_start_mutex);
2181*a97c2a1fSXin Li             if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret)
2182*a97c2a1fSXin Li                 return(IV_FAIL);
2183*a97c2a1fSXin Li 
2184*a97c2a1fSXin Li             ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_done_mutex);
2185*a97c2a1fSXin Li             if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret)
2186*a97c2a1fSXin Li                 return(IV_FAIL);
2187*a97c2a1fSXin Li         }
2188*a97c2a1fSXin Li     }
2189*a97c2a1fSXin Li 
2190*a97c2a1fSXin Li     impeg2_jobq_deinit(ps_dec_state->pv_jobq);
2191*a97c2a1fSXin Li     IMPEG2D_PRINT_STATISTICS();
2192*a97c2a1fSXin Li 
2193*a97c2a1fSXin Li 
2194*a97c2a1fSXin Li     return(IV_SUCCESS);
2195*a97c2a1fSXin Li 
2196*a97c2a1fSXin Li }
2197*a97c2a1fSXin Li 
2198*a97c2a1fSXin Li /*****************************************************************************/
2199*a97c2a1fSXin Li /*                                                                           */
2200*a97c2a1fSXin Li /*  Function Name :   impeg2d_api_ctl                                        */
2201*a97c2a1fSXin Li /*                                                                           */
2202*a97c2a1fSXin Li /*  Description   :                                                          */
2203*a97c2a1fSXin Li /*                                                                           */
2204*a97c2a1fSXin Li /*  Inputs        :                                                          */
2205*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
2206*a97c2a1fSXin Li /*  Outputs       :                                                          */
2207*a97c2a1fSXin Li /*  Returns       : void                                                     */
2208*a97c2a1fSXin Li /*                                                                           */
2209*a97c2a1fSXin Li /*  Issues        : none                                                     */
2210*a97c2a1fSXin Li /*                                                                           */
2211*a97c2a1fSXin Li /*  Revision History:                                                        */
2212*a97c2a1fSXin Li /*                                                                           */
2213*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
2214*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
2215*a97c2a1fSXin Li /*                                                                           */
2216*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_ctl(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)2217*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_ctl(iv_obj_t *ps_dechdl,
2218*a97c2a1fSXin Li                                      void *pv_api_ip,
2219*a97c2a1fSXin Li                                      void *pv_api_op)
2220*a97c2a1fSXin Li {
2221*a97c2a1fSXin Li     WORD32 i4_sub_cmd;
2222*a97c2a1fSXin Li     UWORD32 *pu4_api_ip;
2223*a97c2a1fSXin Li     IV_API_CALL_STATUS_T u4_error_code;
2224*a97c2a1fSXin Li 
2225*a97c2a1fSXin Li     pu4_api_ip = (UWORD32 *)pv_api_ip;
2226*a97c2a1fSXin Li     i4_sub_cmd = *(pu4_api_ip + 2);
2227*a97c2a1fSXin Li 
2228*a97c2a1fSXin Li     switch(i4_sub_cmd)
2229*a97c2a1fSXin Li     {
2230*a97c2a1fSXin Li         case IVD_CMD_CTL_GETPARAMS:
2231*a97c2a1fSXin Li             u4_error_code = impeg2d_api_get_status(ps_dechdl, (void *)pv_api_ip,
2232*a97c2a1fSXin Li                                                    (void *)pv_api_op);
2233*a97c2a1fSXin Li             break;
2234*a97c2a1fSXin Li 
2235*a97c2a1fSXin Li         case IVD_CMD_CTL_SETPARAMS:
2236*a97c2a1fSXin Li             u4_error_code = impeg2d_api_set_params(ps_dechdl, (void *)pv_api_ip,
2237*a97c2a1fSXin Li                                                    (void *)pv_api_op);
2238*a97c2a1fSXin Li             break;
2239*a97c2a1fSXin Li 
2240*a97c2a1fSXin Li         case IVD_CMD_CTL_RESET:
2241*a97c2a1fSXin Li             u4_error_code = impeg2d_api_reset(ps_dechdl, (void *)pv_api_ip,
2242*a97c2a1fSXin Li                                               (void *)pv_api_op);
2243*a97c2a1fSXin Li             break;
2244*a97c2a1fSXin Li 
2245*a97c2a1fSXin Li         case IVD_CMD_CTL_SETDEFAULT:
2246*a97c2a1fSXin Li             u4_error_code = impeg2d_api_set_default(ps_dechdl,
2247*a97c2a1fSXin Li                                                           (void *)pv_api_ip,
2248*a97c2a1fSXin Li                                                           (void *)pv_api_op);
2249*a97c2a1fSXin Li             break;
2250*a97c2a1fSXin Li 
2251*a97c2a1fSXin Li         case IVD_CMD_CTL_FLUSH:
2252*a97c2a1fSXin Li             u4_error_code = impeg2d_api_set_flush_mode(ps_dechdl,
2253*a97c2a1fSXin Li                                                              (void *)pv_api_ip,
2254*a97c2a1fSXin Li                                                              (void *)pv_api_op);
2255*a97c2a1fSXin Li             break;
2256*a97c2a1fSXin Li 
2257*a97c2a1fSXin Li         case IVD_CMD_CTL_GETBUFINFO:
2258*a97c2a1fSXin Li             u4_error_code = impeg2d_api_get_buf_info(ps_dechdl,
2259*a97c2a1fSXin Li                                                            (void *)pv_api_ip,
2260*a97c2a1fSXin Li                                                            (void *)pv_api_op);
2261*a97c2a1fSXin Li             break;
2262*a97c2a1fSXin Li 
2263*a97c2a1fSXin Li         case IVD_CMD_CTL_GETVERSION:
2264*a97c2a1fSXin Li             u4_error_code = impeg2d_api_get_version(ps_dechdl, (void *)pv_api_ip,
2265*a97c2a1fSXin Li                                                       (void *)pv_api_op);
2266*a97c2a1fSXin Li             break;
2267*a97c2a1fSXin Li 
2268*a97c2a1fSXin Li         case IMPEG2D_CMD_CTL_SET_NUM_CORES:
2269*a97c2a1fSXin Li             u4_error_code = impeg2d_api_set_num_cores(ps_dechdl,
2270*a97c2a1fSXin Li                                                          (void *)pv_api_ip,
2271*a97c2a1fSXin Li                                                          (void *)pv_api_op);
2272*a97c2a1fSXin Li             break;
2273*a97c2a1fSXin Li 
2274*a97c2a1fSXin Li         case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS:
2275*a97c2a1fSXin Li             u4_error_code = impeg2d_get_frame_dimensions(ps_dechdl,
2276*a97c2a1fSXin Li                                                        (void *)pv_api_ip,
2277*a97c2a1fSXin Li                                                        (void *)pv_api_op);
2278*a97c2a1fSXin Li             break;
2279*a97c2a1fSXin Li 
2280*a97c2a1fSXin Li         case IMPEG2D_CMD_CTL_GET_SEQ_INFO:
2281*a97c2a1fSXin Li             u4_error_code = impeg2d_api_get_seq_info(ps_dechdl,
2282*a97c2a1fSXin Li                                                          (void *)pv_api_ip,
2283*a97c2a1fSXin Li                                                          (void *)pv_api_op);
2284*a97c2a1fSXin Li             break;
2285*a97c2a1fSXin Li 
2286*a97c2a1fSXin Li         case IMPEG2D_CMD_CTL_SET_PROCESSOR:
2287*a97c2a1fSXin Li             u4_error_code = impeg2d_set_processor(ps_dechdl, (void *)pv_api_ip,
2288*a97c2a1fSXin Li                                                 (void *)pv_api_op);
2289*a97c2a1fSXin Li             break;
2290*a97c2a1fSXin Li 
2291*a97c2a1fSXin Li         default:
2292*a97c2a1fSXin Li             u4_error_code = IV_FAIL;
2293*a97c2a1fSXin Li             break;
2294*a97c2a1fSXin Li     }
2295*a97c2a1fSXin Li 
2296*a97c2a1fSXin Li     return (u4_error_code);
2297*a97c2a1fSXin Li 
2298*a97c2a1fSXin Li }
2299*a97c2a1fSXin Li 
2300*a97c2a1fSXin Li /*****************************************************************************/
2301*a97c2a1fSXin Li /*                                                                           */
2302*a97c2a1fSXin Li /*  Function Name : impeg2d_api_check_struct_sanity                          */
2303*a97c2a1fSXin Li /*                                                                           */
2304*a97c2a1fSXin Li /*  Description   :                                                          */
2305*a97c2a1fSXin Li /*                                                                           */
2306*a97c2a1fSXin Li /*  Inputs        :                                                          */
2307*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
2308*a97c2a1fSXin Li /*  Outputs       :                                                          */
2309*a97c2a1fSXin Li /*  Returns       : void                                                     */
2310*a97c2a1fSXin Li /*                                                                           */
2311*a97c2a1fSXin Li /*  Issues        : none                                                     */
2312*a97c2a1fSXin Li /*                                                                           */
2313*a97c2a1fSXin Li /*  Revision History:                                                        */
2314*a97c2a1fSXin Li /*                                                                           */
2315*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
2316*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
2317*a97c2a1fSXin Li /*                                                                           */
2318*a97c2a1fSXin Li /*****************************************************************************/
impeg2d_api_check_struct_sanity(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)2319*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_check_struct_sanity(iv_obj_t *ps_handle,
2320*a97c2a1fSXin Li                                                     void *pv_api_ip,
2321*a97c2a1fSXin Li                                                     void *pv_api_op)
2322*a97c2a1fSXin Li {
2323*a97c2a1fSXin Li     WORD32  i4_cmd;
2324*a97c2a1fSXin Li     UWORD32 *pu4_api_ip;
2325*a97c2a1fSXin Li     UWORD32 *pu4_api_op;
2326*a97c2a1fSXin Li     WORD32 i,j;
2327*a97c2a1fSXin Li 
2328*a97c2a1fSXin Li     if(NULL == pv_api_op)
2329*a97c2a1fSXin Li         return(IV_FAIL);
2330*a97c2a1fSXin Li 
2331*a97c2a1fSXin Li     if(NULL == pv_api_ip)
2332*a97c2a1fSXin Li         return(IV_FAIL);
2333*a97c2a1fSXin Li 
2334*a97c2a1fSXin Li     pu4_api_ip  = (UWORD32 *)pv_api_ip;
2335*a97c2a1fSXin Li     pu4_api_op  = (UWORD32 *)pv_api_op;
2336*a97c2a1fSXin Li     i4_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
2337*a97c2a1fSXin Li 
2338*a97c2a1fSXin Li     /* error checks on handle */
2339*a97c2a1fSXin Li     switch(i4_cmd)
2340*a97c2a1fSXin Li     {
2341*a97c2a1fSXin Li         case IV_CMD_GET_NUM_MEM_REC:
2342*a97c2a1fSXin Li         case IV_CMD_FILL_NUM_MEM_REC:
2343*a97c2a1fSXin Li             break;
2344*a97c2a1fSXin Li         case IV_CMD_INIT:
2345*a97c2a1fSXin Li             if(ps_handle == NULL)
2346*a97c2a1fSXin Li             {
2347*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2348*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
2349*a97c2a1fSXin Li                 return IV_FAIL;
2350*a97c2a1fSXin Li             }
2351*a97c2a1fSXin Li 
2352*a97c2a1fSXin Li             if(ps_handle->u4_size != sizeof(iv_obj_t))
2353*a97c2a1fSXin Li             {
2354*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2355*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
2356*a97c2a1fSXin Li                 return IV_FAIL;
2357*a97c2a1fSXin Li             }
2358*a97c2a1fSXin Li             break;
2359*a97c2a1fSXin Li         case IVD_CMD_GET_DISPLAY_FRAME:
2360*a97c2a1fSXin Li         case IVD_CMD_VIDEO_DECODE:
2361*a97c2a1fSXin Li         case IV_CMD_RETRIEVE_MEMREC:
2362*a97c2a1fSXin Li         case IVD_CMD_SET_DISPLAY_FRAME:
2363*a97c2a1fSXin Li         case IVD_CMD_REL_DISPLAY_FRAME:
2364*a97c2a1fSXin Li         case IVD_CMD_VIDEO_CTL:
2365*a97c2a1fSXin Li             {
2366*a97c2a1fSXin Li             if(ps_handle == NULL)
2367*a97c2a1fSXin Li             {
2368*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2369*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
2370*a97c2a1fSXin Li                 return IV_FAIL;
2371*a97c2a1fSXin Li             }
2372*a97c2a1fSXin Li 
2373*a97c2a1fSXin Li             if(ps_handle->u4_size != sizeof(iv_obj_t))
2374*a97c2a1fSXin Li             {
2375*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2376*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
2377*a97c2a1fSXin Li                 return IV_FAIL;
2378*a97c2a1fSXin Li             }
2379*a97c2a1fSXin Li             if(ps_handle->pv_fxns != impeg2d_api_function)
2380*a97c2a1fSXin Li             {
2381*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2382*a97c2a1fSXin Li                     *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
2383*a97c2a1fSXin Li                 return IV_FAIL;
2384*a97c2a1fSXin Li             }
2385*a97c2a1fSXin Li 
2386*a97c2a1fSXin Li             if(ps_handle->pv_codec_handle == NULL)
2387*a97c2a1fSXin Li             {
2388*a97c2a1fSXin Li                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2389*a97c2a1fSXin Li                     *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
2390*a97c2a1fSXin Li                 return IV_FAIL;
2391*a97c2a1fSXin Li             }
2392*a97c2a1fSXin Li             }
2393*a97c2a1fSXin Li             break;
2394*a97c2a1fSXin Li         default:
2395*a97c2a1fSXin Li             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
2396*a97c2a1fSXin Li             *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
2397*a97c2a1fSXin Li             return IV_FAIL;
2398*a97c2a1fSXin Li     }
2399*a97c2a1fSXin Li 
2400*a97c2a1fSXin Li     switch(i4_cmd)
2401*a97c2a1fSXin Li     {
2402*a97c2a1fSXin Li         case IV_CMD_GET_NUM_MEM_REC:
2403*a97c2a1fSXin Li             {
2404*a97c2a1fSXin Li                 impeg2d_num_mem_rec_ip_t *ps_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip;
2405*a97c2a1fSXin Li                 impeg2d_num_mem_rec_op_t *ps_op = (impeg2d_num_mem_rec_op_t *)pv_api_op;
2406*a97c2a1fSXin Li                 ps_op->s_ivd_num_mem_rec_op_t.u4_error_code = 0;
2407*a97c2a1fSXin Li 
2408*a97c2a1fSXin Li                 if(ps_ip->s_ivd_num_mem_rec_ip_t.u4_size != sizeof(impeg2d_num_mem_rec_ip_t))
2409*a97c2a1fSXin Li                 {
2410*a97c2a1fSXin Li                     ps_op->s_ivd_num_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2411*a97c2a1fSXin Li                     ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2412*a97c2a1fSXin Li                     return(IV_FAIL);
2413*a97c2a1fSXin Li                 }
2414*a97c2a1fSXin Li 
2415*a97c2a1fSXin Li                 if(ps_op->s_ivd_num_mem_rec_op_t.u4_size != sizeof(impeg2d_num_mem_rec_op_t))
2416*a97c2a1fSXin Li                 {
2417*a97c2a1fSXin Li                     ps_op->s_ivd_num_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2418*a97c2a1fSXin Li                     ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2419*a97c2a1fSXin Li                     return(IV_FAIL);
2420*a97c2a1fSXin Li                 }
2421*a97c2a1fSXin Li             }
2422*a97c2a1fSXin Li             break;
2423*a97c2a1fSXin Li         case IV_CMD_FILL_NUM_MEM_REC:
2424*a97c2a1fSXin Li             {
2425*a97c2a1fSXin Li                 impeg2d_fill_mem_rec_ip_t *ps_ip = (impeg2d_fill_mem_rec_ip_t *)pv_api_ip;
2426*a97c2a1fSXin Li                 impeg2d_fill_mem_rec_op_t *ps_op = (impeg2d_fill_mem_rec_op_t *)pv_api_op;
2427*a97c2a1fSXin Li                 iv_mem_rec_t                  *ps_mem_rec;
2428*a97c2a1fSXin Li 
2429*a97c2a1fSXin Li                 ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0;
2430*a97c2a1fSXin Li 
2431*a97c2a1fSXin Li                 if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size != sizeof(impeg2d_fill_mem_rec_ip_t))
2432*a97c2a1fSXin Li                 {
2433*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2434*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2435*a97c2a1fSXin Li                     return(IV_FAIL);
2436*a97c2a1fSXin Li                 }
2437*a97c2a1fSXin Li 
2438*a97c2a1fSXin Li                 if(ps_op->s_ivd_fill_mem_rec_op_t.u4_size != sizeof(impeg2d_fill_mem_rec_op_t))
2439*a97c2a1fSXin Li                 {
2440*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2441*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2442*a97c2a1fSXin Li                     return(IV_FAIL);
2443*a97c2a1fSXin Li                 }
2444*a97c2a1fSXin Li 
2445*a97c2a1fSXin Li                 if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd < MIN_WIDTH)
2446*a97c2a1fSXin Li                 {
2447*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2448*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED;
2449*a97c2a1fSXin Li                     return(IV_FAIL);
2450*a97c2a1fSXin Li                 }
2451*a97c2a1fSXin Li 
2452*a97c2a1fSXin Li                 if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd > MAX_WIDTH)
2453*a97c2a1fSXin Li                 {
2454*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2455*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED;
2456*a97c2a1fSXin Li                     return(IV_FAIL);
2457*a97c2a1fSXin Li                 }
2458*a97c2a1fSXin Li 
2459*a97c2a1fSXin Li                 if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht < MIN_HEIGHT)
2460*a97c2a1fSXin Li                 {
2461*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2462*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED;
2463*a97c2a1fSXin Li                     return(IV_FAIL);
2464*a97c2a1fSXin Li                 }
2465*a97c2a1fSXin Li 
2466*a97c2a1fSXin Li                 if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht > MAX_HEIGHT)
2467*a97c2a1fSXin Li                 {
2468*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2469*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED;
2470*a97c2a1fSXin Li                     return(IV_FAIL);
2471*a97c2a1fSXin Li                 }
2472*a97c2a1fSXin Li 
2473*a97c2a1fSXin Li                 if(NULL == ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location)
2474*a97c2a1fSXin Li                 {
2475*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2476*a97c2a1fSXin Li                     ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT;
2477*a97c2a1fSXin Li                     return(IV_FAIL);
2478*a97c2a1fSXin Li                 }
2479*a97c2a1fSXin Li 
2480*a97c2a1fSXin Li                 /* check memrecords sizes are correct */
2481*a97c2a1fSXin Li                 ps_mem_rec  = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location;
2482*a97c2a1fSXin Li                 for(i=0;i<NUM_MEM_RECORDS;i++)
2483*a97c2a1fSXin Li                 {
2484*a97c2a1fSXin Li                     if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t))
2485*a97c2a1fSXin Li                     {
2486*a97c2a1fSXin Li                         ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2487*a97c2a1fSXin Li                         ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT;
2488*a97c2a1fSXin Li                         return IV_FAIL;
2489*a97c2a1fSXin Li                     }
2490*a97c2a1fSXin Li                 }
2491*a97c2a1fSXin Li             }
2492*a97c2a1fSXin Li             break;
2493*a97c2a1fSXin Li 
2494*a97c2a1fSXin Li         case IV_CMD_INIT:
2495*a97c2a1fSXin Li             {
2496*a97c2a1fSXin Li                 impeg2d_init_ip_t *ps_ip = (impeg2d_init_ip_t *)pv_api_ip;
2497*a97c2a1fSXin Li                 impeg2d_init_op_t *ps_op = (impeg2d_init_op_t *)pv_api_op;
2498*a97c2a1fSXin Li                 iv_mem_rec_t          *ps_mem_rec;
2499*a97c2a1fSXin Li                 UWORD32 u4_tot_num_mem_recs;
2500*a97c2a1fSXin Li 
2501*a97c2a1fSXin Li                 ps_op->s_ivd_init_op_t.u4_error_code = 0;
2502*a97c2a1fSXin Li 
2503*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_size != sizeof(impeg2d_init_ip_t))
2504*a97c2a1fSXin Li                 {
2505*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2506*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2507*a97c2a1fSXin Li                     return(IV_FAIL);
2508*a97c2a1fSXin Li                 }
2509*a97c2a1fSXin Li 
2510*a97c2a1fSXin Li                 if(ps_op->s_ivd_init_op_t.u4_size != sizeof(impeg2d_init_op_t))
2511*a97c2a1fSXin Li                 {
2512*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2513*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2514*a97c2a1fSXin Li                     return(IV_FAIL);
2515*a97c2a1fSXin Li                 }
2516*a97c2a1fSXin Li 
2517*a97c2a1fSXin Li                 u4_tot_num_mem_recs = NUM_MEM_RECORDS;
2518*a97c2a1fSXin Li 
2519*a97c2a1fSXin Li 
2520*a97c2a1fSXin Li 
2521*a97c2a1fSXin Li 
2522*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec > u4_tot_num_mem_recs)
2523*a97c2a1fSXin Li                 {
2524*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2525*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_NOT_SUFFICIENT;
2526*a97c2a1fSXin Li                     return(IV_FAIL);
2527*a97c2a1fSXin Li                 }
2528*a97c2a1fSXin Li 
2529*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd < MIN_WIDTH)
2530*a97c2a1fSXin Li                 {
2531*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2532*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED;
2533*a97c2a1fSXin Li                     return(IV_FAIL);
2534*a97c2a1fSXin Li                 }
2535*a97c2a1fSXin Li 
2536*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd > MAX_WIDTH)
2537*a97c2a1fSXin Li                 {
2538*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2539*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED;
2540*a97c2a1fSXin Li                     return(IV_FAIL);
2541*a97c2a1fSXin Li                 }
2542*a97c2a1fSXin Li 
2543*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht < MIN_HEIGHT)
2544*a97c2a1fSXin Li                 {
2545*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2546*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED;
2547*a97c2a1fSXin Li                     return(IV_FAIL);
2548*a97c2a1fSXin Li                 }
2549*a97c2a1fSXin Li 
2550*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht > MAX_HEIGHT)
2551*a97c2a1fSXin Li                 {
2552*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2553*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED;
2554*a97c2a1fSXin Li                     return(IV_FAIL);
2555*a97c2a1fSXin Li                 }
2556*a97c2a1fSXin Li 
2557*a97c2a1fSXin Li                 if(NULL == ps_ip->s_ivd_init_ip_t.pv_mem_rec_location)
2558*a97c2a1fSXin Li                 {
2559*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2560*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT;
2561*a97c2a1fSXin Li                     return(IV_FAIL);
2562*a97c2a1fSXin Li                 }
2563*a97c2a1fSXin Li 
2564*a97c2a1fSXin Li                 if((ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420P) &&
2565*a97c2a1fSXin Li                     (ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_422ILE)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_UV)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_VU))
2566*a97c2a1fSXin Li                 {
2567*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
2568*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
2569*a97c2a1fSXin Li                     return(IV_FAIL);
2570*a97c2a1fSXin Li                 }
2571*a97c2a1fSXin Li 
2572*a97c2a1fSXin Li                 /* verify number of mem records */
2573*a97c2a1fSXin Li                 if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec < NUM_MEM_RECORDS)
2574*a97c2a1fSXin Li                 {
2575*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2576*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_NOT_SUFFICIENT;
2577*a97c2a1fSXin Li                     return IV_FAIL;
2578*a97c2a1fSXin Li                 }
2579*a97c2a1fSXin Li 
2580*a97c2a1fSXin Li                 ps_mem_rec  = ps_ip->s_ivd_init_ip_t.pv_mem_rec_location;
2581*a97c2a1fSXin Li                 /* verify wether first memrecord is handle or not */
2582*a97c2a1fSXin Li                 /*
2583*a97c2a1fSXin Li                 if(ps_mem_rec->pv_base != ps_handle)
2584*a97c2a1fSXin Li                 {
2585*a97c2a1fSXin Li                      // indicate the incorrect handle error
2586*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2587*a97c2a1fSXin Li                     ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INVALID_HANDLE;
2588*a97c2a1fSXin Li                     return IV_FAIL;
2589*a97c2a1fSXin Li                 }
2590*a97c2a1fSXin Li */
2591*a97c2a1fSXin Li                 /* check memrecords sizes are correct */
2592*a97c2a1fSXin Li                 for(i=0;i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec ; i++)
2593*a97c2a1fSXin Li                 {
2594*a97c2a1fSXin Li                     if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t))
2595*a97c2a1fSXin Li                     {
2596*a97c2a1fSXin Li                         ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2597*a97c2a1fSXin Li                         ps_op->s_ivd_init_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT;
2598*a97c2a1fSXin Li                         return IV_FAIL;
2599*a97c2a1fSXin Li                     }
2600*a97c2a1fSXin Li                 }
2601*a97c2a1fSXin Li 
2602*a97c2a1fSXin Li                 /* verify memtabs for overlapping regions */
2603*a97c2a1fSXin Li                 {
2604*a97c2a1fSXin Li                     UWORD8 *pau1_start[NUM_MEM_RECORDS];
2605*a97c2a1fSXin Li                     UWORD8 *pau1_end[NUM_MEM_RECORDS];
2606*a97c2a1fSXin Li 
2607*a97c2a1fSXin Li 
2608*a97c2a1fSXin Li                     pau1_start[0] = (UWORD8 *)(ps_mem_rec[0].pv_base);
2609*a97c2a1fSXin Li                     pau1_end[0]   = (UWORD8 *)(ps_mem_rec[0].pv_base) + ps_mem_rec[0].u4_mem_size - 1;
2610*a97c2a1fSXin Li                     for(i = 1; i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++)
2611*a97c2a1fSXin Li                     {
2612*a97c2a1fSXin Li                         /* This array is populated to check memtab overlapp */
2613*a97c2a1fSXin Li                         pau1_start[i] = (UWORD8 *)(ps_mem_rec[i].pv_base);
2614*a97c2a1fSXin Li                         pau1_end[i]   = (UWORD8 *)(ps_mem_rec[i].pv_base) + ps_mem_rec[i].u4_mem_size - 1;
2615*a97c2a1fSXin Li 
2616*a97c2a1fSXin Li                         for(j = 0; j < i; j++)
2617*a97c2a1fSXin Li                         {
2618*a97c2a1fSXin Li                             if((pau1_start[i] >= pau1_start[j]) && (pau1_start[i] <= pau1_end[j]))
2619*a97c2a1fSXin Li                             {
2620*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2621*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR;
2622*a97c2a1fSXin Li                                 return IV_FAIL;
2623*a97c2a1fSXin Li                             }
2624*a97c2a1fSXin Li 
2625*a97c2a1fSXin Li                             if((pau1_end[i] >= pau1_start[j]) && (pau1_end[i] <= pau1_end[j]))
2626*a97c2a1fSXin Li                             {
2627*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2628*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR;
2629*a97c2a1fSXin Li                                 return IV_FAIL;
2630*a97c2a1fSXin Li                             }
2631*a97c2a1fSXin Li 
2632*a97c2a1fSXin Li                             if((pau1_start[i] < pau1_start[j]) && (pau1_end[i] > pau1_end[j]))
2633*a97c2a1fSXin Li                             {
2634*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2635*a97c2a1fSXin Li                                 ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR;
2636*a97c2a1fSXin Li                                 return IV_FAIL;
2637*a97c2a1fSXin Li                             }
2638*a97c2a1fSXin Li                         }
2639*a97c2a1fSXin Li                     }
2640*a97c2a1fSXin Li                 }
2641*a97c2a1fSXin Li 
2642*a97c2a1fSXin Li 
2643*a97c2a1fSXin Li 
2644*a97c2a1fSXin Li 
2645*a97c2a1fSXin Li                 {
2646*a97c2a1fSXin Li                     iv_mem_rec_t    as_mem_rec_ittiam_api[NUM_MEM_RECORDS];
2647*a97c2a1fSXin Li 
2648*a97c2a1fSXin Li                     impeg2d_fill_mem_rec_ip_t s_fill_mem_rec_ip;
2649*a97c2a1fSXin Li                     impeg2d_fill_mem_rec_op_t s_fill_mem_rec_op;
2650*a97c2a1fSXin Li                     IV_API_CALL_STATUS_T e_status;
2651*a97c2a1fSXin Li                     WORD32 i4_num_memrec;
2652*a97c2a1fSXin Li                     {
2653*a97c2a1fSXin Li 
2654*a97c2a1fSXin Li                         iv_num_mem_rec_ip_t s_no_of_mem_rec_query_ip;
2655*a97c2a1fSXin Li                         iv_num_mem_rec_op_t s_no_of_mem_rec_query_op;
2656*a97c2a1fSXin Li 
2657*a97c2a1fSXin Li 
2658*a97c2a1fSXin Li                         s_no_of_mem_rec_query_ip.u4_size = sizeof(iv_num_mem_rec_ip_t);
2659*a97c2a1fSXin Li                         s_no_of_mem_rec_query_op.u4_size = sizeof(iv_num_mem_rec_op_t);
2660*a97c2a1fSXin Li 
2661*a97c2a1fSXin Li                         s_no_of_mem_rec_query_ip.e_cmd   = IV_CMD_GET_NUM_MEM_REC;
2662*a97c2a1fSXin Li                         impeg2d_api_function(NULL,
2663*a97c2a1fSXin Li                                                     (void *)&s_no_of_mem_rec_query_ip,
2664*a97c2a1fSXin Li                                                     (void *)&s_no_of_mem_rec_query_op);
2665*a97c2a1fSXin Li 
2666*a97c2a1fSXin Li                         i4_num_memrec  = s_no_of_mem_rec_query_op.u4_num_mem_rec;
2667*a97c2a1fSXin Li 
2668*a97c2a1fSXin Li 
2669*a97c2a1fSXin Li 
2670*a97c2a1fSXin Li                     }
2671*a97c2a1fSXin Li 
2672*a97c2a1fSXin Li 
2673*a97c2a1fSXin Li                     /* initialize mem records array with sizes */
2674*a97c2a1fSXin Li                     for(i = 0; i < i4_num_memrec; i++)
2675*a97c2a1fSXin Li                     {
2676*a97c2a1fSXin Li                         as_mem_rec_ittiam_api[i].u4_size = sizeof(iv_mem_rec_t);
2677*a97c2a1fSXin Li                     }
2678*a97c2a1fSXin Li 
2679*a97c2a1fSXin Li                     s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_size                   = sizeof(impeg2d_fill_mem_rec_ip_t);
2680*a97c2a1fSXin Li                     s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.e_cmd                     = IV_CMD_FILL_NUM_MEM_REC;
2681*a97c2a1fSXin Li                     s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd             = ps_ip->s_ivd_init_ip_t.u4_frm_max_wd;
2682*a97c2a1fSXin Li                     s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht             = ps_ip->s_ivd_init_ip_t.u4_frm_max_ht;
2683*a97c2a1fSXin Li                     s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location       = as_mem_rec_ittiam_api;
2684*a97c2a1fSXin Li                     s_fill_mem_rec_ip.u4_share_disp_buf                                 = ps_ip->u4_share_disp_buf;
2685*a97c2a1fSXin Li                     s_fill_mem_rec_ip.e_output_format                                   = ps_ip->s_ivd_init_ip_t.e_output_format;
2686*a97c2a1fSXin Li                     s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_size                   = sizeof(impeg2d_fill_mem_rec_op_t);
2687*a97c2a1fSXin Li 
2688*a97c2a1fSXin Li 
2689*a97c2a1fSXin Li                     e_status = impeg2d_api_function(NULL,
2690*a97c2a1fSXin Li                                                 (void *)&s_fill_mem_rec_ip,
2691*a97c2a1fSXin Li                                                 (void *)&s_fill_mem_rec_op);
2692*a97c2a1fSXin Li                     if(IV_FAIL == e_status)
2693*a97c2a1fSXin Li                     {
2694*a97c2a1fSXin Li                         ps_op->s_ivd_init_op_t.u4_error_code = s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_error_code;
2695*a97c2a1fSXin Li                         return(IV_FAIL);
2696*a97c2a1fSXin Li                     }
2697*a97c2a1fSXin Li 
2698*a97c2a1fSXin Li 
2699*a97c2a1fSXin Li 
2700*a97c2a1fSXin Li                     for(i = 0; i < i4_num_memrec; i ++)
2701*a97c2a1fSXin Li                     {
2702*a97c2a1fSXin Li                         if(ps_mem_rec[i].pv_base == NULL)
2703*a97c2a1fSXin Li                         {
2704*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2705*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_BASE_NULL;
2706*a97c2a1fSXin Li                             return IV_FAIL;
2707*a97c2a1fSXin Li                         }
2708*a97c2a1fSXin Li #ifdef CHECK_ALIGN
2709*a97c2a1fSXin Li 
2710*a97c2a1fSXin Li                         if((UWORD32)(ps_mem_rec[i].pv_base) & (ps_mem_rec[i].u4_mem_alignment - 1))
2711*a97c2a1fSXin Li                         {
2712*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2713*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR;
2714*a97c2a1fSXin Li                             return IV_FAIL;
2715*a97c2a1fSXin Li                         }
2716*a97c2a1fSXin Li #endif //CHECK_ALIGN
2717*a97c2a1fSXin Li                         if(ps_mem_rec[i].u4_mem_alignment != as_mem_rec_ittiam_api[i].u4_mem_alignment)
2718*a97c2a1fSXin Li                         {
2719*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2720*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR;
2721*a97c2a1fSXin Li                             return IV_FAIL;
2722*a97c2a1fSXin Li                         }
2723*a97c2a1fSXin Li 
2724*a97c2a1fSXin Li                         if(ps_mem_rec[i].u4_mem_size < as_mem_rec_ittiam_api[i].u4_mem_size)
2725*a97c2a1fSXin Li                         {
2726*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2727*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INSUFFICIENT_SIZE;
2728*a97c2a1fSXin Li                             return IV_FAIL;
2729*a97c2a1fSXin Li                         }
2730*a97c2a1fSXin Li 
2731*a97c2a1fSXin Li                         if(ps_mem_rec[i].e_mem_type != as_mem_rec_ittiam_api[i].e_mem_type)
2732*a97c2a1fSXin Li                         {
2733*a97c2a1fSXin Li                             if (IV_EXTERNAL_CACHEABLE_SCRATCH_MEM == as_mem_rec_ittiam_api[i].e_mem_type)
2734*a97c2a1fSXin Li                             {
2735*a97c2a1fSXin Li                                 if (IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM == ps_mem_rec[i].e_mem_type)
2736*a97c2a1fSXin Li                                 {
2737*a97c2a1fSXin Li                                     continue;
2738*a97c2a1fSXin Li                                 }
2739*a97c2a1fSXin Li                             }
2740*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2741*a97c2a1fSXin Li                             ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INCORRECT_TYPE;
2742*a97c2a1fSXin Li                             return IV_FAIL;
2743*a97c2a1fSXin Li                         }
2744*a97c2a1fSXin Li                     }
2745*a97c2a1fSXin Li                 }
2746*a97c2a1fSXin Li 
2747*a97c2a1fSXin Li 
2748*a97c2a1fSXin Li             }
2749*a97c2a1fSXin Li             break;
2750*a97c2a1fSXin Li 
2751*a97c2a1fSXin Li         case IVD_CMD_GET_DISPLAY_FRAME:
2752*a97c2a1fSXin Li             {
2753*a97c2a1fSXin Li                 impeg2d_get_display_frame_ip_t *ps_ip = (impeg2d_get_display_frame_ip_t *)pv_api_ip;
2754*a97c2a1fSXin Li                 impeg2d_get_display_frame_op_t *ps_op = (impeg2d_get_display_frame_op_t *)pv_api_op;
2755*a97c2a1fSXin Li 
2756*a97c2a1fSXin Li                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
2757*a97c2a1fSXin Li 
2758*a97c2a1fSXin Li                 if(ps_ip->s_ivd_get_display_frame_ip_t.u4_size != sizeof(impeg2d_get_display_frame_ip_t))
2759*a97c2a1fSXin Li                 {
2760*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2761*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2762*a97c2a1fSXin Li                     return(IV_FAIL);
2763*a97c2a1fSXin Li                 }
2764*a97c2a1fSXin Li 
2765*a97c2a1fSXin Li                 if(ps_op->s_ivd_get_display_frame_op_t.u4_size != sizeof(impeg2d_get_display_frame_op_t))
2766*a97c2a1fSXin Li                 {
2767*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2768*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2769*a97c2a1fSXin Li                     return(IV_FAIL);
2770*a97c2a1fSXin Li                 }
2771*a97c2a1fSXin Li 
2772*a97c2a1fSXin Li                 if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs == 0)
2773*a97c2a1fSXin Li                 {
2774*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2775*a97c2a1fSXin Li                     ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS;
2776*a97c2a1fSXin Li                     return IV_FAIL;
2777*a97c2a1fSXin Li                 }
2778*a97c2a1fSXin Li 
2779*a97c2a1fSXin Li                 for(i = 0; i< (WORD32)ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs;i++)
2780*a97c2a1fSXin Li                 {
2781*a97c2a1fSXin Li                     if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.pu1_bufs[i] == NULL)
2782*a97c2a1fSXin Li                     {
2783*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2784*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL;
2785*a97c2a1fSXin Li                         return IV_FAIL;
2786*a97c2a1fSXin Li                     }
2787*a97c2a1fSXin Li 
2788*a97c2a1fSXin Li                     if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0)
2789*a97c2a1fSXin Li                     {
2790*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2791*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
2792*a97c2a1fSXin Li                         return IV_FAIL;
2793*a97c2a1fSXin Li                     }
2794*a97c2a1fSXin Li                     /*
2795*a97c2a1fSXin Li                     if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0)
2796*a97c2a1fSXin Li                     {
2797*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2798*a97c2a1fSXin Li                         ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
2799*a97c2a1fSXin Li                         return IV_FAIL;
2800*a97c2a1fSXin Li                     }
2801*a97c2a1fSXin Li                     */
2802*a97c2a1fSXin Li                 }
2803*a97c2a1fSXin Li             }
2804*a97c2a1fSXin Li             break;
2805*a97c2a1fSXin Li        case IVD_CMD_REL_DISPLAY_FRAME:
2806*a97c2a1fSXin Li             {
2807*a97c2a1fSXin Li                 impeg2d_rel_display_frame_ip_t *ps_ip = (impeg2d_rel_display_frame_ip_t *)pv_api_ip;
2808*a97c2a1fSXin Li                 impeg2d_rel_display_frame_op_t *ps_op = (impeg2d_rel_display_frame_op_t *)pv_api_op;
2809*a97c2a1fSXin Li 
2810*a97c2a1fSXin Li                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
2811*a97c2a1fSXin Li 
2812*a97c2a1fSXin Li                 if ((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(impeg2d_rel_display_frame_ip_t))
2813*a97c2a1fSXin Li                         && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(ivd_rel_display_frame_ip_t)))
2814*a97c2a1fSXin Li                 {
2815*a97c2a1fSXin Li                     ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2816*a97c2a1fSXin Li                     ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2817*a97c2a1fSXin Li                     return(IV_FAIL);
2818*a97c2a1fSXin Li                 }
2819*a97c2a1fSXin Li 
2820*a97c2a1fSXin Li                 if((ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(impeg2d_rel_display_frame_op_t)) &&
2821*a97c2a1fSXin Li                         (ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(ivd_rel_display_frame_op_t)))
2822*a97c2a1fSXin Li                 {
2823*a97c2a1fSXin Li                     ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2824*a97c2a1fSXin Li                     ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2825*a97c2a1fSXin Li                     return(IV_FAIL);
2826*a97c2a1fSXin Li                 }
2827*a97c2a1fSXin Li 
2828*a97c2a1fSXin Li             }
2829*a97c2a1fSXin Li             break;
2830*a97c2a1fSXin Li 
2831*a97c2a1fSXin Li 
2832*a97c2a1fSXin Li         case IVD_CMD_SET_DISPLAY_FRAME:
2833*a97c2a1fSXin Li             {
2834*a97c2a1fSXin Li                 impeg2d_set_display_frame_ip_t *ps_ip = (impeg2d_set_display_frame_ip_t *)pv_api_ip;
2835*a97c2a1fSXin Li                 impeg2d_set_display_frame_op_t *ps_op = (impeg2d_set_display_frame_op_t *)pv_api_op;
2836*a97c2a1fSXin Li                 UWORD32 j, i;
2837*a97c2a1fSXin Li 
2838*a97c2a1fSXin Li                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
2839*a97c2a1fSXin Li 
2840*a97c2a1fSXin Li                 if ((ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(impeg2d_set_display_frame_ip_t))
2841*a97c2a1fSXin Li                         && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(ivd_set_display_frame_ip_t)))
2842*a97c2a1fSXin Li                 {
2843*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2844*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2845*a97c2a1fSXin Li                     return(IV_FAIL);
2846*a97c2a1fSXin Li                 }
2847*a97c2a1fSXin Li 
2848*a97c2a1fSXin Li                 if((ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(impeg2d_set_display_frame_op_t)) &&
2849*a97c2a1fSXin Li                         (ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(ivd_set_display_frame_op_t)))
2850*a97c2a1fSXin Li                 {
2851*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2852*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2853*a97c2a1fSXin Li                     return(IV_FAIL);
2854*a97c2a1fSXin Li                 }
2855*a97c2a1fSXin Li 
2856*a97c2a1fSXin Li                 if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
2857*a97c2a1fSXin Li                 {
2858*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2859*a97c2a1fSXin Li                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS;
2860*a97c2a1fSXin Li                     return IV_FAIL;
2861*a97c2a1fSXin Li                 }
2862*a97c2a1fSXin Li 
2863*a97c2a1fSXin Li                 for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs; j++)
2864*a97c2a1fSXin Li                 {
2865*a97c2a1fSXin Li                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs == 0)
2866*a97c2a1fSXin Li                     {
2867*a97c2a1fSXin Li                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2868*a97c2a1fSXin Li                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS;
2869*a97c2a1fSXin Li                         return IV_FAIL;
2870*a97c2a1fSXin Li                     }
2871*a97c2a1fSXin Li 
2872*a97c2a1fSXin Li                     for(i=0;i< ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;i++)
2873*a97c2a1fSXin Li                     {
2874*a97c2a1fSXin Li                         if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i] == NULL)
2875*a97c2a1fSXin Li                         {
2876*a97c2a1fSXin Li                             ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2877*a97c2a1fSXin Li                             ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL;
2878*a97c2a1fSXin Li                             return IV_FAIL;
2879*a97c2a1fSXin Li                         }
2880*a97c2a1fSXin Li 
2881*a97c2a1fSXin Li                         if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i] == 0)
2882*a97c2a1fSXin Li                         {
2883*a97c2a1fSXin Li                             ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2884*a97c2a1fSXin Li                             ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
2885*a97c2a1fSXin Li                             return IV_FAIL;
2886*a97c2a1fSXin Li                         }
2887*a97c2a1fSXin Li                     }
2888*a97c2a1fSXin Li                 }
2889*a97c2a1fSXin Li             }
2890*a97c2a1fSXin Li             break;
2891*a97c2a1fSXin Li 
2892*a97c2a1fSXin Li         case IVD_CMD_VIDEO_DECODE:
2893*a97c2a1fSXin Li             {
2894*a97c2a1fSXin Li                 impeg2d_video_decode_ip_t *ps_ip = (impeg2d_video_decode_ip_t *)pv_api_ip;
2895*a97c2a1fSXin Li                 impeg2d_video_decode_op_t *ps_op = (impeg2d_video_decode_op_t *)pv_api_op;
2896*a97c2a1fSXin Li 
2897*a97c2a1fSXin Li                 ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
2898*a97c2a1fSXin Li 
2899*a97c2a1fSXin Li                 if(ps_ip->s_ivd_video_decode_ip_t.u4_size != sizeof(impeg2d_video_decode_ip_t))
2900*a97c2a1fSXin Li                 {
2901*a97c2a1fSXin Li                     ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2902*a97c2a1fSXin Li                     ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2903*a97c2a1fSXin Li                     return(IV_FAIL);
2904*a97c2a1fSXin Li                 }
2905*a97c2a1fSXin Li 
2906*a97c2a1fSXin Li                 if(ps_op->s_ivd_video_decode_op_t.u4_size != sizeof(impeg2d_video_decode_op_t))
2907*a97c2a1fSXin Li                 {
2908*a97c2a1fSXin Li                     ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2909*a97c2a1fSXin Li                     ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2910*a97c2a1fSXin Li                     return(IV_FAIL);
2911*a97c2a1fSXin Li                 }
2912*a97c2a1fSXin Li 
2913*a97c2a1fSXin Li             }
2914*a97c2a1fSXin Li             break;
2915*a97c2a1fSXin Li 
2916*a97c2a1fSXin Li         case IV_CMD_RETRIEVE_MEMREC:
2917*a97c2a1fSXin Li             {
2918*a97c2a1fSXin Li                 impeg2d_retrieve_mem_rec_ip_t *ps_ip = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip;
2919*a97c2a1fSXin Li                 impeg2d_retrieve_mem_rec_op_t *ps_op = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op;
2920*a97c2a1fSXin Li                 iv_mem_rec_t          *ps_mem_rec;
2921*a97c2a1fSXin Li 
2922*a97c2a1fSXin Li                 ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code = 0;
2923*a97c2a1fSXin Li 
2924*a97c2a1fSXin Li                 if(ps_ip->s_ivd_retrieve_mem_rec_ip_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_ip_t))
2925*a97c2a1fSXin Li                 {
2926*a97c2a1fSXin Li                     ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2927*a97c2a1fSXin Li                     ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2928*a97c2a1fSXin Li                     return(IV_FAIL);
2929*a97c2a1fSXin Li                 }
2930*a97c2a1fSXin Li 
2931*a97c2a1fSXin Li                 if(ps_op->s_ivd_retrieve_mem_rec_op_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_op_t))
2932*a97c2a1fSXin Li                 {
2933*a97c2a1fSXin Li                     ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2934*a97c2a1fSXin Li                     ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2935*a97c2a1fSXin Li                     return(IV_FAIL);
2936*a97c2a1fSXin Li                 }
2937*a97c2a1fSXin Li 
2938*a97c2a1fSXin Li                 ps_mem_rec  = ps_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location;
2939*a97c2a1fSXin Li                 /* check memrecords sizes are correct */
2940*a97c2a1fSXin Li                 for(i=0;i < NUM_MEM_RECORDS ; i++)
2941*a97c2a1fSXin Li                 {
2942*a97c2a1fSXin Li                     if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t))
2943*a97c2a1fSXin Li                     {
2944*a97c2a1fSXin Li                         ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2945*a97c2a1fSXin Li                         ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT;
2946*a97c2a1fSXin Li                         return IV_FAIL;
2947*a97c2a1fSXin Li                     }
2948*a97c2a1fSXin Li                 }
2949*a97c2a1fSXin Li             }
2950*a97c2a1fSXin Li             break;
2951*a97c2a1fSXin Li 
2952*a97c2a1fSXin Li         case IVD_CMD_VIDEO_CTL:
2953*a97c2a1fSXin Li             {
2954*a97c2a1fSXin Li                 UWORD32 *pu4_ptr_cmd;
2955*a97c2a1fSXin Li                 UWORD32 u4_sub_command;
2956*a97c2a1fSXin Li 
2957*a97c2a1fSXin Li                 pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
2958*a97c2a1fSXin Li                 pu4_ptr_cmd += 2;
2959*a97c2a1fSXin Li                 u4_sub_command = *pu4_ptr_cmd;
2960*a97c2a1fSXin Li 
2961*a97c2a1fSXin Li                 switch(u4_sub_command)
2962*a97c2a1fSXin Li                 {
2963*a97c2a1fSXin Li                     case IVD_CMD_CTL_SETPARAMS:
2964*a97c2a1fSXin Li                         {
2965*a97c2a1fSXin Li                             impeg2d_ctl_set_config_ip_t *ps_ip;
2966*a97c2a1fSXin Li                             impeg2d_ctl_set_config_op_t *ps_op;
2967*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_set_config_ip_t *)pv_api_ip;
2968*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op;
2969*a97c2a1fSXin Li 
2970*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_set_config_op_t.u4_error_code = 0;
2971*a97c2a1fSXin Li 
2972*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size != sizeof(impeg2d_ctl_set_config_ip_t))
2973*a97c2a1fSXin Li                             {
2974*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2975*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
2976*a97c2a1fSXin Li                                 return IV_FAIL;
2977*a97c2a1fSXin Li                             }
2978*a97c2a1fSXin Li                         }
2979*a97c2a1fSXin Li                     case IVD_CMD_CTL_SETDEFAULT:
2980*a97c2a1fSXin Li                         {
2981*a97c2a1fSXin Li                             impeg2d_ctl_set_config_op_t *ps_op;
2982*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op;
2983*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_set_config_op_t.u4_error_code   = 0;
2984*a97c2a1fSXin Li 
2985*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_set_config_op_t.u4_size != sizeof(impeg2d_ctl_set_config_op_t))
2986*a97c2a1fSXin Li                             {
2987*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2988*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
2989*a97c2a1fSXin Li                                 return IV_FAIL;
2990*a97c2a1fSXin Li                             }
2991*a97c2a1fSXin Li                         }
2992*a97c2a1fSXin Li                         break;
2993*a97c2a1fSXin Li 
2994*a97c2a1fSXin Li                     case IVD_CMD_CTL_GETPARAMS:
2995*a97c2a1fSXin Li                         {
2996*a97c2a1fSXin Li                             impeg2d_ctl_getstatus_ip_t *ps_ip;
2997*a97c2a1fSXin Li                             impeg2d_ctl_getstatus_op_t *ps_op;
2998*a97c2a1fSXin Li 
2999*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip;
3000*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op;
3001*a97c2a1fSXin Li 
3002*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code   = 0;
3003*a97c2a1fSXin Li 
3004*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size != sizeof(impeg2d_ctl_getstatus_ip_t))
3005*a97c2a1fSXin Li                             {
3006*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3007*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
3008*a97c2a1fSXin Li                                 return IV_FAIL;
3009*a97c2a1fSXin Li                             }
3010*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_getstatus_op_t.u4_size != sizeof(impeg2d_ctl_getstatus_op_t))
3011*a97c2a1fSXin Li                             {
3012*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3013*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
3014*a97c2a1fSXin Li                                 return IV_FAIL;
3015*a97c2a1fSXin Li                             }
3016*a97c2a1fSXin Li                         }
3017*a97c2a1fSXin Li                         break;
3018*a97c2a1fSXin Li 
3019*a97c2a1fSXin Li                     case IVD_CMD_CTL_GETBUFINFO:
3020*a97c2a1fSXin Li                         {
3021*a97c2a1fSXin Li                             impeg2d_ctl_getbufinfo_ip_t *ps_ip;
3022*a97c2a1fSXin Li                             impeg2d_ctl_getbufinfo_op_t *ps_op;
3023*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip;
3024*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_getbufinfo_op_t *)pv_api_op;
3025*a97c2a1fSXin Li 
3026*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code  = 0;
3027*a97c2a1fSXin Li 
3028*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_ip_t))
3029*a97c2a1fSXin Li                             {
3030*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3031*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
3032*a97c2a1fSXin Li                                 return IV_FAIL;
3033*a97c2a1fSXin Li                             }
3034*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_op_t))
3035*a97c2a1fSXin Li                             {
3036*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3037*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
3038*a97c2a1fSXin Li                                 return IV_FAIL;
3039*a97c2a1fSXin Li                             }
3040*a97c2a1fSXin Li                         }
3041*a97c2a1fSXin Li                         break;
3042*a97c2a1fSXin Li 
3043*a97c2a1fSXin Li                     case IVD_CMD_CTL_GETVERSION:
3044*a97c2a1fSXin Li                         {
3045*a97c2a1fSXin Li                             impeg2d_ctl_getversioninfo_ip_t *ps_ip;
3046*a97c2a1fSXin Li                             impeg2d_ctl_getversioninfo_op_t *ps_op;
3047*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip;
3048*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op;
3049*a97c2a1fSXin Li 
3050*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code  = 0;
3051*a97c2a1fSXin Li 
3052*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_ip_t))
3053*a97c2a1fSXin Li                             {
3054*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3055*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
3056*a97c2a1fSXin Li                                 return IV_FAIL;
3057*a97c2a1fSXin Li                             }
3058*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_op_t))
3059*a97c2a1fSXin Li                             {
3060*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3061*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
3062*a97c2a1fSXin Li                                 return IV_FAIL;
3063*a97c2a1fSXin Li                             }
3064*a97c2a1fSXin Li                         }
3065*a97c2a1fSXin Li                         break;
3066*a97c2a1fSXin Li 
3067*a97c2a1fSXin Li                     case IVD_CMD_CTL_FLUSH:
3068*a97c2a1fSXin Li                         {
3069*a97c2a1fSXin Li                             impeg2d_ctl_flush_ip_t *ps_ip;
3070*a97c2a1fSXin Li                             impeg2d_ctl_flush_op_t *ps_op;
3071*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_flush_ip_t *)pv_api_ip;
3072*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_flush_op_t *)pv_api_op;
3073*a97c2a1fSXin Li 
3074*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_flush_op_t.u4_error_code = 0;
3075*a97c2a1fSXin Li 
3076*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size != sizeof(impeg2d_ctl_flush_ip_t))
3077*a97c2a1fSXin Li                             {
3078*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_flush_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3079*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
3080*a97c2a1fSXin Li                                 return IV_FAIL;
3081*a97c2a1fSXin Li                             }
3082*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_flush_op_t.u4_size != sizeof(impeg2d_ctl_flush_op_t))
3083*a97c2a1fSXin Li                             {
3084*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_flush_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3085*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
3086*a97c2a1fSXin Li                                 return IV_FAIL;
3087*a97c2a1fSXin Li                             }
3088*a97c2a1fSXin Li                         }
3089*a97c2a1fSXin Li                         break;
3090*a97c2a1fSXin Li 
3091*a97c2a1fSXin Li                     case IVD_CMD_CTL_RESET:
3092*a97c2a1fSXin Li                         {
3093*a97c2a1fSXin Li                             impeg2d_ctl_reset_ip_t *ps_ip;
3094*a97c2a1fSXin Li                             impeg2d_ctl_reset_op_t *ps_op;
3095*a97c2a1fSXin Li                             ps_ip = (impeg2d_ctl_reset_ip_t *)pv_api_ip;
3096*a97c2a1fSXin Li                             ps_op = (impeg2d_ctl_reset_op_t *)pv_api_op;
3097*a97c2a1fSXin Li 
3098*a97c2a1fSXin Li                             ps_op->s_ivd_ctl_reset_op_t.u4_error_code    = 0;
3099*a97c2a1fSXin Li 
3100*a97c2a1fSXin Li                             if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size != sizeof(impeg2d_ctl_reset_ip_t))
3101*a97c2a1fSXin Li                             {
3102*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_reset_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3103*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT;
3104*a97c2a1fSXin Li                                 return IV_FAIL;
3105*a97c2a1fSXin Li                             }
3106*a97c2a1fSXin Li                             if(ps_op->s_ivd_ctl_reset_op_t.u4_size != sizeof(impeg2d_ctl_reset_op_t))
3107*a97c2a1fSXin Li                             {
3108*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_reset_op_t.u4_error_code  |= 1 << IVD_UNSUPPORTEDPARAM;
3109*a97c2a1fSXin Li                                 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT;
3110*a97c2a1fSXin Li                                 return IV_FAIL;
3111*a97c2a1fSXin Li                             }
3112*a97c2a1fSXin Li                         }
3113*a97c2a1fSXin Li                         break;
3114*a97c2a1fSXin Li 
3115*a97c2a1fSXin Li                     case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS:
3116*a97c2a1fSXin Li                     {
3117*a97c2a1fSXin Li                         impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip;
3118*a97c2a1fSXin Li                         impeg2d_ctl_get_frame_dimensions_op_t *ps_op;
3119*a97c2a1fSXin Li 
3120*a97c2a1fSXin Li                         ps_ip =
3121*a97c2a1fSXin Li                                         (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3122*a97c2a1fSXin Li                         ps_op =
3123*a97c2a1fSXin Li                                         (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op;
3124*a97c2a1fSXin Li 
3125*a97c2a1fSXin Li                         if(ps_ip->u4_size
3126*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_get_frame_dimensions_ip_t))
3127*a97c2a1fSXin Li                         {
3128*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3129*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3130*a97c2a1fSXin Li                                             IVD_IP_API_STRUCT_SIZE_INCORRECT;
3131*a97c2a1fSXin Li                             return IV_FAIL;
3132*a97c2a1fSXin Li                         }
3133*a97c2a1fSXin Li 
3134*a97c2a1fSXin Li                         if(ps_op->u4_size
3135*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_get_frame_dimensions_op_t))
3136*a97c2a1fSXin Li                         {
3137*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3138*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3139*a97c2a1fSXin Li                                             IVD_OP_API_STRUCT_SIZE_INCORRECT;
3140*a97c2a1fSXin Li                             return IV_FAIL;
3141*a97c2a1fSXin Li                         }
3142*a97c2a1fSXin Li 
3143*a97c2a1fSXin Li                         break;
3144*a97c2a1fSXin Li                     }
3145*a97c2a1fSXin Li                     case IMPEG2D_CMD_CTL_GET_SEQ_INFO:
3146*a97c2a1fSXin Li                     {
3147*a97c2a1fSXin Li                         impeg2d_ctl_get_seq_info_ip_t *ps_ip;
3148*a97c2a1fSXin Li                         impeg2d_ctl_get_seq_info_op_t *ps_op;
3149*a97c2a1fSXin Li 
3150*a97c2a1fSXin Li                         ps_ip =
3151*a97c2a1fSXin Li                                         (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip;
3152*a97c2a1fSXin Li                         ps_op =
3153*a97c2a1fSXin Li                                         (impeg2d_ctl_get_seq_info_op_t *)pv_api_op;
3154*a97c2a1fSXin Li 
3155*a97c2a1fSXin Li                         if(ps_ip->u4_size
3156*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_get_seq_info_ip_t))
3157*a97c2a1fSXin Li                         {
3158*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3159*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3160*a97c2a1fSXin Li                                             IVD_IP_API_STRUCT_SIZE_INCORRECT;
3161*a97c2a1fSXin Li                             return IV_FAIL;
3162*a97c2a1fSXin Li                         }
3163*a97c2a1fSXin Li 
3164*a97c2a1fSXin Li                         if(ps_op->u4_size
3165*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_get_seq_info_op_t))
3166*a97c2a1fSXin Li                         {
3167*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3168*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3169*a97c2a1fSXin Li                                             IVD_OP_API_STRUCT_SIZE_INCORRECT;
3170*a97c2a1fSXin Li                             return IV_FAIL;
3171*a97c2a1fSXin Li                         }
3172*a97c2a1fSXin Li 
3173*a97c2a1fSXin Li                         break;
3174*a97c2a1fSXin Li                     }
3175*a97c2a1fSXin Li                     case IMPEG2D_CMD_CTL_SET_NUM_CORES:
3176*a97c2a1fSXin Li                     {
3177*a97c2a1fSXin Li                         impeg2d_ctl_set_num_cores_ip_t *ps_ip;
3178*a97c2a1fSXin Li                         impeg2d_ctl_set_num_cores_op_t *ps_op;
3179*a97c2a1fSXin Li 
3180*a97c2a1fSXin Li                         ps_ip = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip;
3181*a97c2a1fSXin Li                         ps_op = (impeg2d_ctl_set_num_cores_op_t *)pv_api_op;
3182*a97c2a1fSXin Li 
3183*a97c2a1fSXin Li                         if(ps_ip->u4_size
3184*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_set_num_cores_ip_t))
3185*a97c2a1fSXin Li                         {
3186*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3187*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3188*a97c2a1fSXin Li                                             IVD_IP_API_STRUCT_SIZE_INCORRECT;
3189*a97c2a1fSXin Li                             return IV_FAIL;
3190*a97c2a1fSXin Li                         }
3191*a97c2a1fSXin Li 
3192*a97c2a1fSXin Li                         if(ps_op->u4_size
3193*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_set_num_cores_op_t))
3194*a97c2a1fSXin Li                         {
3195*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3196*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3197*a97c2a1fSXin Li                                             IVD_OP_API_STRUCT_SIZE_INCORRECT;
3198*a97c2a1fSXin Li                             return IV_FAIL;
3199*a97c2a1fSXin Li                         }
3200*a97c2a1fSXin Li 
3201*a97c2a1fSXin Li #ifdef MULTICORE
3202*a97c2a1fSXin Li                         if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_THREADS))
3203*a97c2a1fSXin Li #else
3204*a97c2a1fSXin Li                         if(ps_ip->u4_num_cores != 1)
3205*a97c2a1fSXin Li #endif
3206*a97c2a1fSXin Li                         {
3207*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3208*a97c2a1fSXin Li                             return IV_FAIL;
3209*a97c2a1fSXin Li                         }
3210*a97c2a1fSXin Li                         break;
3211*a97c2a1fSXin Li                     }
3212*a97c2a1fSXin Li                     case IMPEG2D_CMD_CTL_SET_PROCESSOR:
3213*a97c2a1fSXin Li                     {
3214*a97c2a1fSXin Li                         impeg2d_ctl_set_processor_ip_t *ps_ip;
3215*a97c2a1fSXin Li                         impeg2d_ctl_set_processor_op_t *ps_op;
3216*a97c2a1fSXin Li 
3217*a97c2a1fSXin Li                         ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip;
3218*a97c2a1fSXin Li                         ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op;
3219*a97c2a1fSXin Li 
3220*a97c2a1fSXin Li                         if(ps_ip->u4_size
3221*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_set_processor_ip_t))
3222*a97c2a1fSXin Li                         {
3223*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3224*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3225*a97c2a1fSXin Li                                             IVD_IP_API_STRUCT_SIZE_INCORRECT;
3226*a97c2a1fSXin Li                             return IV_FAIL;
3227*a97c2a1fSXin Li                         }
3228*a97c2a1fSXin Li 
3229*a97c2a1fSXin Li                         if(ps_op->u4_size
3230*a97c2a1fSXin Li                                         != sizeof(impeg2d_ctl_set_processor_op_t))
3231*a97c2a1fSXin Li                         {
3232*a97c2a1fSXin Li                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3233*a97c2a1fSXin Li                             ps_op->u4_error_code |=
3234*a97c2a1fSXin Li                                             IVD_OP_API_STRUCT_SIZE_INCORRECT;
3235*a97c2a1fSXin Li                             return IV_FAIL;
3236*a97c2a1fSXin Li                         }
3237*a97c2a1fSXin Li 
3238*a97c2a1fSXin Li                         break;
3239*a97c2a1fSXin Li                     }
3240*a97c2a1fSXin Li                     default:
3241*a97c2a1fSXin Li                         break;
3242*a97c2a1fSXin Li 
3243*a97c2a1fSXin Li                 }
3244*a97c2a1fSXin Li             }
3245*a97c2a1fSXin Li             break;
3246*a97c2a1fSXin Li 
3247*a97c2a1fSXin Li         default:
3248*a97c2a1fSXin Li             {            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
3249*a97c2a1fSXin Li                          *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
3250*a97c2a1fSXin Li                          return IV_FAIL;
3251*a97c2a1fSXin Li             }
3252*a97c2a1fSXin Li 
3253*a97c2a1fSXin Li 
3254*a97c2a1fSXin Li     }
3255*a97c2a1fSXin Li 
3256*a97c2a1fSXin Li     return IV_SUCCESS;
3257*a97c2a1fSXin Li }
3258*a97c2a1fSXin Li 
3259*a97c2a1fSXin Li /*****************************************************************************/
3260*a97c2a1fSXin Li /*                                                                           */
3261*a97c2a1fSXin Li /*  Function Name :   impeg2d_api_entity                                     */
3262*a97c2a1fSXin Li /*                                                                           */
3263*a97c2a1fSXin Li /*  Description   :                                                          */
3264*a97c2a1fSXin Li /*                                                                           */
3265*a97c2a1fSXin Li /*  Inputs        :                                                          */
3266*a97c2a1fSXin Li /*  Globals       : <Does it use any global variables?>                      */
3267*a97c2a1fSXin Li /*  Outputs       :                                                          */
3268*a97c2a1fSXin Li /*  Returns       : void                                                     */
3269*a97c2a1fSXin Li /*                                                                           */
3270*a97c2a1fSXin Li /*  Issues        : none                                                     */
3271*a97c2a1fSXin Li /*                                                                           */
3272*a97c2a1fSXin Li /*  Revision History:                                                        */
3273*a97c2a1fSXin Li /*                                                                           */
3274*a97c2a1fSXin Li /*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
3275*a97c2a1fSXin Li /*         22 10 2008    100356         Draft                                */
3276*a97c2a1fSXin Li /*                                                                           */
3277*a97c2a1fSXin Li /*****************************************************************************/
3278*a97c2a1fSXin Li 
3279*a97c2a1fSXin Li 
impeg2d_api_entity(iv_obj_t * ps_dechdl,void * pv_api_ip,void * pv_api_op)3280*a97c2a1fSXin Li IV_API_CALL_STATUS_T impeg2d_api_entity(iv_obj_t *ps_dechdl,
3281*a97c2a1fSXin Li                                         void *pv_api_ip,
3282*a97c2a1fSXin Li                                         void *pv_api_op)
3283*a97c2a1fSXin Li {
3284*a97c2a1fSXin Li     iv_obj_t *ps_dec_handle;
3285*a97c2a1fSXin Li     dec_state_t *ps_dec_state;
3286*a97c2a1fSXin Li     dec_state_multi_core_t *ps_dec_state_multi_core;
3287*a97c2a1fSXin Li 
3288*a97c2a1fSXin Li     impeg2d_video_decode_ip_t    *ps_dec_ip;
3289*a97c2a1fSXin Li 
3290*a97c2a1fSXin Li     impeg2d_video_decode_op_t    *ps_dec_op;
3291*a97c2a1fSXin Li     WORD32 bytes_remaining;
3292*a97c2a1fSXin Li     pic_buf_t *ps_disp_pic;
3293*a97c2a1fSXin Li 
3294*a97c2a1fSXin Li 
3295*a97c2a1fSXin Li 
3296*a97c2a1fSXin Li     ps_dec_ip = (impeg2d_video_decode_ip_t    *)pv_api_ip;
3297*a97c2a1fSXin Li     ps_dec_op = (impeg2d_video_decode_op_t    *)pv_api_op;
3298*a97c2a1fSXin Li 
3299*a97c2a1fSXin Li     memset(ps_dec_op,0,sizeof(impeg2d_video_decode_op_t));
3300*a97c2a1fSXin Li 
3301*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t);
3302*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0;
3303*a97c2a1fSXin Li     bytes_remaining = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes;
3304*a97c2a1fSXin Li 
3305*a97c2a1fSXin Li     ps_dec_handle = (iv_obj_t *)ps_dechdl;
3306*a97c2a1fSXin Li 
3307*a97c2a1fSXin Li     if(ps_dechdl == NULL)
3308*a97c2a1fSXin Li     {
3309*a97c2a1fSXin Li         return(IV_FAIL);
3310*a97c2a1fSXin Li     }
3311*a97c2a1fSXin Li 
3312*a97c2a1fSXin Li 
3313*a97c2a1fSXin Li 
3314*a97c2a1fSXin Li     ps_dec_state_multi_core  = ps_dec_handle->pv_codec_handle;
3315*a97c2a1fSXin Li     ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0];
3316*a97c2a1fSXin Li 
3317*a97c2a1fSXin Li     ps_dec_state->ps_disp_frm_buf = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf);
3318*a97c2a1fSXin Li     if(0 == ps_dec_state->u4_share_disp_buf)
3319*a97c2a1fSXin Li     {
3320*a97c2a1fSXin Li         ps_dec_state->ps_disp_frm_buf->pv_y_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0];
3321*a97c2a1fSXin Li         ps_dec_state->ps_disp_frm_buf->pv_u_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1];
3322*a97c2a1fSXin Li         ps_dec_state->ps_disp_frm_buf->pv_v_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2];
3323*a97c2a1fSXin Li     }
3324*a97c2a1fSXin Li 
3325*a97c2a1fSXin Li     ps_dec_state->ps_disp_pic = NULL;
3326*a97c2a1fSXin Li     ps_dec_state->i4_frame_decoded = 0;
3327*a97c2a1fSXin Li     /*rest bytes consumed */
3328*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = 0;
3329*a97c2a1fSXin Li 
3330*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.u4_error_code           = IV_SUCCESS;
3331*a97c2a1fSXin Li 
3332*a97c2a1fSXin Li     if((ps_dec_ip->s_ivd_video_decode_ip_t.pv_stream_buffer == NULL)&&(ps_dec_state->u1_flushfrm==0))
3333*a97c2a1fSXin Li     {
3334*a97c2a1fSXin Li         ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
3335*a97c2a1fSXin Li         ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_DEC_FRM_BS_BUF_NULL;
3336*a97c2a1fSXin Li         return IV_FAIL;
3337*a97c2a1fSXin Li     }
3338*a97c2a1fSXin Li 
3339*a97c2a1fSXin Li 
3340*a97c2a1fSXin Li     if (ps_dec_state->u4_num_frames_decoded > NUM_FRAMES_LIMIT)
3341*a97c2a1fSXin Li     {
3342*a97c2a1fSXin Li         ps_dec_op->s_ivd_video_decode_op_t.u4_error_code       = IMPEG2D_SAMPLE_VERSION_LIMIT_ERR;
3343*a97c2a1fSXin Li         return(IV_FAIL);
3344*a97c2a1fSXin Li     }
3345*a97c2a1fSXin Li 
3346*a97c2a1fSXin Li     if(((0 == ps_dec_state->u2_header_done) || (ps_dec_state->u2_decode_header == 1)) && (ps_dec_state->u1_flushfrm == 0))
3347*a97c2a1fSXin Li     {
3348*a97c2a1fSXin Li         impeg2d_dec_hdr(ps_dec_state,ps_dec_ip ,ps_dec_op);
3349*a97c2a1fSXin Li         bytes_remaining -= ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed;
3350*a97c2a1fSXin Li     }
3351*a97c2a1fSXin Li 
3352*a97c2a1fSXin Li     if((1 != ps_dec_state->u2_decode_header) &&
3353*a97c2a1fSXin Li         (((bytes_remaining > 0) && (1 == ps_dec_state->u2_header_done)) || ps_dec_state->u1_flushfrm))
3354*a97c2a1fSXin Li     {
3355*a97c2a1fSXin Li         if(ps_dec_state->u1_flushfrm)
3356*a97c2a1fSXin Li         {
3357*a97c2a1fSXin Li             if(ps_dec_state->aps_ref_pics[1] != NULL)
3358*a97c2a1fSXin Li             {
3359*a97c2a1fSXin Li                 impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[1], ps_dec_state->aps_ref_pics[1]->i4_buf_id);
3360*a97c2a1fSXin Li                 impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[1]->i4_buf_id, BUF_MGR_REF);
3361*a97c2a1fSXin Li                 impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF);
3362*a97c2a1fSXin Li 
3363*a97c2a1fSXin Li                 ps_dec_state->aps_ref_pics[1] = NULL;
3364*a97c2a1fSXin Li                 ps_dec_state->aps_ref_pics[0] = NULL;
3365*a97c2a1fSXin Li 
3366*a97c2a1fSXin Li             }
3367*a97c2a1fSXin Li             else if(ps_dec_state->aps_ref_pics[0] != NULL)
3368*a97c2a1fSXin Li             {
3369*a97c2a1fSXin Li                 impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[0], ps_dec_state->aps_ref_pics[0]->i4_buf_id);
3370*a97c2a1fSXin Li                 impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF);
3371*a97c2a1fSXin Li 
3372*a97c2a1fSXin Li                 ps_dec_state->aps_ref_pics[0] = NULL;
3373*a97c2a1fSXin Li             }
3374*a97c2a1fSXin Li             ps_dec_ip->s_ivd_video_decode_ip_t.u4_size                 = sizeof(impeg2d_video_decode_ip_t);
3375*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_size                 = sizeof(impeg2d_video_decode_op_t);
3376*a97c2a1fSXin Li 
3377*a97c2a1fSXin Li             ps_disp_pic = impeg2_disp_mgr_get(&ps_dec_state->s_disp_mgr, &ps_dec_state->i4_disp_buf_id);
3378*a97c2a1fSXin Li 
3379*a97c2a1fSXin Li             ps_dec_state->ps_disp_pic = ps_disp_pic;
3380*a97c2a1fSXin Li             if(ps_disp_pic == NULL)
3381*a97c2a1fSXin Li             {
3382*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0;
3383*a97c2a1fSXin Li             }
3384*a97c2a1fSXin Li             else
3385*a97c2a1fSXin Li             {
3386*a97c2a1fSXin Li                 WORD32 fmt_conv;
3387*a97c2a1fSXin Li                 if(0 == ps_dec_state->u4_share_disp_buf)
3388*a97c2a1fSXin Li                 {
3389*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0];
3390*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1];
3391*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf  = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2];
3392*a97c2a1fSXin Li                     fmt_conv = 1;
3393*a97c2a1fSXin Li                 }
3394*a97c2a1fSXin Li                 else
3395*a97c2a1fSXin Li                 {
3396*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf  = ps_disp_pic->pu1_y;
3397*a97c2a1fSXin Li                     if(IV_YUV_420P == ps_dec_state->i4_chromaFormat)
3398*a97c2a1fSXin Li                     {
3399*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf  = ps_disp_pic->pu1_u;
3400*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf  = ps_disp_pic->pu1_v;
3401*a97c2a1fSXin Li                         fmt_conv = 0;
3402*a97c2a1fSXin Li                     }
3403*a97c2a1fSXin Li                     else
3404*a97c2a1fSXin Li                     {
3405*a97c2a1fSXin Li                         UWORD8 *pu1_buf;
3406*a97c2a1fSXin Li 
3407*a97c2a1fSXin Li                         pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[1];
3408*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf  = pu1_buf;
3409*a97c2a1fSXin Li 
3410*a97c2a1fSXin Li                         pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[2];
3411*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf  = pu1_buf;
3412*a97c2a1fSXin Li                         fmt_conv = 1;
3413*a97c2a1fSXin Li                     }
3414*a97c2a1fSXin Li                 }
3415*a97c2a1fSXin Li 
3416*a97c2a1fSXin Li                 if(fmt_conv == 1)
3417*a97c2a1fSXin Li                 {
3418*a97c2a1fSXin Li                     iv_yuv_buf_t *ps_dst;
3419*a97c2a1fSXin Li 
3420*a97c2a1fSXin Li 
3421*a97c2a1fSXin Li                     ps_dst = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf);
3422*a97c2a1fSXin Li                     if(ps_dec_state->u4_deinterlace && (0 == ps_dec_state->u2_progressive_frame))
3423*a97c2a1fSXin Li                     {
3424*a97c2a1fSXin Li                         impeg2d_deinterlace(ps_dec_state,
3425*a97c2a1fSXin Li                                             ps_disp_pic,
3426*a97c2a1fSXin Li                                             ps_dst,
3427*a97c2a1fSXin Li                                             0,
3428*a97c2a1fSXin Li                                             ps_dec_state->u2_vertical_size);
3429*a97c2a1fSXin Li 
3430*a97c2a1fSXin Li                     }
3431*a97c2a1fSXin Li                     else
3432*a97c2a1fSXin Li                     {
3433*a97c2a1fSXin Li                         impeg2d_format_convert(ps_dec_state,
3434*a97c2a1fSXin Li                                                ps_disp_pic,
3435*a97c2a1fSXin Li                                                ps_dst,
3436*a97c2a1fSXin Li                                                0,
3437*a97c2a1fSXin Li                                                ps_dec_state->u2_vertical_size);
3438*a97c2a1fSXin Li                     }
3439*a97c2a1fSXin Li                 }
3440*a97c2a1fSXin Li 
3441*a97c2a1fSXin Li                 if(ps_dec_state->u4_deinterlace)
3442*a97c2a1fSXin Li                 {
3443*a97c2a1fSXin Li                     if(ps_dec_state->ps_deint_pic)
3444*a97c2a1fSXin Li                     {
3445*a97c2a1fSXin Li                         impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg,
3446*a97c2a1fSXin Li                                                ps_dec_state->ps_deint_pic->i4_buf_id,
3447*a97c2a1fSXin Li                                                MPEG2_BUF_MGR_DEINT);
3448*a97c2a1fSXin Li                     }
3449*a97c2a1fSXin Li                     ps_dec_state->ps_deint_pic = ps_disp_pic;
3450*a97c2a1fSXin Li                 }
3451*a97c2a1fSXin Li                 if(0 == ps_dec_state->u4_share_disp_buf)
3452*a97c2a1fSXin Li                     impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_disp_pic->i4_buf_id, BUF_MGR_DISP);
3453*a97c2a1fSXin Li 
3454*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_pic_ht = ps_dec_state->u2_vertical_size;
3455*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_pic_wd = ps_dec_state->u2_horizontal_size;
3456*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1;
3457*a97c2a1fSXin Li 
3458*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_disp_pic->i4_buf_id;
3459*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_disp_pic->u4_ts;
3460*a97c2a1fSXin Li 
3461*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat;
3462*a97c2a1fSXin Li 
3463*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type);
3464*a97c2a1fSXin Li 
3465*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag           = IV_PROGRESSIVE;
3466*a97c2a1fSXin Li 
3467*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size;
3468*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride;
3469*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size;
3470*a97c2a1fSXin Li 
3471*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1;
3472*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1;
3473*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1;
3474*a97c2a1fSXin Li 
3475*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1;
3476*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1;
3477*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1;
3478*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf);
3479*a97c2a1fSXin Li 
3480*a97c2a1fSXin Li                 switch(ps_dec_state->i4_chromaFormat)
3481*a97c2a1fSXin Li                 {
3482*a97c2a1fSXin Li                     case IV_YUV_420SP_UV:
3483*a97c2a1fSXin Li                     case IV_YUV_420SP_VU:
3484*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1);
3485*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride;
3486*a97c2a1fSXin Li                     break;
3487*a97c2a1fSXin Li                     case IV_YUV_422ILE:
3488*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0;
3489*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0;
3490*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0;
3491*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0;
3492*a97c2a1fSXin Li                     break;
3493*a97c2a1fSXin Li                     default:
3494*a97c2a1fSXin Li                     break;
3495*a97c2a1fSXin Li                 }
3496*a97c2a1fSXin Li 
3497*a97c2a1fSXin Li 
3498*a97c2a1fSXin Li             }
3499*a97c2a1fSXin Li             if(ps_dec_op->s_ivd_video_decode_op_t.u4_output_present)
3500*a97c2a1fSXin Li             {
3501*a97c2a1fSXin Li                 if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present)
3502*a97c2a1fSXin Li                 {
3503*a97c2a1fSXin Li                     INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0],
3504*a97c2a1fSXin Li                                 ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1],
3505*a97c2a1fSXin Li                                 ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2],
3506*a97c2a1fSXin Li                                 ps_dec_state->u4_frm_buf_stride,
3507*a97c2a1fSXin Li                                 ps_dec_state->u2_horizontal_size,
3508*a97c2a1fSXin Li                                 ps_dec_state->u2_vertical_size,
3509*a97c2a1fSXin Li                                 ps_dec_state->i4_chromaFormat,
3510*a97c2a1fSXin Li                                 ps_dec_state->u2_horizontal_size,
3511*a97c2a1fSXin Li                                 ps_dec_state->u2_vertical_size);
3512*a97c2a1fSXin Li                 }
3513*a97c2a1fSXin Li                 return(IV_SUCCESS);
3514*a97c2a1fSXin Li             }
3515*a97c2a1fSXin Li             else
3516*a97c2a1fSXin Li             {
3517*a97c2a1fSXin Li                 ps_dec_state->u1_flushfrm = 0;
3518*a97c2a1fSXin Li 
3519*a97c2a1fSXin Li                 return(IV_FAIL);
3520*a97c2a1fSXin Li             }
3521*a97c2a1fSXin Li 
3522*a97c2a1fSXin Li         }
3523*a97c2a1fSXin Li         else if(ps_dec_state->u1_flushfrm==0)
3524*a97c2a1fSXin Li         {
3525*a97c2a1fSXin Li             ps_dec_ip->s_ivd_video_decode_ip_t.u4_size                 = sizeof(impeg2d_video_decode_ip_t);
3526*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_size                 = sizeof(impeg2d_video_decode_op_t);
3527*a97c2a1fSXin Li             if(ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes < 4)
3528*a97c2a1fSXin Li             {
3529*a97c2a1fSXin Li                 ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes;
3530*a97c2a1fSXin Li                 return(IV_FAIL);
3531*a97c2a1fSXin Li             }
3532*a97c2a1fSXin Li 
3533*a97c2a1fSXin Li             if(1 == ps_dec_state->u4_share_disp_buf)
3534*a97c2a1fSXin Li             {
3535*a97c2a1fSXin Li                 if(0 == impeg2_buf_mgr_check_free(ps_dec_state->pv_pic_buf_mg))
3536*a97c2a1fSXin Li                 {
3537*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.u4_error_code =
3538*a97c2a1fSXin Li                                     (IMPEG2D_ERROR_CODES_T)IVD_DEC_REF_BUF_NULL;
3539*a97c2a1fSXin Li                     return IV_FAIL;
3540*a97c2a1fSXin Li                 }
3541*a97c2a1fSXin Li             }
3542*a97c2a1fSXin Li 
3543*a97c2a1fSXin Li 
3544*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat;
3545*a97c2a1fSXin Li 
3546*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type);
3547*a97c2a1fSXin Li 
3548*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag           = IV_PROGRESSIVE;
3549*a97c2a1fSXin Li 
3550*a97c2a1fSXin Li             if (0 == ps_dec_state->u4_frm_buf_stride)
3551*a97c2a1fSXin Li             {
3552*a97c2a1fSXin Li                 ps_dec_state->u4_frm_buf_stride = (ps_dec_state->u2_horizontal_size);
3553*a97c2a1fSXin Li             }
3554*a97c2a1fSXin Li 
3555*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size;
3556*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride;
3557*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size;
3558*a97c2a1fSXin Li 
3559*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1;
3560*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1;
3561*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1;
3562*a97c2a1fSXin Li 
3563*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1;
3564*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1;
3565*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1;
3566*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf);
3567*a97c2a1fSXin Li 
3568*a97c2a1fSXin Li             switch(ps_dec_state->i4_chromaFormat)
3569*a97c2a1fSXin Li             {
3570*a97c2a1fSXin Li                 case IV_YUV_420SP_UV:
3571*a97c2a1fSXin Li                 case IV_YUV_420SP_VU:
3572*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1);
3573*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride;
3574*a97c2a1fSXin Li                 break;
3575*a97c2a1fSXin Li                 case IV_YUV_422ILE:
3576*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0;
3577*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0;
3578*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0;
3579*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0;
3580*a97c2a1fSXin Li                 break;
3581*a97c2a1fSXin Li                 default:
3582*a97c2a1fSXin Li                 break;
3583*a97c2a1fSXin Li             }
3584*a97c2a1fSXin Li 
3585*a97c2a1fSXin Li             if( ps_dec_state->u1_flushfrm == 0)
3586*a97c2a1fSXin Li             {
3587*a97c2a1fSXin Li                 ps_dec_state->u1_flushcnt    = 0;
3588*a97c2a1fSXin Li 
3589*a97c2a1fSXin Li                 ps_dec_state->ps_out_buf = &ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer;
3590*a97c2a1fSXin Li                 if (IV_SUCCESS != check_app_out_buf_size(ps_dec_state))
3591*a97c2a1fSXin Li                 {
3592*a97c2a1fSXin Li                     ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
3593*a97c2a1fSXin Li                     return IV_FAIL;
3594*a97c2a1fSXin Li                 }
3595*a97c2a1fSXin Li 
3596*a97c2a1fSXin Li                 /*************************************************************************/
3597*a97c2a1fSXin Li                 /*                              Frame Decode                             */
3598*a97c2a1fSXin Li                 /*************************************************************************/
3599*a97c2a1fSXin Li                 ps_dec_state->u4_inp_ts = ps_dec_ip->s_ivd_video_decode_ip_t.u4_ts;
3600*a97c2a1fSXin Li 
3601*a97c2a1fSXin Li                 impeg2d_dec_frm(ps_dec_state,ps_dec_ip,ps_dec_op);
3602*a97c2a1fSXin Li 
3603*a97c2a1fSXin Li                 if (IVD_ERROR_NONE ==
3604*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.u4_error_code)
3605*a97c2a1fSXin Li                 {
3606*a97c2a1fSXin Li                     if(ps_dec_state->u1_first_frame_done == 0)
3607*a97c2a1fSXin Li                     {
3608*a97c2a1fSXin Li                         ps_dec_state->u1_first_frame_done = 1;
3609*a97c2a1fSXin Li                     }
3610*a97c2a1fSXin Li 
3611*a97c2a1fSXin Li                     if(ps_dec_state->ps_disp_pic)
3612*a97c2a1fSXin Li                     {
3613*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1;
3614*a97c2a1fSXin Li                         switch(ps_dec_state->ps_disp_pic->e_pic_type)
3615*a97c2a1fSXin Li                         {
3616*a97c2a1fSXin Li                             case I_PIC :
3617*a97c2a1fSXin Li                             ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME;
3618*a97c2a1fSXin Li                             break;
3619*a97c2a1fSXin Li 
3620*a97c2a1fSXin Li                             case P_PIC:
3621*a97c2a1fSXin Li                             ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_P_FRAME;
3622*a97c2a1fSXin Li                             break;
3623*a97c2a1fSXin Li 
3624*a97c2a1fSXin Li                             case B_PIC:
3625*a97c2a1fSXin Li                             ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_B_FRAME;
3626*a97c2a1fSXin Li                             break;
3627*a97c2a1fSXin Li 
3628*a97c2a1fSXin Li                             case D_PIC:
3629*a97c2a1fSXin Li                             ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME;
3630*a97c2a1fSXin Li                             break;
3631*a97c2a1fSXin Li 
3632*a97c2a1fSXin Li                             default :
3633*a97c2a1fSXin Li                             ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_FRAMETYPE_DEFAULT;
3634*a97c2a1fSXin Li                             break;
3635*a97c2a1fSXin Li                         }
3636*a97c2a1fSXin Li                     }
3637*a97c2a1fSXin Li                     else
3638*a97c2a1fSXin Li                     {
3639*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0;
3640*a97c2a1fSXin Li                         ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_NA_FRAME;
3641*a97c2a1fSXin Li                     }
3642*a97c2a1fSXin Li 
3643*a97c2a1fSXin Li                     ps_dec_state->u4_num_frames_decoded++;
3644*a97c2a1fSXin Li                 }
3645*a97c2a1fSXin Li             }
3646*a97c2a1fSXin Li             else
3647*a97c2a1fSXin Li             {
3648*a97c2a1fSXin Li                 ps_dec_state->u1_flushcnt++;
3649*a97c2a1fSXin Li             }
3650*a97c2a1fSXin Li         }
3651*a97c2a1fSXin Li         if(ps_dec_state->ps_disp_pic)
3652*a97c2a1fSXin Li         {
3653*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_dec_state->ps_disp_pic->i4_buf_id;
3654*a97c2a1fSXin Li             ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_dec_state->ps_disp_pic->u4_ts;
3655*a97c2a1fSXin Li 
3656*a97c2a1fSXin Li             if(0 == ps_dec_state->u4_share_disp_buf)
3657*a97c2a1fSXin Li             {
3658*a97c2a1fSXin Li                 impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->ps_disp_pic->i4_buf_id, BUF_MGR_DISP);
3659*a97c2a1fSXin Li             }
3660*a97c2a1fSXin Li         }
3661*a97c2a1fSXin Li 
3662*a97c2a1fSXin Li         if(ps_dec_state->u4_deinterlace)
3663*a97c2a1fSXin Li         {
3664*a97c2a1fSXin Li             if(ps_dec_state->ps_deint_pic)
3665*a97c2a1fSXin Li             {
3666*a97c2a1fSXin Li                 impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg,
3667*a97c2a1fSXin Li                                        ps_dec_state->ps_deint_pic->i4_buf_id,
3668*a97c2a1fSXin Li                                        MPEG2_BUF_MGR_DEINT);
3669*a97c2a1fSXin Li             }
3670*a97c2a1fSXin Li             ps_dec_state->ps_deint_pic = ps_dec_state->ps_disp_pic;
3671*a97c2a1fSXin Li         }
3672*a97c2a1fSXin Li 
3673*a97c2a1fSXin Li         if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present)
3674*a97c2a1fSXin Li         {
3675*a97c2a1fSXin Li             INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0],
3676*a97c2a1fSXin Li                         ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1],
3677*a97c2a1fSXin Li                         ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2],
3678*a97c2a1fSXin Li                         ps_dec_state->u4_frm_buf_stride,
3679*a97c2a1fSXin Li                         ps_dec_state->u2_horizontal_size,
3680*a97c2a1fSXin Li                         ps_dec_state->u2_vertical_size,
3681*a97c2a1fSXin Li                         ps_dec_state->i4_chromaFormat,
3682*a97c2a1fSXin Li                         ps_dec_state->u2_horizontal_size,
3683*a97c2a1fSXin Li                         ps_dec_state->u2_vertical_size);
3684*a97c2a1fSXin Li         }
3685*a97c2a1fSXin Li 
3686*a97c2a1fSXin Li     }
3687*a97c2a1fSXin Li 
3688*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = 1;
3689*a97c2a1fSXin Li     ps_dec_op->s_ivd_video_decode_op_t.e4_fld_type     = ps_dec_state->s_disp_op.e4_fld_type;
3690*a97c2a1fSXin Li 
3691*a97c2a1fSXin Li 
3692*a97c2a1fSXin Li     if(ps_dec_op->s_ivd_video_decode_op_t.u4_error_code)
3693*a97c2a1fSXin Li         return IV_FAIL;
3694*a97c2a1fSXin Li     else
3695*a97c2a1fSXin Li         return IV_SUCCESS;
3696*a97c2a1fSXin Li }
3697