xref: /aosp_15_r20/external/libhevc/decoder/ihevcd_cxa.h (revision c83a76b084498d55f252f48b2e3786804cdf24b7)
1*c83a76b0SSuyog Pawar /******************************************************************************
2*c83a76b0SSuyog Pawar *
3*c83a76b0SSuyog Pawar * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4*c83a76b0SSuyog Pawar *
5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License");
6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License.
7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at:
8*c83a76b0SSuyog Pawar *
9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0
10*c83a76b0SSuyog Pawar *
11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software
12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS,
13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and
15*c83a76b0SSuyog Pawar * limitations under the License.
16*c83a76b0SSuyog Pawar *
17*c83a76b0SSuyog Pawar ******************************************************************************/
18*c83a76b0SSuyog Pawar /**
19*c83a76b0SSuyog Pawar *******************************************************************************
20*c83a76b0SSuyog Pawar * @file
21*c83a76b0SSuyog Pawar *  ihevcd_cxa.h
22*c83a76b0SSuyog Pawar *
23*c83a76b0SSuyog Pawar * @brief
24*c83a76b0SSuyog Pawar *  This file contains all the necessary structure and  enumeration
25*c83a76b0SSuyog Pawar * definitions needed for the Application  Program Interface(API) of the
26*c83a76b0SSuyog Pawar * Ittiam HEVC decoder  on Cortex Ax
27*c83a76b0SSuyog Pawar *
28*c83a76b0SSuyog Pawar * @author
29*c83a76b0SSuyog Pawar *  Harish
30*c83a76b0SSuyog Pawar *
31*c83a76b0SSuyog Pawar * @remarks
32*c83a76b0SSuyog Pawar *  None
33*c83a76b0SSuyog Pawar *
34*c83a76b0SSuyog Pawar *******************************************************************************
35*c83a76b0SSuyog Pawar */
36*c83a76b0SSuyog Pawar #ifndef __IHEVCD_CXA_H__
37*c83a76b0SSuyog Pawar #define __IHEVCD_CXA_H__
38*c83a76b0SSuyog Pawar #ifdef __cplusplus
39*c83a76b0SSuyog Pawar extern "C" {
40*c83a76b0SSuyog Pawar #endif
41*c83a76b0SSuyog Pawar #include "iv.h"
42*c83a76b0SSuyog Pawar #include "ivd.h"
43*c83a76b0SSuyog Pawar 
44*c83a76b0SSuyog Pawar 
45*c83a76b0SSuyog Pawar /*****************************************************************************/
46*c83a76b0SSuyog Pawar /* Constant Macros                                                           */
47*c83a76b0SSuyog Pawar /*****************************************************************************/
48*c83a76b0SSuyog Pawar #define IVD_ERROR_MASK 0xFF
49*c83a76b0SSuyog Pawar 
50*c83a76b0SSuyog Pawar /*****************************************************************************/
51*c83a76b0SSuyog Pawar /* Function Macros                                                           */
52*c83a76b0SSuyog Pawar /*****************************************************************************/
53*c83a76b0SSuyog Pawar #define IS_IVD_CONCEALMENT_APPLIED(x)       (x & (1 << IVD_APPLIEDCONCEALMENT))
54*c83a76b0SSuyog Pawar #define IS_IVD_INSUFFICIENTDATA_ERROR(x)    (x & (1 << IVD_INSUFFICIENTDATA))
55*c83a76b0SSuyog Pawar #define IS_IVD_CORRUPTEDDATA_ERROR(x)       (x & (1 << IVD_CORRUPTEDDATA))
56*c83a76b0SSuyog Pawar #define IS_IVD_CORRUPTEDHEADER_ERROR(x)     (x & (1 << IVD_CORRUPTEDHEADER))
57*c83a76b0SSuyog Pawar #define IS_IVD_UNSUPPORTEDINPUT_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDINPUT))
58*c83a76b0SSuyog Pawar #define IS_IVD_UNSUPPORTEDPARAM_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDPARAM))
59*c83a76b0SSuyog Pawar #define IS_IVD_FATAL_ERROR(x)               (x & (1 << IVD_FATALERROR))
60*c83a76b0SSuyog Pawar #define IS_IVD_INVALID_BITSTREAM_ERROR(x)   (x & (1 << IVD_INVALID_BITSTREAM))
61*c83a76b0SSuyog Pawar #define IS_IVD_INCOMPLETE_BITSTREAM_ERROR(x) (x & (1 << IVD_INCOMPLETE_BITSTREAM))
62*c83a76b0SSuyog Pawar 
63*c83a76b0SSuyog Pawar 
64*c83a76b0SSuyog Pawar /*****************************************************************************/
65*c83a76b0SSuyog Pawar /* API Function Prototype                                                    */
66*c83a76b0SSuyog Pawar /*****************************************************************************/
67*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
68*c83a76b0SSuyog Pawar                                              void *pv_api_ip,
69*c83a76b0SSuyog Pawar                                              void *pv_api_op);
70*c83a76b0SSuyog Pawar 
71*c83a76b0SSuyog Pawar /*****************************************************************************/
72*c83a76b0SSuyog Pawar /* Enums                                                                     */
73*c83a76b0SSuyog Pawar /*****************************************************************************/
74*c83a76b0SSuyog Pawar /* Codec Error codes for HEVC  Decoder                                       */
75*c83a76b0SSuyog Pawar 
76*c83a76b0SSuyog Pawar 
77*c83a76b0SSuyog Pawar typedef enum {
78*c83a76b0SSuyog Pawar     /**
79*c83a76b0SSuyog Pawar      *  No error
80*c83a76b0SSuyog Pawar      */
81*c83a76b0SSuyog Pawar     IHEVCD_SUCCESS = 0,
82*c83a76b0SSuyog Pawar 
83*c83a76b0SSuyog Pawar     /**
84*c83a76b0SSuyog Pawar      *  Codec calls done without successful init
85*c83a76b0SSuyog Pawar      */
86*c83a76b0SSuyog Pawar     IHEVCD_INIT_NOT_DONE                        = IVD_DUMMY_ELEMENT_FOR_CODEC_EXTENSIONS,
87*c83a76b0SSuyog Pawar 
88*c83a76b0SSuyog Pawar 
89*c83a76b0SSuyog Pawar     IHEVCD_CXA_VID_HDR_DEC_NUM_FRM_BUF_NOT_SUFFICIENT,
90*c83a76b0SSuyog Pawar 
91*c83a76b0SSuyog Pawar     /**
92*c83a76b0SSuyog Pawar      *  Unsupported level passed as an argument
93*c83a76b0SSuyog Pawar      */
94*c83a76b0SSuyog Pawar     IHEVCD_LEVEL_UNSUPPORTED,
95*c83a76b0SSuyog Pawar     /**
96*c83a76b0SSuyog Pawar      *  Unsupported number of reference pictures passed as an argument
97*c83a76b0SSuyog Pawar      */
98*c83a76b0SSuyog Pawar     IHEVCD_NUM_REF_UNSUPPORTED,
99*c83a76b0SSuyog Pawar     /**
100*c83a76b0SSuyog Pawar      *  Unsupported number of reorder pictures passed as an argument
101*c83a76b0SSuyog Pawar      */
102*c83a76b0SSuyog Pawar     IHEVCD_NUM_REORDER_UNSUPPORTED,
103*c83a76b0SSuyog Pawar     /**
104*c83a76b0SSuyog Pawar      *  Unsupported number of extra display pictures passed as an argument
105*c83a76b0SSuyog Pawar      */
106*c83a76b0SSuyog Pawar     IHEVCD_NUM_EXTRA_DISP_UNSUPPORTED,
107*c83a76b0SSuyog Pawar     /**
108*c83a76b0SSuyog Pawar      *  Invalid display stride requested.
109*c83a76b0SSuyog Pawar      */
110*c83a76b0SSuyog Pawar     IHEVCD_INVALID_DISP_STRD,
111*c83a76b0SSuyog Pawar 
112*c83a76b0SSuyog Pawar     /**
113*c83a76b0SSuyog Pawar      * Reached end of sequence
114*c83a76b0SSuyog Pawar      */
115*c83a76b0SSuyog Pawar     IHEVCD_END_OF_SEQUENCE,
116*c83a76b0SSuyog Pawar 
117*c83a76b0SSuyog Pawar     /**
118*c83a76b0SSuyog Pawar      * Width/height greater than max width and max height
119*c83a76b0SSuyog Pawar      */
120*c83a76b0SSuyog Pawar     IHEVCD_UNSUPPORTED_DIMENSIONS,
121*c83a76b0SSuyog Pawar 
122*c83a76b0SSuyog Pawar     /**
123*c83a76b0SSuyog Pawar      *  Buffer size to hold version string is not sufficient
124*c83a76b0SSuyog Pawar      *  Allocate more to hold version string
125*c83a76b0SSuyog Pawar      */
126*c83a76b0SSuyog Pawar     IHEVCD_CXA_VERS_BUF_INSUFFICIENT,
127*c83a76b0SSuyog Pawar     /**
128*c83a76b0SSuyog Pawar      * Stream chroma format other than YUV420
129*c83a76b0SSuyog Pawar      */
130*c83a76b0SSuyog Pawar     IHEVCD_UNSUPPORTED_CHROMA_FMT_IDC,
131*c83a76b0SSuyog Pawar 
132*c83a76b0SSuyog Pawar     /**
133*c83a76b0SSuyog Pawar      * Frame info output buffer null
134*c83a76b0SSuyog Pawar      */
135*c83a76b0SSuyog Pawar     IHEVCD_FRAME_INFO_OP_BUF_NULL,
136*c83a76b0SSuyog Pawar 
137*c83a76b0SSuyog Pawar     /**
138*c83a76b0SSuyog Pawar      * Frame info insufficient buffer
139*c83a76b0SSuyog Pawar      */
140*c83a76b0SSuyog Pawar     IHEVCD_INSUFFICIENT_METADATA_BUFFER,
141*c83a76b0SSuyog Pawar 
142*c83a76b0SSuyog Pawar     /**
143*c83a76b0SSuyog Pawar      * Generic failure
144*c83a76b0SSuyog Pawar      */
145*c83a76b0SSuyog Pawar     IHEVCD_FAIL                             = 0x7FFFFFFF
146*c83a76b0SSuyog Pawar 
147*c83a76b0SSuyog Pawar 
148*c83a76b0SSuyog Pawar }IHEVCD_CXA_ERROR_CODES_T;
149*c83a76b0SSuyog Pawar 
150*c83a76b0SSuyog Pawar /*****************************************************************************/
151*c83a76b0SSuyog Pawar /* Extended Structures                                                       */
152*c83a76b0SSuyog Pawar /*****************************************************************************/
153*c83a76b0SSuyog Pawar 
154*c83a76b0SSuyog Pawar 
155*c83a76b0SSuyog Pawar /*****************************************************************************/
156*c83a76b0SSuyog Pawar /*  Delete Codec                                                             */
157*c83a76b0SSuyog Pawar /*****************************************************************************/
158*c83a76b0SSuyog Pawar 
159*c83a76b0SSuyog Pawar typedef struct {
160*c83a76b0SSuyog Pawar     ivd_delete_ip_t               s_ivd_delete_ip_t;
161*c83a76b0SSuyog Pawar }ihevcd_cxa_delete_ip_t;
162*c83a76b0SSuyog Pawar 
163*c83a76b0SSuyog Pawar 
164*c83a76b0SSuyog Pawar typedef struct {
165*c83a76b0SSuyog Pawar     ivd_delete_op_t               s_ivd_delete_op_t;
166*c83a76b0SSuyog Pawar }ihevcd_cxa_delete_op_t;
167*c83a76b0SSuyog Pawar 
168*c83a76b0SSuyog Pawar /*****************************************************************************/
169*c83a76b0SSuyog Pawar /*   Initialize decoder                                                      */
170*c83a76b0SSuyog Pawar /*****************************************************************************/
171*c83a76b0SSuyog Pawar 
172*c83a76b0SSuyog Pawar typedef struct {
173*c83a76b0SSuyog Pawar     ivd_create_ip_t                         s_ivd_create_ip_t;
174*c83a76b0SSuyog Pawar 
175*c83a76b0SSuyog Pawar     /**
176*c83a76b0SSuyog Pawar      * enable_frm_info
177*c83a76b0SSuyog Pawar      */
178*c83a76b0SSuyog Pawar     UWORD32                                 u4_enable_frame_info;
179*c83a76b0SSuyog Pawar 
180*c83a76b0SSuyog Pawar     /**
181*c83a76b0SSuyog Pawar      * enable_threads
182*c83a76b0SSuyog Pawar      */
183*c83a76b0SSuyog Pawar     UWORD32                                  u4_keep_threads_active;
184*c83a76b0SSuyog Pawar }ihevcd_cxa_create_ip_t;
185*c83a76b0SSuyog Pawar 
186*c83a76b0SSuyog Pawar 
187*c83a76b0SSuyog Pawar typedef struct {
188*c83a76b0SSuyog Pawar     ivd_create_op_t                         s_ivd_create_op_t;
189*c83a76b0SSuyog Pawar }ihevcd_cxa_create_op_t;
190*c83a76b0SSuyog Pawar 
191*c83a76b0SSuyog Pawar /*****************************************************************************/
192*c83a76b0SSuyog Pawar /*   Video Decode                                                            */
193*c83a76b0SSuyog Pawar /*****************************************************************************/
194*c83a76b0SSuyog Pawar 
195*c83a76b0SSuyog Pawar typedef struct {
196*c83a76b0SSuyog Pawar 
197*c83a76b0SSuyog Pawar     /**
198*c83a76b0SSuyog Pawar      * ivd_video_decode_ip_t
199*c83a76b0SSuyog Pawar      */
200*c83a76b0SSuyog Pawar     ivd_video_decode_ip_t                   s_ivd_video_decode_ip_t;
201*c83a76b0SSuyog Pawar 
202*c83a76b0SSuyog Pawar     /**
203*c83a76b0SSuyog Pawar      * 8x8 block QP map
204*c83a76b0SSuyog Pawar      */
205*c83a76b0SSuyog Pawar     UWORD8                                  *pu1_8x8_blk_qp_map;
206*c83a76b0SSuyog Pawar 
207*c83a76b0SSuyog Pawar     /**
208*c83a76b0SSuyog Pawar      * 8x8 block type map
209*c83a76b0SSuyog Pawar      */
210*c83a76b0SSuyog Pawar     UWORD8                                  *pu1_8x8_blk_type_map;
211*c83a76b0SSuyog Pawar 
212*c83a76b0SSuyog Pawar     /**
213*c83a76b0SSuyog Pawar      * 8x8 block QP map size
214*c83a76b0SSuyog Pawar      */
215*c83a76b0SSuyog Pawar     UWORD32                                 u4_8x8_blk_qp_map_size;
216*c83a76b0SSuyog Pawar 
217*c83a76b0SSuyog Pawar     /**
218*c83a76b0SSuyog Pawar      * 8x8 block type map size
219*c83a76b0SSuyog Pawar      */
220*c83a76b0SSuyog Pawar     UWORD32                                 u4_8x8_blk_type_map_size;
221*c83a76b0SSuyog Pawar }ihevcd_cxa_video_decode_ip_t;
222*c83a76b0SSuyog Pawar 
223*c83a76b0SSuyog Pawar /*********************************************************************************/
224*c83a76b0SSuyog Pawar /* QP and CU/Block type maps are defined for each 8x8 coding unit.               */
225*c83a76b0SSuyog Pawar /* QP can range from <1, 51> and block type can be INTER/INTRA/SKIP.             */
226*c83a76b0SSuyog Pawar /*                                                                               */
227*c83a76b0SSuyog Pawar /* A frame with a resolution of WdxHt has a total of                             */
228*c83a76b0SSuyog Pawar /* (align8(Wd) x align8(Ht)) / 64 entries for QP and Block type map each.        */
229*c83a76b0SSuyog Pawar /*                                                                               */
230*c83a76b0SSuyog Pawar /* For example, for a frame of size 60x60 shown in the figure down, both         */
231*c83a76b0SSuyog Pawar /* maps (QP and Block type) have the same layout.                                */
232*c83a76b0SSuyog Pawar /* Each block represents an 8x8 sub-block. Both width and height are aligned to  */
233*c83a76b0SSuyog Pawar /* next largest multiple of 8, 64 in this case.                                  */
234*c83a76b0SSuyog Pawar /*                                                                               */
235*c83a76b0SSuyog Pawar /*     0     8     16    24    32    40    48    56   64                         */
236*c83a76b0SSuyog Pawar /*  0   ------------------------------------------------                         */
237*c83a76b0SSuyog Pawar /*     | 0th | 1st | 2nd | 3rd | 4th | 5th | 6th | 7th |                         */
238*c83a76b0SSuyog Pawar /*  8   ------------------------------------------------                         */
239*c83a76b0SSuyog Pawar /*     | 8th | 9th | 10th | -  |  -  | -   | -   |  -  |                         */
240*c83a76b0SSuyog Pawar /* 16   ------------------------------------------------                         */
241*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
242*c83a76b0SSuyog Pawar /* 24   ------------------------------------------------                         */
243*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
244*c83a76b0SSuyog Pawar /* 32   ------------------------------------------------                         */
245*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
246*c83a76b0SSuyog Pawar /* 40   ------------------------------------------------                         */
247*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
248*c83a76b0SSuyog Pawar /* 48   ------------------------------------------------                         */
249*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
250*c83a76b0SSuyog Pawar /* 56   ------------------------------------------------                         */
251*c83a76b0SSuyog Pawar /*     |  -  |  -  |  -   | -  |  -  |  -  |  -  |  -  |                         */
252*c83a76b0SSuyog Pawar /* 64   ------------------------------------------------                         */
253*c83a76b0SSuyog Pawar /*                                                                               */
254*c83a76b0SSuyog Pawar /*********************************************************************************/
255*c83a76b0SSuyog Pawar 
256*c83a76b0SSuyog Pawar typedef struct {
257*c83a76b0SSuyog Pawar 
258*c83a76b0SSuyog Pawar     /**
259*c83a76b0SSuyog Pawar      * ivd_video_decode_op_t
260*c83a76b0SSuyog Pawar      */
261*c83a76b0SSuyog Pawar     ivd_video_decode_op_t                   s_ivd_video_decode_op_t;
262*c83a76b0SSuyog Pawar 
263*c83a76b0SSuyog Pawar     /**
264*c83a76b0SSuyog Pawar      * 8x8 block QP map
265*c83a76b0SSuyog Pawar      */
266*c83a76b0SSuyog Pawar     UWORD8                                  *pu1_8x8_blk_qp_map;
267*c83a76b0SSuyog Pawar 
268*c83a76b0SSuyog Pawar     /**
269*c83a76b0SSuyog Pawar      * 8x8 block type map
270*c83a76b0SSuyog Pawar      */
271*c83a76b0SSuyog Pawar     UWORD8                                  *pu1_8x8_blk_type_map;
272*c83a76b0SSuyog Pawar 
273*c83a76b0SSuyog Pawar     /**
274*c83a76b0SSuyog Pawar      * 8x8 block QP map size
275*c83a76b0SSuyog Pawar      */
276*c83a76b0SSuyog Pawar     UWORD32                                 u4_8x8_blk_qp_map_size;
277*c83a76b0SSuyog Pawar 
278*c83a76b0SSuyog Pawar     /**
279*c83a76b0SSuyog Pawar      * 8x8 block type map size
280*c83a76b0SSuyog Pawar      */
281*c83a76b0SSuyog Pawar     UWORD32                                 u4_8x8_blk_type_map_size;
282*c83a76b0SSuyog Pawar }ihevcd_cxa_video_decode_op_t;
283*c83a76b0SSuyog Pawar 
284*c83a76b0SSuyog Pawar 
285*c83a76b0SSuyog Pawar /*****************************************************************************/
286*c83a76b0SSuyog Pawar /*   Get Display Frame                                                       */
287*c83a76b0SSuyog Pawar /*****************************************************************************/
288*c83a76b0SSuyog Pawar 
289*c83a76b0SSuyog Pawar typedef struct
290*c83a76b0SSuyog Pawar {
291*c83a76b0SSuyog Pawar     /**
292*c83a76b0SSuyog Pawar      * ivd_get_display_frame_ip_t
293*c83a76b0SSuyog Pawar      */
294*c83a76b0SSuyog Pawar     ivd_get_display_frame_ip_t              s_ivd_get_display_frame_ip_t;
295*c83a76b0SSuyog Pawar }ihevcd_cxa_get_display_frame_ip_t;
296*c83a76b0SSuyog Pawar 
297*c83a76b0SSuyog Pawar 
298*c83a76b0SSuyog Pawar typedef struct
299*c83a76b0SSuyog Pawar {
300*c83a76b0SSuyog Pawar     /**
301*c83a76b0SSuyog Pawar      * ivd_get_display_frame_op_t
302*c83a76b0SSuyog Pawar      */
303*c83a76b0SSuyog Pawar     ivd_get_display_frame_op_t              s_ivd_get_display_frame_op_t;
304*c83a76b0SSuyog Pawar }ihevcd_cxa_get_display_frame_op_t;
305*c83a76b0SSuyog Pawar 
306*c83a76b0SSuyog Pawar /*****************************************************************************/
307*c83a76b0SSuyog Pawar /*   Set Display Frame                                                       */
308*c83a76b0SSuyog Pawar /*****************************************************************************/
309*c83a76b0SSuyog Pawar 
310*c83a76b0SSuyog Pawar 
311*c83a76b0SSuyog Pawar typedef struct
312*c83a76b0SSuyog Pawar {
313*c83a76b0SSuyog Pawar     /**
314*c83a76b0SSuyog Pawar      * ivd_set_display_frame_ip_t
315*c83a76b0SSuyog Pawar      */
316*c83a76b0SSuyog Pawar     ivd_set_display_frame_ip_t              s_ivd_set_display_frame_ip_t;
317*c83a76b0SSuyog Pawar }ihevcd_cxa_set_display_frame_ip_t;
318*c83a76b0SSuyog Pawar 
319*c83a76b0SSuyog Pawar 
320*c83a76b0SSuyog Pawar typedef struct
321*c83a76b0SSuyog Pawar {
322*c83a76b0SSuyog Pawar     /**
323*c83a76b0SSuyog Pawar      * ivd_set_display_frame_op_t
324*c83a76b0SSuyog Pawar      */
325*c83a76b0SSuyog Pawar     ivd_set_display_frame_op_t              s_ivd_set_display_frame_op_t;
326*c83a76b0SSuyog Pawar }ihevcd_cxa_set_display_frame_op_t;
327*c83a76b0SSuyog Pawar 
328*c83a76b0SSuyog Pawar /*****************************************************************************/
329*c83a76b0SSuyog Pawar /*   Release Display Buffers                                                 */
330*c83a76b0SSuyog Pawar /*****************************************************************************/
331*c83a76b0SSuyog Pawar 
332*c83a76b0SSuyog Pawar 
333*c83a76b0SSuyog Pawar typedef struct
334*c83a76b0SSuyog Pawar {
335*c83a76b0SSuyog Pawar     /**
336*c83a76b0SSuyog Pawar      * ivd_rel_display_frame_ip_t
337*c83a76b0SSuyog Pawar      */
338*c83a76b0SSuyog Pawar 
339*c83a76b0SSuyog Pawar     ivd_rel_display_frame_ip_t                  s_ivd_rel_display_frame_ip_t;
340*c83a76b0SSuyog Pawar }ihevcd_cxa_rel_display_frame_ip_t;
341*c83a76b0SSuyog Pawar 
342*c83a76b0SSuyog Pawar 
343*c83a76b0SSuyog Pawar typedef struct
344*c83a76b0SSuyog Pawar {
345*c83a76b0SSuyog Pawar     /**
346*c83a76b0SSuyog Pawar      * ivd_rel_display_frame_op_t
347*c83a76b0SSuyog Pawar      */
348*c83a76b0SSuyog Pawar     ivd_rel_display_frame_op_t                  s_ivd_rel_display_frame_op_t;
349*c83a76b0SSuyog Pawar }ihevcd_cxa_rel_display_frame_op_t;
350*c83a76b0SSuyog Pawar 
351*c83a76b0SSuyog Pawar 
352*c83a76b0SSuyog Pawar typedef enum
353*c83a76b0SSuyog Pawar {
354*c83a76b0SSuyog Pawar     /** Set number of cores/threads to be used */
355*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_SET_NUM_CORES         = IVD_CMD_CTL_CODEC_SUBCMD_START,
356*c83a76b0SSuyog Pawar 
357*c83a76b0SSuyog Pawar     /** Set processor details */
358*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_SET_PROCESSOR         = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x001,
359*c83a76b0SSuyog Pawar 
360*c83a76b0SSuyog Pawar     /** Get display buffer dimensions */
361*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x100,
362*c83a76b0SSuyog Pawar 
363*c83a76b0SSuyog Pawar     /** Get VUI parameters */
364*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS        = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x101,
365*c83a76b0SSuyog Pawar 
366*c83a76b0SSuyog Pawar     /** Get SEI Mastering display color volume parameters */
367*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS   = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x102,
368*c83a76b0SSuyog Pawar 
369*c83a76b0SSuyog Pawar     /** Enable/disable GPU, supported on select platforms */
370*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_GPU_ENABLE_DISABLE    = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x200,
371*c83a76b0SSuyog Pawar 
372*c83a76b0SSuyog Pawar     /** Set degrade level */
373*c83a76b0SSuyog Pawar     IHEVCD_CXA_CMD_CTL_DEGRADE               = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x300
374*c83a76b0SSuyog Pawar }IHEVCD_CXA_CMD_CTL_SUB_CMDS;
375*c83a76b0SSuyog Pawar /*****************************************************************************/
376*c83a76b0SSuyog Pawar /*   Video control  Flush                                                    */
377*c83a76b0SSuyog Pawar /*****************************************************************************/
378*c83a76b0SSuyog Pawar 
379*c83a76b0SSuyog Pawar 
380*c83a76b0SSuyog Pawar typedef struct {
381*c83a76b0SSuyog Pawar 
382*c83a76b0SSuyog Pawar     /**
383*c83a76b0SSuyog Pawar      * ivd_ctl_flush_ip_t
384*c83a76b0SSuyog Pawar      */
385*c83a76b0SSuyog Pawar     ivd_ctl_flush_ip_t                      s_ivd_ctl_flush_ip_t;
386*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_flush_ip_t;
387*c83a76b0SSuyog Pawar 
388*c83a76b0SSuyog Pawar 
389*c83a76b0SSuyog Pawar typedef struct {
390*c83a76b0SSuyog Pawar 
391*c83a76b0SSuyog Pawar     /**
392*c83a76b0SSuyog Pawar      * ivd_ctl_flush_op_t
393*c83a76b0SSuyog Pawar      */
394*c83a76b0SSuyog Pawar     ivd_ctl_flush_op_t                      s_ivd_ctl_flush_op_t;
395*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_flush_op_t;
396*c83a76b0SSuyog Pawar 
397*c83a76b0SSuyog Pawar /*****************************************************************************/
398*c83a76b0SSuyog Pawar /*   Video control reset                                                     */
399*c83a76b0SSuyog Pawar /*****************************************************************************/
400*c83a76b0SSuyog Pawar 
401*c83a76b0SSuyog Pawar 
402*c83a76b0SSuyog Pawar typedef struct {
403*c83a76b0SSuyog Pawar 
404*c83a76b0SSuyog Pawar     /**
405*c83a76b0SSuyog Pawar      * ivd_ctl_reset_ip_t
406*c83a76b0SSuyog Pawar      */
407*c83a76b0SSuyog Pawar     ivd_ctl_reset_ip_t                      s_ivd_ctl_reset_ip_t;
408*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_reset_ip_t;
409*c83a76b0SSuyog Pawar 
410*c83a76b0SSuyog Pawar 
411*c83a76b0SSuyog Pawar typedef struct {
412*c83a76b0SSuyog Pawar 
413*c83a76b0SSuyog Pawar     /**
414*c83a76b0SSuyog Pawar      * ivd_ctl_reset_op_t
415*c83a76b0SSuyog Pawar      */
416*c83a76b0SSuyog Pawar     ivd_ctl_reset_op_t                      s_ivd_ctl_reset_op_t;
417*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_reset_op_t;
418*c83a76b0SSuyog Pawar 
419*c83a76b0SSuyog Pawar 
420*c83a76b0SSuyog Pawar /*****************************************************************************/
421*c83a76b0SSuyog Pawar /*   Video control  Set Params                                               */
422*c83a76b0SSuyog Pawar /*****************************************************************************/
423*c83a76b0SSuyog Pawar 
424*c83a76b0SSuyog Pawar 
425*c83a76b0SSuyog Pawar typedef struct {
426*c83a76b0SSuyog Pawar 
427*c83a76b0SSuyog Pawar     /**
428*c83a76b0SSuyog Pawar      *  ivd_ctl_set_config_ip_t
429*c83a76b0SSuyog Pawar      */
430*c83a76b0SSuyog Pawar     ivd_ctl_set_config_ip_t             s_ivd_ctl_set_config_ip_t;
431*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_config_ip_t;
432*c83a76b0SSuyog Pawar 
433*c83a76b0SSuyog Pawar 
434*c83a76b0SSuyog Pawar typedef struct {
435*c83a76b0SSuyog Pawar 
436*c83a76b0SSuyog Pawar     /**
437*c83a76b0SSuyog Pawar      * ivd_ctl_set_config_op_t
438*c83a76b0SSuyog Pawar      */
439*c83a76b0SSuyog Pawar     ivd_ctl_set_config_op_t             s_ivd_ctl_set_config_op_t;
440*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_config_op_t;
441*c83a76b0SSuyog Pawar 
442*c83a76b0SSuyog Pawar /*****************************************************************************/
443*c83a76b0SSuyog Pawar /*   Video control:Get Buf Info                                              */
444*c83a76b0SSuyog Pawar /*****************************************************************************/
445*c83a76b0SSuyog Pawar 
446*c83a76b0SSuyog Pawar 
447*c83a76b0SSuyog Pawar typedef struct {
448*c83a76b0SSuyog Pawar 
449*c83a76b0SSuyog Pawar     /**
450*c83a76b0SSuyog Pawar      * ivd_ctl_getbufinfo_ip_t
451*c83a76b0SSuyog Pawar      */
452*c83a76b0SSuyog Pawar     ivd_ctl_getbufinfo_ip_t             s_ivd_ctl_getbufinfo_ip_t;
453*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getbufinfo_ip_t;
454*c83a76b0SSuyog Pawar 
455*c83a76b0SSuyog Pawar 
456*c83a76b0SSuyog Pawar 
457*c83a76b0SSuyog Pawar typedef struct {
458*c83a76b0SSuyog Pawar 
459*c83a76b0SSuyog Pawar     /**
460*c83a76b0SSuyog Pawar      * ivd_ctl_getbufinfo_op_t
461*c83a76b0SSuyog Pawar      */
462*c83a76b0SSuyog Pawar     ivd_ctl_getbufinfo_op_t             s_ivd_ctl_getbufinfo_op_t;
463*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getbufinfo_op_t;
464*c83a76b0SSuyog Pawar 
465*c83a76b0SSuyog Pawar 
466*c83a76b0SSuyog Pawar /*****************************************************************************/
467*c83a76b0SSuyog Pawar /*   Video control:Getstatus Call                                            */
468*c83a76b0SSuyog Pawar /*****************************************************************************/
469*c83a76b0SSuyog Pawar 
470*c83a76b0SSuyog Pawar 
471*c83a76b0SSuyog Pawar typedef struct {
472*c83a76b0SSuyog Pawar 
473*c83a76b0SSuyog Pawar     /**
474*c83a76b0SSuyog Pawar      * ivd_ctl_getstatus_ip_t
475*c83a76b0SSuyog Pawar      */
476*c83a76b0SSuyog Pawar     ivd_ctl_getstatus_ip_t                  s_ivd_ctl_getstatus_ip_t;
477*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getstatus_ip_t;
478*c83a76b0SSuyog Pawar 
479*c83a76b0SSuyog Pawar 
480*c83a76b0SSuyog Pawar 
481*c83a76b0SSuyog Pawar typedef struct {
482*c83a76b0SSuyog Pawar 
483*c83a76b0SSuyog Pawar     /**
484*c83a76b0SSuyog Pawar      * ivd_ctl_getstatus_op_t
485*c83a76b0SSuyog Pawar      */
486*c83a76b0SSuyog Pawar     ivd_ctl_getstatus_op_t                  s_ivd_ctl_getstatus_op_t;
487*c83a76b0SSuyog Pawar 
488*c83a76b0SSuyog Pawar     /**
489*c83a76b0SSuyog Pawar      * Height of the coding picture without cropping
490*c83a76b0SSuyog Pawar      */
491*c83a76b0SSuyog Pawar     UWORD32                  u4_coded_pic_ht;
492*c83a76b0SSuyog Pawar 
493*c83a76b0SSuyog Pawar     /**
494*c83a76b0SSuyog Pawar      * Width of the coding picture without cropping
495*c83a76b0SSuyog Pawar      */
496*c83a76b0SSuyog Pawar     UWORD32                  u4_coded_pic_wd;
497*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getstatus_op_t;
498*c83a76b0SSuyog Pawar 
499*c83a76b0SSuyog Pawar 
500*c83a76b0SSuyog Pawar /*****************************************************************************/
501*c83a76b0SSuyog Pawar /*   Video control:Get Version Info                                          */
502*c83a76b0SSuyog Pawar /*****************************************************************************/
503*c83a76b0SSuyog Pawar 
504*c83a76b0SSuyog Pawar 
505*c83a76b0SSuyog Pawar typedef struct {
506*c83a76b0SSuyog Pawar 
507*c83a76b0SSuyog Pawar     /**
508*c83a76b0SSuyog Pawar      *  ivd_ctl_getversioninfo_ip_t
509*c83a76b0SSuyog Pawar      */
510*c83a76b0SSuyog Pawar     ivd_ctl_getversioninfo_ip_t         s_ivd_ctl_getversioninfo_ip_t;
511*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getversioninfo_ip_t;
512*c83a76b0SSuyog Pawar 
513*c83a76b0SSuyog Pawar 
514*c83a76b0SSuyog Pawar 
515*c83a76b0SSuyog Pawar typedef struct {
516*c83a76b0SSuyog Pawar 
517*c83a76b0SSuyog Pawar     /**
518*c83a76b0SSuyog Pawar      *  ivd_ctl_getversioninfo_op_t
519*c83a76b0SSuyog Pawar      */
520*c83a76b0SSuyog Pawar     ivd_ctl_getversioninfo_op_t         s_ivd_ctl_getversioninfo_op_t;
521*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_getversioninfo_op_t;
522*c83a76b0SSuyog Pawar 
523*c83a76b0SSuyog Pawar 
524*c83a76b0SSuyog Pawar typedef struct {
525*c83a76b0SSuyog Pawar 
526*c83a76b0SSuyog Pawar     /**
527*c83a76b0SSuyog Pawar      * u4_size
528*c83a76b0SSuyog Pawar      */
529*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
530*c83a76b0SSuyog Pawar 
531*c83a76b0SSuyog Pawar     /**
532*c83a76b0SSuyog Pawar      * cmd
533*c83a76b0SSuyog Pawar      */
534*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
535*c83a76b0SSuyog Pawar 
536*c83a76b0SSuyog Pawar     /**
537*c83a76b0SSuyog Pawar      * sub_cmd
538*c83a76b0SSuyog Pawar      */
539*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
540*c83a76b0SSuyog Pawar 
541*c83a76b0SSuyog Pawar     /**
542*c83a76b0SSuyog Pawar      * Pictures that are are degraded
543*c83a76b0SSuyog Pawar      * 0 : No degrade
544*c83a76b0SSuyog Pawar      * 1 : Only on non-reference frames
545*c83a76b0SSuyog Pawar      * 2 : Use interval specified by u4_nondegrade_interval
546*c83a76b0SSuyog Pawar      * 3 : All non-key frames
547*c83a76b0SSuyog Pawar      * 4 : All frames
548*c83a76b0SSuyog Pawar      */
549*c83a76b0SSuyog Pawar     WORD32                                     i4_degrade_pics;
550*c83a76b0SSuyog Pawar 
551*c83a76b0SSuyog Pawar     /**
552*c83a76b0SSuyog Pawar      * Interval for pictures which are completely decoded without any degradation
553*c83a76b0SSuyog Pawar      */
554*c83a76b0SSuyog Pawar     WORD32                                     i4_nondegrade_interval;
555*c83a76b0SSuyog Pawar 
556*c83a76b0SSuyog Pawar     /**
557*c83a76b0SSuyog Pawar      * bit position (lsb is zero): Type of degradation
558*c83a76b0SSuyog Pawar      * 0 : Disable SAO
559*c83a76b0SSuyog Pawar      * 1 : Disable deblocking
560*c83a76b0SSuyog Pawar      * 2 : Faster inter prediction filters
561*c83a76b0SSuyog Pawar      * 3 : Fastest inter prediction filters
562*c83a76b0SSuyog Pawar      */
563*c83a76b0SSuyog Pawar     WORD32                                     i4_degrade_type;
564*c83a76b0SSuyog Pawar 
565*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_degrade_ip_t;
566*c83a76b0SSuyog Pawar 
567*c83a76b0SSuyog Pawar typedef struct
568*c83a76b0SSuyog Pawar {
569*c83a76b0SSuyog Pawar     /**
570*c83a76b0SSuyog Pawar      * u4_size
571*c83a76b0SSuyog Pawar      */
572*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
573*c83a76b0SSuyog Pawar 
574*c83a76b0SSuyog Pawar     /**
575*c83a76b0SSuyog Pawar      * error_code
576*c83a76b0SSuyog Pawar      */
577*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
578*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_degrade_op_t;
579*c83a76b0SSuyog Pawar 
580*c83a76b0SSuyog Pawar typedef struct
581*c83a76b0SSuyog Pawar {
582*c83a76b0SSuyog Pawar 
583*c83a76b0SSuyog Pawar     /**
584*c83a76b0SSuyog Pawar      * size
585*c83a76b0SSuyog Pawar      */
586*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
587*c83a76b0SSuyog Pawar 
588*c83a76b0SSuyog Pawar     /**
589*c83a76b0SSuyog Pawar      * cmd
590*c83a76b0SSuyog Pawar      */
591*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
592*c83a76b0SSuyog Pawar 
593*c83a76b0SSuyog Pawar     /**
594*c83a76b0SSuyog Pawar      * sub_cmd
595*c83a76b0SSuyog Pawar      */
596*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
597*c83a76b0SSuyog Pawar 
598*c83a76b0SSuyog Pawar     /**
599*c83a76b0SSuyog Pawar      * num_cores
600*c83a76b0SSuyog Pawar      */
601*c83a76b0SSuyog Pawar     UWORD32                                     u4_num_cores;
602*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_num_cores_ip_t;
603*c83a76b0SSuyog Pawar 
604*c83a76b0SSuyog Pawar typedef struct
605*c83a76b0SSuyog Pawar {
606*c83a76b0SSuyog Pawar 
607*c83a76b0SSuyog Pawar     /**
608*c83a76b0SSuyog Pawar      * size
609*c83a76b0SSuyog Pawar      */
610*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
611*c83a76b0SSuyog Pawar 
612*c83a76b0SSuyog Pawar     /**
613*c83a76b0SSuyog Pawar      * error_code
614*c83a76b0SSuyog Pawar      */
615*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
616*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_num_cores_op_t;
617*c83a76b0SSuyog Pawar 
618*c83a76b0SSuyog Pawar typedef struct
619*c83a76b0SSuyog Pawar {
620*c83a76b0SSuyog Pawar     /**
621*c83a76b0SSuyog Pawar      * size
622*c83a76b0SSuyog Pawar      */
623*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
624*c83a76b0SSuyog Pawar     /**
625*c83a76b0SSuyog Pawar      * cmd
626*c83a76b0SSuyog Pawar      */
627*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
628*c83a76b0SSuyog Pawar     /**
629*c83a76b0SSuyog Pawar      * sub cmd
630*c83a76b0SSuyog Pawar      */
631*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
632*c83a76b0SSuyog Pawar     /**
633*c83a76b0SSuyog Pawar      * Processor type
634*c83a76b0SSuyog Pawar      */
635*c83a76b0SSuyog Pawar     UWORD32                                     u4_arch;
636*c83a76b0SSuyog Pawar     /**
637*c83a76b0SSuyog Pawar      * SOC type
638*c83a76b0SSuyog Pawar      */
639*c83a76b0SSuyog Pawar     UWORD32                                     u4_soc;
640*c83a76b0SSuyog Pawar 
641*c83a76b0SSuyog Pawar     /**
642*c83a76b0SSuyog Pawar      * num_cores
643*c83a76b0SSuyog Pawar      */
644*c83a76b0SSuyog Pawar     UWORD32                                     u4_num_cores;
645*c83a76b0SSuyog Pawar 
646*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_processor_ip_t;
647*c83a76b0SSuyog Pawar 
648*c83a76b0SSuyog Pawar typedef struct
649*c83a76b0SSuyog Pawar {
650*c83a76b0SSuyog Pawar     /**
651*c83a76b0SSuyog Pawar      * size
652*c83a76b0SSuyog Pawar      */
653*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
654*c83a76b0SSuyog Pawar     /**
655*c83a76b0SSuyog Pawar      * error_code
656*c83a76b0SSuyog Pawar      */
657*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
658*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_set_processor_op_t;
659*c83a76b0SSuyog Pawar 
660*c83a76b0SSuyog Pawar typedef struct
661*c83a76b0SSuyog Pawar {
662*c83a76b0SSuyog Pawar 
663*c83a76b0SSuyog Pawar     /**
664*c83a76b0SSuyog Pawar      * size
665*c83a76b0SSuyog Pawar      */
666*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
667*c83a76b0SSuyog Pawar 
668*c83a76b0SSuyog Pawar     /**
669*c83a76b0SSuyog Pawar      * cmd
670*c83a76b0SSuyog Pawar      */
671*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
672*c83a76b0SSuyog Pawar 
673*c83a76b0SSuyog Pawar     /**
674*c83a76b0SSuyog Pawar      * sub cmd
675*c83a76b0SSuyog Pawar      */
676*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
677*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_frame_dimensions_ip_t;
678*c83a76b0SSuyog Pawar 
679*c83a76b0SSuyog Pawar 
680*c83a76b0SSuyog Pawar typedef struct {
681*c83a76b0SSuyog Pawar 
682*c83a76b0SSuyog Pawar     /**
683*c83a76b0SSuyog Pawar      * size
684*c83a76b0SSuyog Pawar      */
685*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
686*c83a76b0SSuyog Pawar 
687*c83a76b0SSuyog Pawar     /**
688*c83a76b0SSuyog Pawar      * error_code
689*c83a76b0SSuyog Pawar      */
690*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
691*c83a76b0SSuyog Pawar 
692*c83a76b0SSuyog Pawar     /**
693*c83a76b0SSuyog Pawar      * x_offset[3]
694*c83a76b0SSuyog Pawar      */
695*c83a76b0SSuyog Pawar     UWORD32                                     u4_x_offset[3];
696*c83a76b0SSuyog Pawar 
697*c83a76b0SSuyog Pawar     /**
698*c83a76b0SSuyog Pawar      * y_offset[3]
699*c83a76b0SSuyog Pawar      */
700*c83a76b0SSuyog Pawar     UWORD32                                     u4_y_offset[3];
701*c83a76b0SSuyog Pawar 
702*c83a76b0SSuyog Pawar     /**
703*c83a76b0SSuyog Pawar      * disp_wd[3]
704*c83a76b0SSuyog Pawar      */
705*c83a76b0SSuyog Pawar     UWORD32                                     u4_disp_wd[3];
706*c83a76b0SSuyog Pawar 
707*c83a76b0SSuyog Pawar     /**
708*c83a76b0SSuyog Pawar      * disp_ht[3]
709*c83a76b0SSuyog Pawar      */
710*c83a76b0SSuyog Pawar     UWORD32                                     u4_disp_ht[3];
711*c83a76b0SSuyog Pawar 
712*c83a76b0SSuyog Pawar     /**
713*c83a76b0SSuyog Pawar      * buffer_wd[3]
714*c83a76b0SSuyog Pawar      */
715*c83a76b0SSuyog Pawar     UWORD32                                     u4_buffer_wd[3];
716*c83a76b0SSuyog Pawar 
717*c83a76b0SSuyog Pawar     /**
718*c83a76b0SSuyog Pawar      * buffer_ht[3]
719*c83a76b0SSuyog Pawar      */
720*c83a76b0SSuyog Pawar     UWORD32                                     u4_buffer_ht[3];
721*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_frame_dimensions_op_t;
722*c83a76b0SSuyog Pawar 
723*c83a76b0SSuyog Pawar typedef struct {
724*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
725*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
726*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
727*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_vui_params_ip_t;
728*c83a76b0SSuyog Pawar 
729*c83a76b0SSuyog Pawar typedef struct {
730*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
731*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
732*c83a76b0SSuyog Pawar 
733*c83a76b0SSuyog Pawar     /**
734*c83a76b0SSuyog Pawar     *  indicates the presence of aspect_ratio
735*c83a76b0SSuyog Pawar     */
736*c83a76b0SSuyog Pawar     UWORD8 u1_aspect_ratio_info_present_flag;
737*c83a76b0SSuyog Pawar 
738*c83a76b0SSuyog Pawar     /**
739*c83a76b0SSuyog Pawar     *  specifies the aspect ratio of the luma samples
740*c83a76b0SSuyog Pawar     */
741*c83a76b0SSuyog Pawar     UWORD8 u1_aspect_ratio_idc;
742*c83a76b0SSuyog Pawar 
743*c83a76b0SSuyog Pawar     /**
744*c83a76b0SSuyog Pawar     *  width of the luma samples. user dependent
745*c83a76b0SSuyog Pawar     */
746*c83a76b0SSuyog Pawar     UWORD16 u2_sar_width;
747*c83a76b0SSuyog Pawar 
748*c83a76b0SSuyog Pawar     /**
749*c83a76b0SSuyog Pawar     *  hieght of the luma samples. user dependent
750*c83a76b0SSuyog Pawar     */
751*c83a76b0SSuyog Pawar     UWORD16 u2_sar_height;
752*c83a76b0SSuyog Pawar 
753*c83a76b0SSuyog Pawar     /**
754*c83a76b0SSuyog Pawar     * if 1, specifies that the overscan_appropriate_flag is present
755*c83a76b0SSuyog Pawar     * if 0, the preferred display method for the video signal is unspecified
756*c83a76b0SSuyog Pawar     */
757*c83a76b0SSuyog Pawar     UWORD8 u1_overscan_info_present_flag;
758*c83a76b0SSuyog Pawar 
759*c83a76b0SSuyog Pawar     /**
760*c83a76b0SSuyog Pawar     * if 1,indicates that the cropped decoded pictures output
761*c83a76b0SSuyog Pawar     * are suitable for display using overscan
762*c83a76b0SSuyog Pawar     */
763*c83a76b0SSuyog Pawar     UWORD8 u1_overscan_appropriate_flag;
764*c83a76b0SSuyog Pawar 
765*c83a76b0SSuyog Pawar     /**
766*c83a76b0SSuyog Pawar     * if 1 specifies that video_format, video_full_range_flag and
767*c83a76b0SSuyog Pawar     * colour_description_present_flag are present
768*c83a76b0SSuyog Pawar     */
769*c83a76b0SSuyog Pawar     UWORD8 u1_video_signal_type_present_flag;
770*c83a76b0SSuyog Pawar 
771*c83a76b0SSuyog Pawar     /**
772*c83a76b0SSuyog Pawar     *
773*c83a76b0SSuyog Pawar     */
774*c83a76b0SSuyog Pawar     UWORD8 u1_video_format;
775*c83a76b0SSuyog Pawar 
776*c83a76b0SSuyog Pawar     /**
777*c83a76b0SSuyog Pawar     * indicates the black level and range of the luma and chroma signals
778*c83a76b0SSuyog Pawar     */
779*c83a76b0SSuyog Pawar     UWORD8 u1_video_full_range_flag;
780*c83a76b0SSuyog Pawar 
781*c83a76b0SSuyog Pawar     /**
782*c83a76b0SSuyog Pawar     * if 1,to 1 specifies that colour_primaries, transfer_characteristics
783*c83a76b0SSuyog Pawar     * and matrix_coefficients are present
784*c83a76b0SSuyog Pawar     */
785*c83a76b0SSuyog Pawar     UWORD8 u1_colour_description_present_flag;
786*c83a76b0SSuyog Pawar 
787*c83a76b0SSuyog Pawar     /**
788*c83a76b0SSuyog Pawar     * indicates the chromaticity coordinates of the source primaries
789*c83a76b0SSuyog Pawar     */
790*c83a76b0SSuyog Pawar     UWORD8 u1_colour_primaries;
791*c83a76b0SSuyog Pawar 
792*c83a76b0SSuyog Pawar     /**
793*c83a76b0SSuyog Pawar     * indicates the opto-electronic transfer characteristic of the source picture
794*c83a76b0SSuyog Pawar     */
795*c83a76b0SSuyog Pawar     UWORD8 u1_transfer_characteristics;
796*c83a76b0SSuyog Pawar 
797*c83a76b0SSuyog Pawar     /**
798*c83a76b0SSuyog Pawar     * the matrix coefficients used in deriving luma and chroma signals
799*c83a76b0SSuyog Pawar     * from the green, blue, and red primaries
800*c83a76b0SSuyog Pawar     */
801*c83a76b0SSuyog Pawar     UWORD8 u1_matrix_coefficients;
802*c83a76b0SSuyog Pawar 
803*c83a76b0SSuyog Pawar     /**
804*c83a76b0SSuyog Pawar     * if 1, specifies that chroma_sample_loc_type_top_field and
805*c83a76b0SSuyog Pawar     * chroma_sample_loc_type_bottom_field are present
806*c83a76b0SSuyog Pawar     */
807*c83a76b0SSuyog Pawar     UWORD8 u1_chroma_loc_info_present_flag;
808*c83a76b0SSuyog Pawar 
809*c83a76b0SSuyog Pawar     /**
810*c83a76b0SSuyog Pawar     * location of chroma samples
811*c83a76b0SSuyog Pawar     */
812*c83a76b0SSuyog Pawar     UWORD8 u1_chroma_sample_loc_type_top_field;
813*c83a76b0SSuyog Pawar 
814*c83a76b0SSuyog Pawar     UWORD8 u1_chroma_sample_loc_type_bottom_field;
815*c83a76b0SSuyog Pawar 
816*c83a76b0SSuyog Pawar     /**
817*c83a76b0SSuyog Pawar     * if 1, indicates that the value of all decoded chroma samples is
818*c83a76b0SSuyog Pawar     * equal to 1 << ( BitDepthC - 1 )
819*c83a76b0SSuyog Pawar     */
820*c83a76b0SSuyog Pawar     UWORD8 u1_neutral_chroma_indication_flag;
821*c83a76b0SSuyog Pawar 
822*c83a76b0SSuyog Pawar     /**
823*c83a76b0SSuyog Pawar     *  1 indicates that the coded video sequence conveys pictures that represent fields
824*c83a76b0SSuyog Pawar     *  0 indicates the pictures that represents field
825*c83a76b0SSuyog Pawar     */
826*c83a76b0SSuyog Pawar     UWORD8 u1_field_seq_flag;
827*c83a76b0SSuyog Pawar 
828*c83a76b0SSuyog Pawar     /**
829*c83a76b0SSuyog Pawar     * specifies that picture timing SEI messages are present for every picture
830*c83a76b0SSuyog Pawar     */
831*c83a76b0SSuyog Pawar     UWORD8 u1_frame_field_info_present_flag;
832*c83a76b0SSuyog Pawar 
833*c83a76b0SSuyog Pawar     /**
834*c83a76b0SSuyog Pawar     * 1 indicates that the default display window parameters follow next in the VUI
835*c83a76b0SSuyog Pawar     */
836*c83a76b0SSuyog Pawar     UWORD8 u1_default_display_window_flag;
837*c83a76b0SSuyog Pawar 
838*c83a76b0SSuyog Pawar     /**
839*c83a76b0SSuyog Pawar     * specify the samples of the pictures in the coded video sequence
840*c83a76b0SSuyog Pawar     * that are within the default display window,
841*c83a76b0SSuyog Pawar     * in terms of a rectangular region specified in picture coordinates for display
842*c83a76b0SSuyog Pawar     */
843*c83a76b0SSuyog Pawar     UWORD32 u4_def_disp_win_left_offset;
844*c83a76b0SSuyog Pawar 
845*c83a76b0SSuyog Pawar     UWORD32 u4_def_disp_win_right_offset;
846*c83a76b0SSuyog Pawar 
847*c83a76b0SSuyog Pawar     UWORD32 u4_def_disp_win_top_offset;
848*c83a76b0SSuyog Pawar 
849*c83a76b0SSuyog Pawar     UWORD32 u4_def_disp_win_bottom_offset;
850*c83a76b0SSuyog Pawar 
851*c83a76b0SSuyog Pawar     /**
852*c83a76b0SSuyog Pawar     *  to 1 specifies that the syntax structure hrd_parameters is present in the vui_parameters syntax structue
853*c83a76b0SSuyog Pawar     */
854*c83a76b0SSuyog Pawar     UWORD8 u1_vui_hrd_parameters_present_flag;
855*c83a76b0SSuyog Pawar 
856*c83a76b0SSuyog Pawar     /**
857*c83a76b0SSuyog Pawar     *   Indicates the presence of the
858*c83a76b0SSuyog Pawar     *   num_units_in_ticks, time_scale flag
859*c83a76b0SSuyog Pawar     */
860*c83a76b0SSuyog Pawar     UWORD8 u1_vui_timing_info_present_flag;
861*c83a76b0SSuyog Pawar 
862*c83a76b0SSuyog Pawar     /**
863*c83a76b0SSuyog Pawar     *   Number of units that
864*c83a76b0SSuyog Pawar     *   correspond to one increment of the
865*c83a76b0SSuyog Pawar     *   clock. Indicates the  resolution
866*c83a76b0SSuyog Pawar     */
867*c83a76b0SSuyog Pawar     UWORD32 u4_vui_num_units_in_tick;
868*c83a76b0SSuyog Pawar 
869*c83a76b0SSuyog Pawar     /**
870*c83a76b0SSuyog Pawar     *   The number of time units that pass in one second
871*c83a76b0SSuyog Pawar     */
872*c83a76b0SSuyog Pawar     UWORD32 u4_vui_time_scale;
873*c83a76b0SSuyog Pawar     /**
874*c83a76b0SSuyog Pawar     * if 1, indicates that the POC for each picture in the coded video sequence (cvs) (not the first picture), in decoding order,
875*c83a76b0SSuyog Pawar     * is proportional to the output time of the picture relative to that of the first picture in the cvs
876*c83a76b0SSuyog Pawar     */
877*c83a76b0SSuyog Pawar     UWORD8 u1_poc_proportional_to_timing_flag;
878*c83a76b0SSuyog Pawar 
879*c83a76b0SSuyog Pawar     /**
880*c83a76b0SSuyog Pawar     * num_ticks_poc_diff_one_minus1 plus 1 specifies the number of clock ticks
881*c83a76b0SSuyog Pawar     * corresponding to a difference of poc values equal to 1
882*c83a76b0SSuyog Pawar     */
883*c83a76b0SSuyog Pawar     UWORD32 u4_num_ticks_poc_diff_one_minus1;
884*c83a76b0SSuyog Pawar 
885*c83a76b0SSuyog Pawar     /**
886*c83a76b0SSuyog Pawar     * 1, specifies that the following cvs bitstream restriction parameters are present
887*c83a76b0SSuyog Pawar     */
888*c83a76b0SSuyog Pawar     UWORD8 u1_bitstream_restriction_flag;
889*c83a76b0SSuyog Pawar 
890*c83a76b0SSuyog Pawar     /**
891*c83a76b0SSuyog Pawar     *  if 1, indicates that each pps that is active in the cvs has
892*c83a76b0SSuyog Pawar     *  the same value of the tile syntax elements
893*c83a76b0SSuyog Pawar     */
894*c83a76b0SSuyog Pawar     UWORD8 u1_tiles_fixed_structure_flag;
895*c83a76b0SSuyog Pawar 
896*c83a76b0SSuyog Pawar     /**
897*c83a76b0SSuyog Pawar     * if 0, indicates that no pel outside the pic boundaries and
898*c83a76b0SSuyog Pawar     * no sub-pels derived using pels outside the pic boundaries is used for inter prediction
899*c83a76b0SSuyog Pawar     */
900*c83a76b0SSuyog Pawar     UWORD8 u1_motion_vectors_over_pic_boundaries_flag;
901*c83a76b0SSuyog Pawar 
902*c83a76b0SSuyog Pawar     /**
903*c83a76b0SSuyog Pawar     * if 1, indicates
904*c83a76b0SSuyog Pawar     * all P/B slices belonging to the same pic have an identical refpic list0,
905*c83a76b0SSuyog Pawar     * all B slices that belong to the same picture have an identical refpic list1.
906*c83a76b0SSuyog Pawar     */
907*c83a76b0SSuyog Pawar     UWORD8 u1_restricted_ref_pic_lists_flag;
908*c83a76b0SSuyog Pawar 
909*c83a76b0SSuyog Pawar     /**
910*c83a76b0SSuyog Pawar     *
911*c83a76b0SSuyog Pawar     */
912*c83a76b0SSuyog Pawar     UWORD8 u4_min_spatial_segmentation_idc;
913*c83a76b0SSuyog Pawar     /**
914*c83a76b0SSuyog Pawar     * Indicates a number of bytes not exceeded by the sum of the sizes of the VCL NAL units
915*c83a76b0SSuyog Pawar     * associated with any coded picture
916*c83a76b0SSuyog Pawar     */
917*c83a76b0SSuyog Pawar     UWORD8 u1_max_bytes_per_pic_denom;
918*c83a76b0SSuyog Pawar 
919*c83a76b0SSuyog Pawar     /**
920*c83a76b0SSuyog Pawar     *  Indicates an upper bound for the number of bits of coding_unit() data
921*c83a76b0SSuyog Pawar     */
922*c83a76b0SSuyog Pawar     UWORD8 u1_max_bits_per_mincu_denom;
923*c83a76b0SSuyog Pawar 
924*c83a76b0SSuyog Pawar     /**
925*c83a76b0SSuyog Pawar     * Indicate the maximum absolute value of a decoded horizontal MV component
926*c83a76b0SSuyog Pawar     * in quarter-pel luma units
927*c83a76b0SSuyog Pawar     */
928*c83a76b0SSuyog Pawar     UWORD8 u1_log2_max_mv_length_horizontal;
929*c83a76b0SSuyog Pawar 
930*c83a76b0SSuyog Pawar     /**
931*c83a76b0SSuyog Pawar     * Indicate the maximum absolute value of a decoded vertical MV component
932*c83a76b0SSuyog Pawar     * in quarter-pel luma units
933*c83a76b0SSuyog Pawar     */
934*c83a76b0SSuyog Pawar     UWORD8 u1_log2_max_mv_length_vertical;
935*c83a76b0SSuyog Pawar 
936*c83a76b0SSuyog Pawar     /**
937*c83a76b0SSuyog Pawar      * HRD parameters
938*c83a76b0SSuyog Pawar      */
939*c83a76b0SSuyog Pawar 
940*c83a76b0SSuyog Pawar 
941*c83a76b0SSuyog Pawar     /**
942*c83a76b0SSuyog Pawar     *   Indicates the presence of the
943*c83a76b0SSuyog Pawar     *   num_units_in_ticks, time_scale flag
944*c83a76b0SSuyog Pawar     */
945*c83a76b0SSuyog Pawar     UWORD8 u1_timing_info_present_flag;
946*c83a76b0SSuyog Pawar 
947*c83a76b0SSuyog Pawar     /**
948*c83a76b0SSuyog Pawar     *   Number of units that
949*c83a76b0SSuyog Pawar     *   correspond to one increment of the
950*c83a76b0SSuyog Pawar     *   clock. Indicates the  resolution
951*c83a76b0SSuyog Pawar     */
952*c83a76b0SSuyog Pawar     UWORD32 u4_num_units_in_tick;
953*c83a76b0SSuyog Pawar 
954*c83a76b0SSuyog Pawar     /**
955*c83a76b0SSuyog Pawar     *   The number of time units that pass in one second
956*c83a76b0SSuyog Pawar     */
957*c83a76b0SSuyog Pawar     UWORD32 u4_time_scale;
958*c83a76b0SSuyog Pawar 
959*c83a76b0SSuyog Pawar     /**
960*c83a76b0SSuyog Pawar     * Nal- hrd parameters flag
961*c83a76b0SSuyog Pawar     */
962*c83a76b0SSuyog Pawar     UWORD8 u1_nal_hrd_parameters_present_flag;
963*c83a76b0SSuyog Pawar 
964*c83a76b0SSuyog Pawar     /**
965*c83a76b0SSuyog Pawar     * VCL- hrd parameters flag
966*c83a76b0SSuyog Pawar     */
967*c83a76b0SSuyog Pawar     UWORD8 u1_vcl_hrd_parameters_present_flag;
968*c83a76b0SSuyog Pawar 
969*c83a76b0SSuyog Pawar     /**
970*c83a76b0SSuyog Pawar     * Indicates the presence of NAL-HRD params or VCL_HRD params
971*c83a76b0SSuyog Pawar     * in the bitstream
972*c83a76b0SSuyog Pawar     */
973*c83a76b0SSuyog Pawar     UWORD8 u1_cpbdpb_delays_present_flag;
974*c83a76b0SSuyog Pawar 
975*c83a76b0SSuyog Pawar     /**
976*c83a76b0SSuyog Pawar     * specifies that sub-picture level CPB removal delay parameters are
977*c83a76b0SSuyog Pawar     * present in picture timing SEI messages
978*c83a76b0SSuyog Pawar     */
979*c83a76b0SSuyog Pawar     UWORD8 u1_sub_pic_cpb_params_present_flag;
980*c83a76b0SSuyog Pawar 
981*c83a76b0SSuyog Pawar     /**
982*c83a76b0SSuyog Pawar     * specify the clock sub-tick
983*c83a76b0SSuyog Pawar     * (the minimum interval of time that can be represented in the coded data when sub_pic_cpb_params_present_flag is equal to 1)
984*c83a76b0SSuyog Pawar     */
985*c83a76b0SSuyog Pawar     UWORD8 u1_tick_divisor_minus2;
986*c83a76b0SSuyog Pawar 
987*c83a76b0SSuyog Pawar     /**
988*c83a76b0SSuyog Pawar     * specifies the length, in bits for the du cpb delay syntax in pt_sei
989*c83a76b0SSuyog Pawar     */
990*c83a76b0SSuyog Pawar     UWORD8 u1_du_cpb_removal_delay_increment_length_minus1;
991*c83a76b0SSuyog Pawar 
992*c83a76b0SSuyog Pawar     /**
993*c83a76b0SSuyog Pawar     * Indicates presence of sub_pic_cpb_params in pic timing sei
994*c83a76b0SSuyog Pawar     */
995*c83a76b0SSuyog Pawar     UWORD8 u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
996*c83a76b0SSuyog Pawar 
997*c83a76b0SSuyog Pawar     /**
998*c83a76b0SSuyog Pawar      * Indicates dpb output delay for the du
999*c83a76b0SSuyog Pawar      */
1000*c83a76b0SSuyog Pawar     UWORD8 u1_dpb_output_delay_du_length_minus1;
1001*c83a76b0SSuyog Pawar 
1002*c83a76b0SSuyog Pawar     /**
1003*c83a76b0SSuyog Pawar     * (together with bit_rate_value_minus1) specifies the
1004*c83a76b0SSuyog Pawar     * maximum input bit rate of the i-th CPB
1005*c83a76b0SSuyog Pawar     */
1006*c83a76b0SSuyog Pawar     UWORD8 u4_bit_rate_scale;
1007*c83a76b0SSuyog Pawar 
1008*c83a76b0SSuyog Pawar     /**
1009*c83a76b0SSuyog Pawar     * (together with cpb_size_du_value_minus1) specfies
1010*c83a76b0SSuyog Pawar     * CPB size of the i-th CPB when the CPB operates
1011*c83a76b0SSuyog Pawar     * at the access unit level
1012*c83a76b0SSuyog Pawar     */
1013*c83a76b0SSuyog Pawar     UWORD8 u4_cpb_size_scale;
1014*c83a76b0SSuyog Pawar 
1015*c83a76b0SSuyog Pawar     /**
1016*c83a76b0SSuyog Pawar     * (together with cpb_size_du_value_minus1) specfies
1017*c83a76b0SSuyog Pawar     * CPB size of the i-th CPB when the CPB operates
1018*c83a76b0SSuyog Pawar     * at the sub-picture level
1019*c83a76b0SSuyog Pawar     */
1020*c83a76b0SSuyog Pawar     UWORD8 u4_cpb_size_du_scale;
1021*c83a76b0SSuyog Pawar 
1022*c83a76b0SSuyog Pawar 
1023*c83a76b0SSuyog Pawar     /**
1024*c83a76b0SSuyog Pawar     * specifies the length, in bits for initial cpb delay (nal/vcl)sysntax in bp sei
1025*c83a76b0SSuyog Pawar     */
1026*c83a76b0SSuyog Pawar     UWORD8  u1_initial_cpb_removal_delay_length_minus1;
1027*c83a76b0SSuyog Pawar 
1028*c83a76b0SSuyog Pawar     /**
1029*c83a76b0SSuyog Pawar     * specifies the length, in bits for the au cpb delay syntax in pt_sei
1030*c83a76b0SSuyog Pawar     */
1031*c83a76b0SSuyog Pawar     UWORD8  u1_au_cpb_removal_delay_length_minus1;
1032*c83a76b0SSuyog Pawar 
1033*c83a76b0SSuyog Pawar     /**
1034*c83a76b0SSuyog Pawar     * specifies the length, in bits, of the pic_dpb_output_delay syntax element in the pt SEI message
1035*c83a76b0SSuyog Pawar     */
1036*c83a76b0SSuyog Pawar     UWORD8  u1_dpb_output_delay_length_minus1;
1037*c83a76b0SSuyog Pawar 
1038*c83a76b0SSuyog Pawar     /**
1039*c83a76b0SSuyog Pawar     * if 1, , for the highest temporal sub-layers, the temporal distance between the HRD output times
1040*c83a76b0SSuyog Pawar     *  of consecutive pictures in output order is constrained refer to Table E-6
1041*c83a76b0SSuyog Pawar     */
1042*c83a76b0SSuyog Pawar     UWORD8 au1_fixed_pic_rate_general_flag[6];
1043*c83a76b0SSuyog Pawar 
1044*c83a76b0SSuyog Pawar     UWORD8 au1_fixed_pic_rate_within_cvs_flag[6];
1045*c83a76b0SSuyog Pawar 
1046*c83a76b0SSuyog Pawar     /**
1047*c83a76b0SSuyog Pawar     * if 1, , for the highest temporal sub-layers, the temporal distance (in clock ticks) between the
1048*c83a76b0SSuyog Pawar     * element units that specify HRD output times of consecutive pictures in output order is constrained
1049*c83a76b0SSuyog Pawar     * refer to Table E-6
1050*c83a76b0SSuyog Pawar     */
1051*c83a76b0SSuyog Pawar     UWORD16 au2_elemental_duration_in_tc_minus1[6];
1052*c83a76b0SSuyog Pawar 
1053*c83a76b0SSuyog Pawar     /**
1054*c83a76b0SSuyog Pawar     * specifies the HRD operational mode
1055*c83a76b0SSuyog Pawar     */
1056*c83a76b0SSuyog Pawar     UWORD8 au1_low_delay_hrd_flag[6];
1057*c83a76b0SSuyog Pawar 
1058*c83a76b0SSuyog Pawar     /**
1059*c83a76b0SSuyog Pawar     * 1 specifies the number of alternative CPB specifications in the
1060*c83a76b0SSuyog Pawar     * bitstream of the cvs when HighestTid is equal to i
1061*c83a76b0SSuyog Pawar     */
1062*c83a76b0SSuyog Pawar     UWORD8 au1_cpb_cnt_minus1[6];
1063*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_vui_params_op_t;
1064*c83a76b0SSuyog Pawar 
1065*c83a76b0SSuyog Pawar typedef struct
1066*c83a76b0SSuyog Pawar {
1067*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
1068*c83a76b0SSuyog Pawar     IVD_API_COMMAND_TYPE_T                      e_cmd;
1069*c83a76b0SSuyog Pawar     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
1070*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_sei_mastering_params_ip_t;
1071*c83a76b0SSuyog Pawar 
1072*c83a76b0SSuyog Pawar typedef struct
1073*c83a76b0SSuyog Pawar {
1074*c83a76b0SSuyog Pawar     UWORD32                                     u4_size;
1075*c83a76b0SSuyog Pawar     UWORD32                                     u4_error_code;
1076*c83a76b0SSuyog Pawar 
1077*c83a76b0SSuyog Pawar     /**
1078*c83a76b0SSuyog Pawar      * Array to store the display_primaries_x values
1079*c83a76b0SSuyog Pawar      */
1080*c83a76b0SSuyog Pawar     UWORD16 au2_display_primaries_x[3];
1081*c83a76b0SSuyog Pawar 
1082*c83a76b0SSuyog Pawar     /**
1083*c83a76b0SSuyog Pawar      * Array to store the display_primaries_y values
1084*c83a76b0SSuyog Pawar      */
1085*c83a76b0SSuyog Pawar     UWORD16 au2_display_primaries_y[3];
1086*c83a76b0SSuyog Pawar 
1087*c83a76b0SSuyog Pawar     /**
1088*c83a76b0SSuyog Pawar      * Variable to store the white point x value
1089*c83a76b0SSuyog Pawar      */
1090*c83a76b0SSuyog Pawar     UWORD16 u2_white_point_x;
1091*c83a76b0SSuyog Pawar 
1092*c83a76b0SSuyog Pawar     /**
1093*c83a76b0SSuyog Pawar      * Variable to store the white point y value
1094*c83a76b0SSuyog Pawar      */
1095*c83a76b0SSuyog Pawar     UWORD16 u2_white_point_y;
1096*c83a76b0SSuyog Pawar 
1097*c83a76b0SSuyog Pawar     /**
1098*c83a76b0SSuyog Pawar      * Variable to store the max display mastering luminance value
1099*c83a76b0SSuyog Pawar      */
1100*c83a76b0SSuyog Pawar     UWORD32 u4_max_display_mastering_luminance;
1101*c83a76b0SSuyog Pawar 
1102*c83a76b0SSuyog Pawar     /**
1103*c83a76b0SSuyog Pawar      * Variable to store the min display mastering luminance value
1104*c83a76b0SSuyog Pawar      */
1105*c83a76b0SSuyog Pawar     UWORD32 u4_min_display_mastering_luminance;
1106*c83a76b0SSuyog Pawar 
1107*c83a76b0SSuyog Pawar }ihevcd_cxa_ctl_get_sei_mastering_params_op_t;
1108*c83a76b0SSuyog Pawar 
1109*c83a76b0SSuyog Pawar #ifdef __cplusplus
1110*c83a76b0SSuyog Pawar } /* closing brace for extern "C" */
1111*c83a76b0SSuyog Pawar #endif
1112*c83a76b0SSuyog Pawar #endif /* __IHEVCD_CXA_H__ */
1113