1 /****************************************************************************** 2 * 3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 /** 19 ******************************************************************************* 20 * @file 21 * ihevcd_cxa.h 22 * 23 * @brief 24 * This file contains all the necessary structure and enumeration 25 * definitions needed for the Application Program Interface(API) of the 26 * Ittiam HEVC decoder on Cortex Ax 27 * 28 * @author 29 * Harish 30 * 31 * @remarks 32 * None 33 * 34 ******************************************************************************* 35 */ 36 #ifndef __IHEVCD_CXA_H__ 37 #define __IHEVCD_CXA_H__ 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 #include "iv.h" 42 #include "ivd.h" 43 44 45 /*****************************************************************************/ 46 /* Constant Macros */ 47 /*****************************************************************************/ 48 #define IVD_ERROR_MASK 0xFF 49 50 /*****************************************************************************/ 51 /* Function Macros */ 52 /*****************************************************************************/ 53 #define IS_IVD_CONCEALMENT_APPLIED(x) (x & (1 << IVD_APPLIEDCONCEALMENT)) 54 #define IS_IVD_INSUFFICIENTDATA_ERROR(x) (x & (1 << IVD_INSUFFICIENTDATA)) 55 #define IS_IVD_CORRUPTEDDATA_ERROR(x) (x & (1 << IVD_CORRUPTEDDATA)) 56 #define IS_IVD_CORRUPTEDHEADER_ERROR(x) (x & (1 << IVD_CORRUPTEDHEADER)) 57 #define IS_IVD_UNSUPPORTEDINPUT_ERROR(x) (x & (1 << IVD_UNSUPPORTEDINPUT)) 58 #define IS_IVD_UNSUPPORTEDPARAM_ERROR(x) (x & (1 << IVD_UNSUPPORTEDPARAM)) 59 #define IS_IVD_FATAL_ERROR(x) (x & (1 << IVD_FATALERROR)) 60 #define IS_IVD_INVALID_BITSTREAM_ERROR(x) (x & (1 << IVD_INVALID_BITSTREAM)) 61 #define IS_IVD_INCOMPLETE_BITSTREAM_ERROR(x) (x & (1 << IVD_INCOMPLETE_BITSTREAM)) 62 63 64 /*****************************************************************************/ 65 /* API Function Prototype */ 66 /*****************************************************************************/ 67 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle, 68 void *pv_api_ip, 69 void *pv_api_op); 70 71 /*****************************************************************************/ 72 /* Enums */ 73 /*****************************************************************************/ 74 /* Codec Error codes for HEVC Decoder */ 75 76 77 typedef enum { 78 /** 79 * No error 80 */ 81 IHEVCD_SUCCESS = 0, 82 83 /** 84 * Codec calls done without successful init 85 */ 86 IHEVCD_INIT_NOT_DONE = IVD_DUMMY_ELEMENT_FOR_CODEC_EXTENSIONS, 87 88 89 IHEVCD_CXA_VID_HDR_DEC_NUM_FRM_BUF_NOT_SUFFICIENT, 90 91 /** 92 * Unsupported level passed as an argument 93 */ 94 IHEVCD_LEVEL_UNSUPPORTED, 95 /** 96 * Unsupported number of reference pictures passed as an argument 97 */ 98 IHEVCD_NUM_REF_UNSUPPORTED, 99 /** 100 * Unsupported number of reorder pictures passed as an argument 101 */ 102 IHEVCD_NUM_REORDER_UNSUPPORTED, 103 /** 104 * Unsupported number of extra display pictures passed as an argument 105 */ 106 IHEVCD_NUM_EXTRA_DISP_UNSUPPORTED, 107 /** 108 * Invalid display stride requested. 109 */ 110 IHEVCD_INVALID_DISP_STRD, 111 112 /** 113 * Reached end of sequence 114 */ 115 IHEVCD_END_OF_SEQUENCE, 116 117 /** 118 * Width/height greater than max width and max height 119 */ 120 IHEVCD_UNSUPPORTED_DIMENSIONS, 121 122 /** 123 * Buffer size to hold version string is not sufficient 124 * Allocate more to hold version string 125 */ 126 IHEVCD_CXA_VERS_BUF_INSUFFICIENT, 127 /** 128 * Stream chroma format other than YUV420 129 */ 130 IHEVCD_UNSUPPORTED_CHROMA_FMT_IDC, 131 132 /** 133 * Frame info output buffer null 134 */ 135 IHEVCD_FRAME_INFO_OP_BUF_NULL, 136 137 /** 138 * Frame info insufficient buffer 139 */ 140 IHEVCD_INSUFFICIENT_METADATA_BUFFER, 141 142 /** 143 * Generic failure 144 */ 145 IHEVCD_FAIL = 0x7FFFFFFF 146 147 148 }IHEVCD_CXA_ERROR_CODES_T; 149 150 /*****************************************************************************/ 151 /* Extended Structures */ 152 /*****************************************************************************/ 153 154 155 /*****************************************************************************/ 156 /* Delete Codec */ 157 /*****************************************************************************/ 158 159 typedef struct { 160 ivd_delete_ip_t s_ivd_delete_ip_t; 161 }ihevcd_cxa_delete_ip_t; 162 163 164 typedef struct { 165 ivd_delete_op_t s_ivd_delete_op_t; 166 }ihevcd_cxa_delete_op_t; 167 168 /*****************************************************************************/ 169 /* Initialize decoder */ 170 /*****************************************************************************/ 171 172 typedef struct { 173 ivd_create_ip_t s_ivd_create_ip_t; 174 175 /** 176 * enable_frm_info 177 */ 178 UWORD32 u4_enable_frame_info; 179 180 /** 181 * enable_threads 182 */ 183 UWORD32 u4_keep_threads_active; 184 }ihevcd_cxa_create_ip_t; 185 186 187 typedef struct { 188 ivd_create_op_t s_ivd_create_op_t; 189 }ihevcd_cxa_create_op_t; 190 191 /*****************************************************************************/ 192 /* Video Decode */ 193 /*****************************************************************************/ 194 195 typedef struct { 196 197 /** 198 * ivd_video_decode_ip_t 199 */ 200 ivd_video_decode_ip_t s_ivd_video_decode_ip_t; 201 202 /** 203 * 8x8 block QP map 204 */ 205 UWORD8 *pu1_8x8_blk_qp_map; 206 207 /** 208 * 8x8 block type map 209 */ 210 UWORD8 *pu1_8x8_blk_type_map; 211 212 /** 213 * 8x8 block QP map size 214 */ 215 UWORD32 u4_8x8_blk_qp_map_size; 216 217 /** 218 * 8x8 block type map size 219 */ 220 UWORD32 u4_8x8_blk_type_map_size; 221 }ihevcd_cxa_video_decode_ip_t; 222 223 /*********************************************************************************/ 224 /* QP and CU/Block type maps are defined for each 8x8 coding unit. */ 225 /* QP can range from <1, 51> and block type can be INTER/INTRA/SKIP. */ 226 /* */ 227 /* A frame with a resolution of WdxHt has a total of */ 228 /* (align8(Wd) x align8(Ht)) / 64 entries for QP and Block type map each. */ 229 /* */ 230 /* For example, for a frame of size 60x60 shown in the figure down, both */ 231 /* maps (QP and Block type) have the same layout. */ 232 /* Each block represents an 8x8 sub-block. Both width and height are aligned to */ 233 /* next largest multiple of 8, 64 in this case. */ 234 /* */ 235 /* 0 8 16 24 32 40 48 56 64 */ 236 /* 0 ------------------------------------------------ */ 237 /* | 0th | 1st | 2nd | 3rd | 4th | 5th | 6th | 7th | */ 238 /* 8 ------------------------------------------------ */ 239 /* | 8th | 9th | 10th | - | - | - | - | - | */ 240 /* 16 ------------------------------------------------ */ 241 /* | - | - | - | - | - | - | - | - | */ 242 /* 24 ------------------------------------------------ */ 243 /* | - | - | - | - | - | - | - | - | */ 244 /* 32 ------------------------------------------------ */ 245 /* | - | - | - | - | - | - | - | - | */ 246 /* 40 ------------------------------------------------ */ 247 /* | - | - | - | - | - | - | - | - | */ 248 /* 48 ------------------------------------------------ */ 249 /* | - | - | - | - | - | - | - | - | */ 250 /* 56 ------------------------------------------------ */ 251 /* | - | - | - | - | - | - | - | - | */ 252 /* 64 ------------------------------------------------ */ 253 /* */ 254 /*********************************************************************************/ 255 256 typedef struct { 257 258 /** 259 * ivd_video_decode_op_t 260 */ 261 ivd_video_decode_op_t s_ivd_video_decode_op_t; 262 263 /** 264 * 8x8 block QP map 265 */ 266 UWORD8 *pu1_8x8_blk_qp_map; 267 268 /** 269 * 8x8 block type map 270 */ 271 UWORD8 *pu1_8x8_blk_type_map; 272 273 /** 274 * 8x8 block QP map size 275 */ 276 UWORD32 u4_8x8_blk_qp_map_size; 277 278 /** 279 * 8x8 block type map size 280 */ 281 UWORD32 u4_8x8_blk_type_map_size; 282 }ihevcd_cxa_video_decode_op_t; 283 284 285 /*****************************************************************************/ 286 /* Get Display Frame */ 287 /*****************************************************************************/ 288 289 typedef struct 290 { 291 /** 292 * ivd_get_display_frame_ip_t 293 */ 294 ivd_get_display_frame_ip_t s_ivd_get_display_frame_ip_t; 295 }ihevcd_cxa_get_display_frame_ip_t; 296 297 298 typedef struct 299 { 300 /** 301 * ivd_get_display_frame_op_t 302 */ 303 ivd_get_display_frame_op_t s_ivd_get_display_frame_op_t; 304 }ihevcd_cxa_get_display_frame_op_t; 305 306 /*****************************************************************************/ 307 /* Set Display Frame */ 308 /*****************************************************************************/ 309 310 311 typedef struct 312 { 313 /** 314 * ivd_set_display_frame_ip_t 315 */ 316 ivd_set_display_frame_ip_t s_ivd_set_display_frame_ip_t; 317 }ihevcd_cxa_set_display_frame_ip_t; 318 319 320 typedef struct 321 { 322 /** 323 * ivd_set_display_frame_op_t 324 */ 325 ivd_set_display_frame_op_t s_ivd_set_display_frame_op_t; 326 }ihevcd_cxa_set_display_frame_op_t; 327 328 /*****************************************************************************/ 329 /* Release Display Buffers */ 330 /*****************************************************************************/ 331 332 333 typedef struct 334 { 335 /** 336 * ivd_rel_display_frame_ip_t 337 */ 338 339 ivd_rel_display_frame_ip_t s_ivd_rel_display_frame_ip_t; 340 }ihevcd_cxa_rel_display_frame_ip_t; 341 342 343 typedef struct 344 { 345 /** 346 * ivd_rel_display_frame_op_t 347 */ 348 ivd_rel_display_frame_op_t s_ivd_rel_display_frame_op_t; 349 }ihevcd_cxa_rel_display_frame_op_t; 350 351 352 typedef enum 353 { 354 /** Set number of cores/threads to be used */ 355 IHEVCD_CXA_CMD_CTL_SET_NUM_CORES = IVD_CMD_CTL_CODEC_SUBCMD_START, 356 357 /** Set processor details */ 358 IHEVCD_CXA_CMD_CTL_SET_PROCESSOR = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x001, 359 360 /** Get display buffer dimensions */ 361 IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x100, 362 363 /** Get VUI parameters */ 364 IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x101, 365 366 /** Get SEI Mastering display color volume parameters */ 367 IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x102, 368 369 /** Enable/disable GPU, supported on select platforms */ 370 IHEVCD_CXA_CMD_CTL_GPU_ENABLE_DISABLE = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x200, 371 372 /** Set degrade level */ 373 IHEVCD_CXA_CMD_CTL_DEGRADE = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x300 374 }IHEVCD_CXA_CMD_CTL_SUB_CMDS; 375 /*****************************************************************************/ 376 /* Video control Flush */ 377 /*****************************************************************************/ 378 379 380 typedef struct { 381 382 /** 383 * ivd_ctl_flush_ip_t 384 */ 385 ivd_ctl_flush_ip_t s_ivd_ctl_flush_ip_t; 386 }ihevcd_cxa_ctl_flush_ip_t; 387 388 389 typedef struct { 390 391 /** 392 * ivd_ctl_flush_op_t 393 */ 394 ivd_ctl_flush_op_t s_ivd_ctl_flush_op_t; 395 }ihevcd_cxa_ctl_flush_op_t; 396 397 /*****************************************************************************/ 398 /* Video control reset */ 399 /*****************************************************************************/ 400 401 402 typedef struct { 403 404 /** 405 * ivd_ctl_reset_ip_t 406 */ 407 ivd_ctl_reset_ip_t s_ivd_ctl_reset_ip_t; 408 }ihevcd_cxa_ctl_reset_ip_t; 409 410 411 typedef struct { 412 413 /** 414 * ivd_ctl_reset_op_t 415 */ 416 ivd_ctl_reset_op_t s_ivd_ctl_reset_op_t; 417 }ihevcd_cxa_ctl_reset_op_t; 418 419 420 /*****************************************************************************/ 421 /* Video control Set Params */ 422 /*****************************************************************************/ 423 424 425 typedef struct { 426 427 /** 428 * ivd_ctl_set_config_ip_t 429 */ 430 ivd_ctl_set_config_ip_t s_ivd_ctl_set_config_ip_t; 431 }ihevcd_cxa_ctl_set_config_ip_t; 432 433 434 typedef struct { 435 436 /** 437 * ivd_ctl_set_config_op_t 438 */ 439 ivd_ctl_set_config_op_t s_ivd_ctl_set_config_op_t; 440 }ihevcd_cxa_ctl_set_config_op_t; 441 442 /*****************************************************************************/ 443 /* Video control:Get Buf Info */ 444 /*****************************************************************************/ 445 446 447 typedef struct { 448 449 /** 450 * ivd_ctl_getbufinfo_ip_t 451 */ 452 ivd_ctl_getbufinfo_ip_t s_ivd_ctl_getbufinfo_ip_t; 453 }ihevcd_cxa_ctl_getbufinfo_ip_t; 454 455 456 457 typedef struct { 458 459 /** 460 * ivd_ctl_getbufinfo_op_t 461 */ 462 ivd_ctl_getbufinfo_op_t s_ivd_ctl_getbufinfo_op_t; 463 }ihevcd_cxa_ctl_getbufinfo_op_t; 464 465 466 /*****************************************************************************/ 467 /* Video control:Getstatus Call */ 468 /*****************************************************************************/ 469 470 471 typedef struct { 472 473 /** 474 * ivd_ctl_getstatus_ip_t 475 */ 476 ivd_ctl_getstatus_ip_t s_ivd_ctl_getstatus_ip_t; 477 }ihevcd_cxa_ctl_getstatus_ip_t; 478 479 480 481 typedef struct { 482 483 /** 484 * ivd_ctl_getstatus_op_t 485 */ 486 ivd_ctl_getstatus_op_t s_ivd_ctl_getstatus_op_t; 487 488 /** 489 * Height of the coding picture without cropping 490 */ 491 UWORD32 u4_coded_pic_ht; 492 493 /** 494 * Width of the coding picture without cropping 495 */ 496 UWORD32 u4_coded_pic_wd; 497 }ihevcd_cxa_ctl_getstatus_op_t; 498 499 500 /*****************************************************************************/ 501 /* Video control:Get Version Info */ 502 /*****************************************************************************/ 503 504 505 typedef struct { 506 507 /** 508 * ivd_ctl_getversioninfo_ip_t 509 */ 510 ivd_ctl_getversioninfo_ip_t s_ivd_ctl_getversioninfo_ip_t; 511 }ihevcd_cxa_ctl_getversioninfo_ip_t; 512 513 514 515 typedef struct { 516 517 /** 518 * ivd_ctl_getversioninfo_op_t 519 */ 520 ivd_ctl_getversioninfo_op_t s_ivd_ctl_getversioninfo_op_t; 521 }ihevcd_cxa_ctl_getversioninfo_op_t; 522 523 524 typedef struct { 525 526 /** 527 * u4_size 528 */ 529 UWORD32 u4_size; 530 531 /** 532 * cmd 533 */ 534 IVD_API_COMMAND_TYPE_T e_cmd; 535 536 /** 537 * sub_cmd 538 */ 539 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 540 541 /** 542 * Pictures that are are degraded 543 * 0 : No degrade 544 * 1 : Only on non-reference frames 545 * 2 : Use interval specified by u4_nondegrade_interval 546 * 3 : All non-key frames 547 * 4 : All frames 548 */ 549 WORD32 i4_degrade_pics; 550 551 /** 552 * Interval for pictures which are completely decoded without any degradation 553 */ 554 WORD32 i4_nondegrade_interval; 555 556 /** 557 * bit position (lsb is zero): Type of degradation 558 * 0 : Disable SAO 559 * 1 : Disable deblocking 560 * 2 : Faster inter prediction filters 561 * 3 : Fastest inter prediction filters 562 */ 563 WORD32 i4_degrade_type; 564 565 }ihevcd_cxa_ctl_degrade_ip_t; 566 567 typedef struct 568 { 569 /** 570 * u4_size 571 */ 572 UWORD32 u4_size; 573 574 /** 575 * error_code 576 */ 577 UWORD32 u4_error_code; 578 }ihevcd_cxa_ctl_degrade_op_t; 579 580 typedef struct 581 { 582 583 /** 584 * size 585 */ 586 UWORD32 u4_size; 587 588 /** 589 * cmd 590 */ 591 IVD_API_COMMAND_TYPE_T e_cmd; 592 593 /** 594 * sub_cmd 595 */ 596 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 597 598 /** 599 * num_cores 600 */ 601 UWORD32 u4_num_cores; 602 }ihevcd_cxa_ctl_set_num_cores_ip_t; 603 604 typedef struct 605 { 606 607 /** 608 * size 609 */ 610 UWORD32 u4_size; 611 612 /** 613 * error_code 614 */ 615 UWORD32 u4_error_code; 616 }ihevcd_cxa_ctl_set_num_cores_op_t; 617 618 typedef struct 619 { 620 /** 621 * size 622 */ 623 UWORD32 u4_size; 624 /** 625 * cmd 626 */ 627 IVD_API_COMMAND_TYPE_T e_cmd; 628 /** 629 * sub cmd 630 */ 631 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 632 /** 633 * Processor type 634 */ 635 UWORD32 u4_arch; 636 /** 637 * SOC type 638 */ 639 UWORD32 u4_soc; 640 641 /** 642 * num_cores 643 */ 644 UWORD32 u4_num_cores; 645 646 }ihevcd_cxa_ctl_set_processor_ip_t; 647 648 typedef struct 649 { 650 /** 651 * size 652 */ 653 UWORD32 u4_size; 654 /** 655 * error_code 656 */ 657 UWORD32 u4_error_code; 658 }ihevcd_cxa_ctl_set_processor_op_t; 659 660 typedef struct 661 { 662 663 /** 664 * size 665 */ 666 UWORD32 u4_size; 667 668 /** 669 * cmd 670 */ 671 IVD_API_COMMAND_TYPE_T e_cmd; 672 673 /** 674 * sub cmd 675 */ 676 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 677 }ihevcd_cxa_ctl_get_frame_dimensions_ip_t; 678 679 680 typedef struct { 681 682 /** 683 * size 684 */ 685 UWORD32 u4_size; 686 687 /** 688 * error_code 689 */ 690 UWORD32 u4_error_code; 691 692 /** 693 * x_offset[3] 694 */ 695 UWORD32 u4_x_offset[3]; 696 697 /** 698 * y_offset[3] 699 */ 700 UWORD32 u4_y_offset[3]; 701 702 /** 703 * disp_wd[3] 704 */ 705 UWORD32 u4_disp_wd[3]; 706 707 /** 708 * disp_ht[3] 709 */ 710 UWORD32 u4_disp_ht[3]; 711 712 /** 713 * buffer_wd[3] 714 */ 715 UWORD32 u4_buffer_wd[3]; 716 717 /** 718 * buffer_ht[3] 719 */ 720 UWORD32 u4_buffer_ht[3]; 721 }ihevcd_cxa_ctl_get_frame_dimensions_op_t; 722 723 typedef struct { 724 UWORD32 u4_size; 725 IVD_API_COMMAND_TYPE_T e_cmd; 726 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 727 }ihevcd_cxa_ctl_get_vui_params_ip_t; 728 729 typedef struct { 730 UWORD32 u4_size; 731 UWORD32 u4_error_code; 732 733 /** 734 * indicates the presence of aspect_ratio 735 */ 736 UWORD8 u1_aspect_ratio_info_present_flag; 737 738 /** 739 * specifies the aspect ratio of the luma samples 740 */ 741 UWORD8 u1_aspect_ratio_idc; 742 743 /** 744 * width of the luma samples. user dependent 745 */ 746 UWORD16 u2_sar_width; 747 748 /** 749 * hieght of the luma samples. user dependent 750 */ 751 UWORD16 u2_sar_height; 752 753 /** 754 * if 1, specifies that the overscan_appropriate_flag is present 755 * if 0, the preferred display method for the video signal is unspecified 756 */ 757 UWORD8 u1_overscan_info_present_flag; 758 759 /** 760 * if 1,indicates that the cropped decoded pictures output 761 * are suitable for display using overscan 762 */ 763 UWORD8 u1_overscan_appropriate_flag; 764 765 /** 766 * if 1 specifies that video_format, video_full_range_flag and 767 * colour_description_present_flag are present 768 */ 769 UWORD8 u1_video_signal_type_present_flag; 770 771 /** 772 * 773 */ 774 UWORD8 u1_video_format; 775 776 /** 777 * indicates the black level and range of the luma and chroma signals 778 */ 779 UWORD8 u1_video_full_range_flag; 780 781 /** 782 * if 1,to 1 specifies that colour_primaries, transfer_characteristics 783 * and matrix_coefficients are present 784 */ 785 UWORD8 u1_colour_description_present_flag; 786 787 /** 788 * indicates the chromaticity coordinates of the source primaries 789 */ 790 UWORD8 u1_colour_primaries; 791 792 /** 793 * indicates the opto-electronic transfer characteristic of the source picture 794 */ 795 UWORD8 u1_transfer_characteristics; 796 797 /** 798 * the matrix coefficients used in deriving luma and chroma signals 799 * from the green, blue, and red primaries 800 */ 801 UWORD8 u1_matrix_coefficients; 802 803 /** 804 * if 1, specifies that chroma_sample_loc_type_top_field and 805 * chroma_sample_loc_type_bottom_field are present 806 */ 807 UWORD8 u1_chroma_loc_info_present_flag; 808 809 /** 810 * location of chroma samples 811 */ 812 UWORD8 u1_chroma_sample_loc_type_top_field; 813 814 UWORD8 u1_chroma_sample_loc_type_bottom_field; 815 816 /** 817 * if 1, indicates that the value of all decoded chroma samples is 818 * equal to 1 << ( BitDepthC - 1 ) 819 */ 820 UWORD8 u1_neutral_chroma_indication_flag; 821 822 /** 823 * 1 indicates that the coded video sequence conveys pictures that represent fields 824 * 0 indicates the pictures that represents field 825 */ 826 UWORD8 u1_field_seq_flag; 827 828 /** 829 * specifies that picture timing SEI messages are present for every picture 830 */ 831 UWORD8 u1_frame_field_info_present_flag; 832 833 /** 834 * 1 indicates that the default display window parameters follow next in the VUI 835 */ 836 UWORD8 u1_default_display_window_flag; 837 838 /** 839 * specify the samples of the pictures in the coded video sequence 840 * that are within the default display window, 841 * in terms of a rectangular region specified in picture coordinates for display 842 */ 843 UWORD32 u4_def_disp_win_left_offset; 844 845 UWORD32 u4_def_disp_win_right_offset; 846 847 UWORD32 u4_def_disp_win_top_offset; 848 849 UWORD32 u4_def_disp_win_bottom_offset; 850 851 /** 852 * to 1 specifies that the syntax structure hrd_parameters is present in the vui_parameters syntax structue 853 */ 854 UWORD8 u1_vui_hrd_parameters_present_flag; 855 856 /** 857 * Indicates the presence of the 858 * num_units_in_ticks, time_scale flag 859 */ 860 UWORD8 u1_vui_timing_info_present_flag; 861 862 /** 863 * Number of units that 864 * correspond to one increment of the 865 * clock. Indicates the resolution 866 */ 867 UWORD32 u4_vui_num_units_in_tick; 868 869 /** 870 * The number of time units that pass in one second 871 */ 872 UWORD32 u4_vui_time_scale; 873 /** 874 * if 1, indicates that the POC for each picture in the coded video sequence (cvs) (not the first picture), in decoding order, 875 * is proportional to the output time of the picture relative to that of the first picture in the cvs 876 */ 877 UWORD8 u1_poc_proportional_to_timing_flag; 878 879 /** 880 * num_ticks_poc_diff_one_minus1 plus 1 specifies the number of clock ticks 881 * corresponding to a difference of poc values equal to 1 882 */ 883 UWORD32 u4_num_ticks_poc_diff_one_minus1; 884 885 /** 886 * 1, specifies that the following cvs bitstream restriction parameters are present 887 */ 888 UWORD8 u1_bitstream_restriction_flag; 889 890 /** 891 * if 1, indicates that each pps that is active in the cvs has 892 * the same value of the tile syntax elements 893 */ 894 UWORD8 u1_tiles_fixed_structure_flag; 895 896 /** 897 * if 0, indicates that no pel outside the pic boundaries and 898 * no sub-pels derived using pels outside the pic boundaries is used for inter prediction 899 */ 900 UWORD8 u1_motion_vectors_over_pic_boundaries_flag; 901 902 /** 903 * if 1, indicates 904 * all P/B slices belonging to the same pic have an identical refpic list0, 905 * all B slices that belong to the same picture have an identical refpic list1. 906 */ 907 UWORD8 u1_restricted_ref_pic_lists_flag; 908 909 /** 910 * 911 */ 912 UWORD8 u4_min_spatial_segmentation_idc; 913 /** 914 * Indicates a number of bytes not exceeded by the sum of the sizes of the VCL NAL units 915 * associated with any coded picture 916 */ 917 UWORD8 u1_max_bytes_per_pic_denom; 918 919 /** 920 * Indicates an upper bound for the number of bits of coding_unit() data 921 */ 922 UWORD8 u1_max_bits_per_mincu_denom; 923 924 /** 925 * Indicate the maximum absolute value of a decoded horizontal MV component 926 * in quarter-pel luma units 927 */ 928 UWORD8 u1_log2_max_mv_length_horizontal; 929 930 /** 931 * Indicate the maximum absolute value of a decoded vertical MV component 932 * in quarter-pel luma units 933 */ 934 UWORD8 u1_log2_max_mv_length_vertical; 935 936 /** 937 * HRD parameters 938 */ 939 940 941 /** 942 * Indicates the presence of the 943 * num_units_in_ticks, time_scale flag 944 */ 945 UWORD8 u1_timing_info_present_flag; 946 947 /** 948 * Number of units that 949 * correspond to one increment of the 950 * clock. Indicates the resolution 951 */ 952 UWORD32 u4_num_units_in_tick; 953 954 /** 955 * The number of time units that pass in one second 956 */ 957 UWORD32 u4_time_scale; 958 959 /** 960 * Nal- hrd parameters flag 961 */ 962 UWORD8 u1_nal_hrd_parameters_present_flag; 963 964 /** 965 * VCL- hrd parameters flag 966 */ 967 UWORD8 u1_vcl_hrd_parameters_present_flag; 968 969 /** 970 * Indicates the presence of NAL-HRD params or VCL_HRD params 971 * in the bitstream 972 */ 973 UWORD8 u1_cpbdpb_delays_present_flag; 974 975 /** 976 * specifies that sub-picture level CPB removal delay parameters are 977 * present in picture timing SEI messages 978 */ 979 UWORD8 u1_sub_pic_cpb_params_present_flag; 980 981 /** 982 * specify the clock sub-tick 983 * (the minimum interval of time that can be represented in the coded data when sub_pic_cpb_params_present_flag is equal to 1) 984 */ 985 UWORD8 u1_tick_divisor_minus2; 986 987 /** 988 * specifies the length, in bits for the du cpb delay syntax in pt_sei 989 */ 990 UWORD8 u1_du_cpb_removal_delay_increment_length_minus1; 991 992 /** 993 * Indicates presence of sub_pic_cpb_params in pic timing sei 994 */ 995 UWORD8 u1_sub_pic_cpb_params_in_pic_timing_sei_flag; 996 997 /** 998 * Indicates dpb output delay for the du 999 */ 1000 UWORD8 u1_dpb_output_delay_du_length_minus1; 1001 1002 /** 1003 * (together with bit_rate_value_minus1) specifies the 1004 * maximum input bit rate of the i-th CPB 1005 */ 1006 UWORD8 u4_bit_rate_scale; 1007 1008 /** 1009 * (together with cpb_size_du_value_minus1) specfies 1010 * CPB size of the i-th CPB when the CPB operates 1011 * at the access unit level 1012 */ 1013 UWORD8 u4_cpb_size_scale; 1014 1015 /** 1016 * (together with cpb_size_du_value_minus1) specfies 1017 * CPB size of the i-th CPB when the CPB operates 1018 * at the sub-picture level 1019 */ 1020 UWORD8 u4_cpb_size_du_scale; 1021 1022 1023 /** 1024 * specifies the length, in bits for initial cpb delay (nal/vcl)sysntax in bp sei 1025 */ 1026 UWORD8 u1_initial_cpb_removal_delay_length_minus1; 1027 1028 /** 1029 * specifies the length, in bits for the au cpb delay syntax in pt_sei 1030 */ 1031 UWORD8 u1_au_cpb_removal_delay_length_minus1; 1032 1033 /** 1034 * specifies the length, in bits, of the pic_dpb_output_delay syntax element in the pt SEI message 1035 */ 1036 UWORD8 u1_dpb_output_delay_length_minus1; 1037 1038 /** 1039 * if 1, , for the highest temporal sub-layers, the temporal distance between the HRD output times 1040 * of consecutive pictures in output order is constrained refer to Table E-6 1041 */ 1042 UWORD8 au1_fixed_pic_rate_general_flag[6]; 1043 1044 UWORD8 au1_fixed_pic_rate_within_cvs_flag[6]; 1045 1046 /** 1047 * if 1, , for the highest temporal sub-layers, the temporal distance (in clock ticks) between the 1048 * element units that specify HRD output times of consecutive pictures in output order is constrained 1049 * refer to Table E-6 1050 */ 1051 UWORD16 au2_elemental_duration_in_tc_minus1[6]; 1052 1053 /** 1054 * specifies the HRD operational mode 1055 */ 1056 UWORD8 au1_low_delay_hrd_flag[6]; 1057 1058 /** 1059 * 1 specifies the number of alternative CPB specifications in the 1060 * bitstream of the cvs when HighestTid is equal to i 1061 */ 1062 UWORD8 au1_cpb_cnt_minus1[6]; 1063 }ihevcd_cxa_ctl_get_vui_params_op_t; 1064 1065 typedef struct 1066 { 1067 UWORD32 u4_size; 1068 IVD_API_COMMAND_TYPE_T e_cmd; 1069 IVD_CONTROL_API_COMMAND_TYPE_T e_sub_cmd; 1070 }ihevcd_cxa_ctl_get_sei_mastering_params_ip_t; 1071 1072 typedef struct 1073 { 1074 UWORD32 u4_size; 1075 UWORD32 u4_error_code; 1076 1077 /** 1078 * Array to store the display_primaries_x values 1079 */ 1080 UWORD16 au2_display_primaries_x[3]; 1081 1082 /** 1083 * Array to store the display_primaries_y values 1084 */ 1085 UWORD16 au2_display_primaries_y[3]; 1086 1087 /** 1088 * Variable to store the white point x value 1089 */ 1090 UWORD16 u2_white_point_x; 1091 1092 /** 1093 * Variable to store the white point y value 1094 */ 1095 UWORD16 u2_white_point_y; 1096 1097 /** 1098 * Variable to store the max display mastering luminance value 1099 */ 1100 UWORD32 u4_max_display_mastering_luminance; 1101 1102 /** 1103 * Variable to store the min display mastering luminance value 1104 */ 1105 UWORD32 u4_min_display_mastering_luminance; 1106 1107 }ihevcd_cxa_ctl_get_sei_mastering_params_op_t; 1108 1109 #ifdef __cplusplus 1110 } /* closing brace for extern "C" */ 1111 #endif 1112 #endif /* __IHEVCD_CXA_H__ */ 1113