1drm_intel_bo_alloc 2drm_intel_bo_alloc_for_render 3drm_intel_bo_alloc_tiled 4drm_intel_bo_alloc_userptr 5drm_intel_bo_busy 6drm_intel_bo_disable_reuse 7drm_intel_bo_emit_reloc 8drm_intel_bo_emit_reloc_fence 9drm_intel_bo_exec 10drm_intel_bo_fake_alloc_static 11drm_intel_bo_fake_disable_backing_store 12drm_intel_bo_flink 13drm_intel_bo_gem_create_from_name 14drm_intel_bo_gem_create_from_prime 15drm_intel_bo_gem_export_to_prime 16drm_intel_bo_get_subdata 17drm_intel_bo_get_tiling 18drm_intel_bo_is_reusable 19drm_intel_bo_madvise 20drm_intel_bo_map 21drm_intel_bo_mrb_exec 22drm_intel_bo_pin 23drm_intel_bo_reference 24drm_intel_bo_references 25drm_intel_bo_set_softpin_offset 26drm_intel_bo_set_tiling 27drm_intel_bo_subdata 28drm_intel_bo_unmap 29drm_intel_bo_unpin 30drm_intel_bo_unreference 31drm_intel_bo_use_48b_address_range 32drm_intel_bo_wait_rendering 33drm_intel_bufmgr_check_aperture_space 34drm_intel_bufmgr_destroy 35drm_intel_bufmgr_fake_contended_lock_take 36drm_intel_bufmgr_fake_evict_all 37drm_intel_bufmgr_fake_init 38drm_intel_bufmgr_fake_set_exec_callback 39drm_intel_bufmgr_fake_set_fence_callback 40drm_intel_bufmgr_fake_set_last_dispatch 41drm_intel_bufmgr_gem_can_disable_implicit_sync 42drm_intel_bufmgr_gem_enable_fenced_relocs 43drm_intel_bufmgr_gem_enable_reuse 44drm_intel_bufmgr_gem_get_devid 45drm_intel_bufmgr_gem_init 46drm_intel_bufmgr_gem_set_aub_annotations 47drm_intel_bufmgr_gem_set_aub_dump 48drm_intel_bufmgr_gem_set_aub_filename 49drm_intel_bufmgr_gem_set_vma_cache_size 50drm_intel_bufmgr_set_debug 51drm_intel_decode 52drm_intel_decode_context_alloc 53drm_intel_decode_context_free 54drm_intel_decode_set_batch_pointer 55drm_intel_decode_set_dump_past_end 56drm_intel_decode_set_head_tail 57drm_intel_decode_set_output_file 58drm_intel_gem_bo_aub_dump_bmp 59drm_intel_gem_bo_clear_relocs 60drm_intel_gem_bo_context_exec 61drm_intel_gem_bo_disable_implicit_sync 62drm_intel_gem_bo_enable_implicit_sync 63drm_intel_gem_bo_fence_exec 64drm_intel_gem_bo_get_reloc_count 65drm_intel_gem_bo_map__cpu 66drm_intel_gem_bo_map__gtt 67drm_intel_gem_bo_map__wc 68drm_intel_gem_bo_map_gtt 69drm_intel_gem_bo_map_unsynchronized 70drm_intel_gem_bo_start_gtt_access 71drm_intel_gem_bo_unmap_gtt 72drm_intel_gem_bo_wait 73drm_intel_gem_context_create 74drm_intel_gem_context_destroy 75drm_intel_gem_context_get_id 76drm_intel_get_aperture_sizes 77drm_intel_get_eu_total 78drm_intel_get_min_eu_in_pool 79drm_intel_get_pipe_from_crtc_id 80drm_intel_get_pooled_eu 81drm_intel_get_reset_stats 82drm_intel_get_subslice_total 83drm_intel_reg_read 84