xref: /aosp_15_r20/external/libdav1d/src/riscv/64/cpu.S (revision c09093415860a1c2373dacd84c4fde00c507cdfd)
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2 * Copyright © 2018, VideoLAN and dav1d authors
3 * Copyright © 2024, Nathan Egge
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27
28#include "src/riscv/asm.S"
29
30// This function detects non-compliant RVV 0.7.1 hardware which reports support
31//  for the V extension through HWCAP, by intentionally setting tail and mask
32//  agnostic vector configurations that were only introduced in RVV 0.9 spec.
33// Existing non-compliant (pre RVV 1.0) hardware will set the VILL bit in VTYPE
34//  (indicating an illegal vector configuration) which is stored in the XLEN-1
35//  bit position, thus a simple sign check is sufficient for detection.
36// This work around is inexpensive and harmless on compliant hardware, but we
37//  should still consider removing it once all non-compliant RVV 0.7.1 hardware
38//  is out of service.
39function has_compliant_rvv, export=1, ext=v
40  vsetvli t0, zero, e8, m1, ta, ma
41  csrr a0, vtype
42  sgtz a0, a0
43  ret
44endfunc
45
46function get_vlenb, export=1
47  csrr a0, vlenb
48  ret
49endfunc
50