1 /****************************************************************************** 2 * 3 * Copyright (C) 2015 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 /** 21 ******************************************************************************* 22 * @file 23 * ih264e_defs.h 24 * 25 * @brief 26 * Declarations of common definitions used in the encoder library 27 * 28 * @author 29 * ittiam 30 * 31 * @remarks 32 * none 33 * 34 ******************************************************************************* 35 */ 36 37 #ifndef _IH264E_DEFS_H_ 38 #define _IH264E_DEFS_H_ 39 40 /*****************************************************************************/ 41 /* Function Macros */ 42 /*****************************************************************************/ 43 44 /** 45 ***************************************************************************** 46 * Macro to extract residue, nnz, significant coefficient map for a 4x4 blk 47 ***************************************************************************** 48 */ 49 #define PARSE_COEFF_DATA_BLOCK_4x4(pv_mb_coeff_data, ps_mb_coeff_data, u4_nnz, u4_sig_coeff_map, pi2_res_block) \ 50 { \ 51 ps_mb_coeff_data = pv_mb_coeff_data; \ 52 u4_nnz = ps_mb_coeff_data->i4_sig_map_nnz & 0xff; \ 53 if (u4_nnz) \ 54 { \ 55 u4_sig_coeff_map = ps_mb_coeff_data->i4_sig_map_nnz >> 16; \ 56 pi2_res_block = ps_mb_coeff_data->ai2_residue; \ 57 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue + ALIGN2(u4_nnz); \ 58 } \ 59 else \ 60 { \ 61 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue; \ 62 } \ 63 } 64 65 /** 66 ***************************************************************************** 67 * Macro to compute total size required to hold on set of scaling matrices 68 ***************************************************************************** 69 */ 70 #define SCALING_MAT_SIZE(m_scaling_mat_size) \ 71 { \ 72 m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4; \ 73 m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8; \ 74 m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16; \ 75 m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32; \ 76 } 77 78 /** 79 ****************************************************************************** 80 * @brief Macros to get raster scan position of a block[8x8] / sub block[4x4] 81 ****************************************************************************** 82 */ 83 #define GET_BLK_RASTER_POS_X(x) ((x & 0x01)) 84 #define GET_BLK_RASTER_POS_Y(y) ((y >> 1)) 85 #define GET_SUB_BLK_RASTER_POS_X(x) ((x & 0x01)) 86 #define GET_SUB_BLK_RASTER_POS_Y(y) ((y >> 1)) 87 88 /*****************************************************************************/ 89 /* Constant Macros */ 90 /*****************************************************************************/ 91 92 /*****************************************************************************/ 93 /* Width and height restrictions */ 94 /*****************************************************************************/ 95 /** 96 * Minimum width supported by codec 97 */ 98 #define MIN_WD 16 99 100 /** 101 * Maximum width supported by codec 102 */ 103 104 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */ 105 #define MAX_WD 2560 106 107 /** 108 * Minimum height supported by codec 109 */ 110 #define MIN_HT 16 111 112 /** 113 * Maximum height supported by codec 114 */ 115 116 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */ 117 #define MAX_HT 2560 118 119 /*****************************************************************************/ 120 /* Padding sizes */ 121 /*****************************************************************************/ 122 /** 123 * Padding used for top of the frame 124 */ 125 #define PAD_TOP 32 126 127 /** 128 * Padding used for bottom of the frame 129 */ 130 #define PAD_BOT 32 131 132 /** 133 * Padding used at left of the frame 134 */ 135 #define PAD_LEFT 32 136 137 /** 138 * Padding used at right of the frame 139 */ 140 #define PAD_RIGHT 32 141 /** 142 * Padding for width 143 */ 144 #define PAD_WD (PAD_LEFT + PAD_RIGHT) 145 /** 146 * Padding for height 147 */ 148 #define PAD_HT (PAD_TOP + PAD_BOT) 149 150 /* 151 * buffer width and height for half pel buffers 152 */ 153 #define HP_BUFF_WD 24 154 #define HP_BUFF_HT 18 155 156 /*****************************************************************************/ 157 /* Number of frame restrictions */ 158 /*****************************************************************************/ 159 /** 160 * Maximum number of reference pictures 161 */ 162 #define MAX_REF_PIC_CNT 2 163 164 /** 165 * Minimum number of reference pictures 166 */ 167 #define MIN_REF_PIC_CNT 1 168 169 /** 170 * Maximum number of B pictures between two I/P pictures 171 */ 172 #define MAX_NUM_BFRAMES 8 173 174 /** 175 * Maximum number of pictures in input queue 176 */ 177 #define MAX_NUM_INP_FRAMES ((MAX_NUM_BFRAMES) + 2) 178 179 /** 180 * Maximum number of reference buffers in DPB manager 181 */ 182 #define MAX_REF_CNT 32 183 184 /*****************************************************************************/ 185 /* Minimum size of inter prediction unit supported by encoder */ 186 /*****************************************************************************/ 187 #define ENC_MIN_PU_SIZE 16 188 189 /*****************************************************************************/ 190 /* Num cores releated defs */ 191 /*****************************************************************************/ 192 /** 193 * Maximum number of cores 194 */ 195 #define MAX_NUM_CORES 8 196 197 /** 198 * Maximum number of threads for pixel processing 199 */ 200 #define MAX_PROCESS_THREADS MAX_NUM_CORES 201 202 /** 203 * Maximum process context sets 204 * Used to stagger encoding of MAX_CTXT_SETS in parallel 205 */ 206 #define MAX_CTXT_SETS 1 207 /** 208 * Maximum number of contexts 209 * Kept as twice the number of threads, to make it easier to initialize the contexts 210 * from master thread 211 */ 212 #define MAX_PROCESS_CTXT MAX_NUM_CORES * MAX_CTXT_SETS 213 214 /*****************************************************************************/ 215 /* Profile and level restrictions */ 216 /*****************************************************************************/ 217 /** 218 * Max level supported by the codec 219 */ 220 #define MAX_LEVEL IH264_LEVEL_51 221 222 /** 223 * Min level supported by the codec 224 */ 225 #define MIN_LEVEL IH264_LEVEL_10 226 227 /** 228 * Maximum number of slice headers that are held in memory simultaneously 229 * For single core implementation only 1 slice header is enough. 230 * But for multi-core parsing thread needs to ensure that slice headers are 231 * stored till the last CB in a slice is decoded. 232 * Parsing thread has to wait till last CB of a slice is consumed before reusing 233 * overwriting the slice header 234 * MAX_SLICE_HDR_CNT is assumed to be a power of 2 235 */ 236 237 #define LOG2_MAX_SLICE_HDR_CNT 8 238 #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT) 239 240 /** 241 * Generic declarations 242 */ 243 #define DEFAULT_MAX_LEVEL 40 244 #define DEFAULT_RECON_ENABLE 0 245 #define DEFAULT_QUALITY_METRICS_ENABLE 0 246 #define DEFAULT_RC IVE_RC_STORAGE 247 #define DEFAULT_MAX_FRAMERATE 120000 /* in ticks (1000 ticks = 1s) */ 248 #define DEFAULT_MAX_BITRATE 240000000 249 #define DEFAULT_MAX_NUM_BFRAMES 0 250 #define DEFAULT_MAX_SRCH_RANGE_X 256 251 #define DEFAULT_MAX_SRCH_RANGE_Y 256 252 #define DEFAULT_SLICE_PARAM 256 253 #define DEFAULT_SRC_FRAME_RATE 30000 /* in ticks (1000 ticks = 1s) */ 254 #define DEFAULT_TGT_FRAME_RATE 30000 /* in ticks (1000 ticks = 1s) */ 255 #define DEFAULT_BITRATE 6000000 256 #define DEFAULT_QP_MIN 10 257 #define DEFAULT_QP_MAX 51 258 #define DEFAULT_I_QP 25 259 #define DEFAULT_P_QP 28 260 #define DEFAULT_B_QP 28 261 #define DEFAULT_AIR_MODE IVE_AIR_MODE_NONE 262 #define DEFAULT_AIR_REFRESH_PERIOD 30 263 #define DEFAULT_VBV_DELAY 1000 264 #define DEFAULT_VBV_SIZE 240000000 /* level 6.0 */ 265 #define DEFAULT_NUM_CORES 1 266 #define DEFAULT_ME_SPEED_PRESET 100 267 #define DEFAULT_HPEL 1 268 #define DEFAULT_QPEL 1 269 #define DEFAULT_I4 1 270 #define DEFAULT_I8 0 271 #define DEFAULT_I16 1 272 #define DEFAULT_ENABLE_FAST_SAD 0 273 #define DEFAULT_ENABLE_SATQD 1 274 #define DEFAULT_MIN_SAD_ENABLE 0 275 #define DEFAULT_MIN_SAD_DISABLE -1 276 #define DEFAULT_SRCH_RNG_X 64 277 #define DEFAULT_SRCH_RNG_Y 64 278 #define DEFAULT_I_INTERVAL 30 279 #define DEFAULT_IDR_INTERVAL 1200 280 #define DEFAULT_DISABLE_DEBLK_LEVEL 0 281 #define DEFAULT_PROFILE IV_PROFILE_BASE 282 #define DEFAULT_MIN_INTRA_FRAME_RATE 1 283 #define DEFAULT_MAX_INTRA_FRAME_RATE 2147483647 284 #define DEFAULT_MIN_BUFFER_DELAY 30 285 #define DEFAULT_MAX_BUFFER_DELAY 20000 286 #define DEFAULT_STRIDE 0 287 #define DEFAULT_PRE_ENC_ME 0 288 #define DEFAULT_PRE_ENC_IPE 0 289 #define DEFAULT_ENTROPY_CODING_MODE 0 290 #define DEFAULT_CONSTRAINED_INTRAPRED 0 291 292 /** Maximum number of entries in input buffer list */ 293 #define MAX_INP_BUF_LIST_ENTRIES 32 294 295 /** Maximum number of entries in output buffer list */ 296 #define MAX_OUT_BUF_LIST_ENTRIES 32 297 298 /** Maximum number of entries in recon buffer list used within the encoder */ 299 #define MAX_REC_LIST_ENTRIES 16 300 301 /** Number of buffers created to hold half-pel planes for every reference buffer */ 302 #define HPEL_PLANES_CNT 1 303 304 /** Number of buffers Needed for SUBPEL and BIPRED computation */ 305 #define SUBPEL_BUFF_CNT 4 306 307 #define NUM_RC_MEMTABS 17 308 309 #define DISABLE_DEBLOCK_INTERVAL 8 310 311 /** Mask value for PSNR. Needed when quality metrics is enabled */ 312 #define QUALITY_MASK_PSNR 0x1 313 314 /** 315 **************************************************************************** 316 * Number of buffers for I/O based on format 317 **************************************************************************** 318 */ 319 320 /** Minimum number of input buffers */ 321 #define MIN_INP_BUFS 2 322 323 /** Minimum number of output buffers */ 324 #define MIN_OUT_BUFS 1 325 326 /** Minimum number of components in bitstream buffer */ 327 #define MIN_BITS_BUFS_COMP 1 328 329 /** Minimum number of components in raw buffer */ 330 #define MIN_RAW_BUFS_420_COMP 3 331 #define MIN_RAW_BUFS_422ILE_COMP 1 332 #define MIN_RAW_BUFS_RGB565_COMP 1 333 #define MIN_RAW_BUFS_RGBA8888_COMP 1 334 #define MIN_RAW_BUFS_420SP_COMP 2 335 336 /** Maximum number of active config paramter sets */ 337 #define MAX_ACTIVE_CONFIG_PARAMS 32 338 339 /** 340 ****************************************************************************** 341 * @brief Thresholds for luma & chroma to determine if the 8x8 subblock needs 342 * to be encoded or skipped 343 ****************************************************************************** 344 */ 345 #define LUMA_SUB_BLOCK_SKIP_THRESHOLD 4 346 #define LUMA_BLOCK_SKIP_THRESHOLD 5 347 #define CHROMA_BLOCK_SKIP_THRESHOLD 4 348 349 /** 350 ****************************************************************************** 351 * @brief defines the first byte of a NAL unit 352 * forbidden zero bit - nal_ref_idc - nal_unit_type 353 ****************************************************************************** 354 */ 355 /* [0 - 11 - 00111] */ 356 #define NAL_SPS_FIRST_BYTE 0x67 357 358 /* [0 - 11 - 01000] */ 359 #define NAL_PPS_FIRST_BYTE 0x68 360 361 /* [0 - 11 - 00001] */ 362 #define NAL_SLICE_FIRST_BYTE 0x61 363 364 /* [0 - 00 - 00001] */ 365 #define NAL_NON_REF_SLICE_FIRST_BYTE 0x01 366 367 /* [0 - 11 - 00101] */ 368 #define NAL_IDR_SLICE_FIRST_BYTE 0x65 369 370 /* [0 - 00 - 01100] */ 371 #define NAL_FILLER_FIRST_BYTE 0x0C 372 373 /* [0 - 00 - 00110] */ 374 #define NAL_SEI_FIRST_BYTE 0x06 375 376 /** 377 ****************************************************************************** 378 * @brief h264qp and linear qp map 379 ****************************************************************************** 380 */ 381 #define H264_MPEG_QP_MAP 255 382 #define MPEG2_QP_ELEM (H264_MPEG_QP_MAP + 1) 383 #define H264_QP_ELEM (MAX_H264_QP + 1) 384 385 386 /*****************************************************************************/ 387 /* Enums */ 388 /*****************************************************************************/ 389 390 /** 391 *************************************************************************** 392 * Enum to hold various mem records being request 393 **************************************************************************** 394 */ 395 enum 396 { 397 /** 398 * Codec Object at API level 399 */ 400 MEM_REC_IV_OBJ, 401 402 /** 403 * Codec context 404 */ 405 MEM_REC_CODEC, 406 407 /** 408 * Cabac context 409 */ 410 MEM_REC_CABAC, 411 412 /** 413 * Cabac context_mb_info 414 */ 415 MEM_REC_CABAC_MB_INFO, 416 417 /** 418 * entropy context 419 */ 420 MEM_REC_ENTROPY, 421 422 /** 423 * Buffer to hold coeff data 424 */ 425 MEM_REC_MB_COEFF_DATA, 426 427 /** 428 * Buffer to hold coeff data 429 */ 430 MEM_REC_MB_HEADER_DATA, 431 432 /** 433 * Motion vector bank 434 */ 435 MEM_REC_MVBANK, 436 437 /** 438 * Motion vector bits 439 */ 440 MEM_REC_MVBITS, 441 442 /** 443 * Overlay Intra Cost Map 444 */ 445 MEM_REC_INTRA_COST, 446 447 /** 448 * Holds mem records passed to the codec. 449 */ 450 MEM_REC_BACKUP, 451 452 /** 453 * Holds SPS 454 */ 455 MEM_REC_SPS, 456 457 /** 458 * Holds PPS 459 */ 460 MEM_REC_PPS, 461 462 /** 463 * Holds Slice Headers 464 */ 465 MEM_REC_SLICE_HDR, 466 467 /** 468 * Contains map indicating slice index per MB basis 469 */ 470 MEM_REC_SLICE_MAP, 471 472 /** 473 * Holds thread handles 474 */ 475 MEM_REC_THREAD_HANDLE, 476 477 /** 478 * Holds control call mutex 479 */ 480 MEM_REC_CTL_MUTEX, 481 482 /** 483 * Holds entropy call mutex 484 */ 485 MEM_REC_ENTROPY_MUTEX, 486 487 /** 488 * Holds memory for Process JOB Queue 489 */ 490 MEM_REC_PROC_JOBQ, 491 492 /** 493 * Holds memory for Entropy JOB Queue 494 */ 495 MEM_REC_ENTROPY_JOBQ, 496 497 /** 498 * Contains status map indicating processing status per MB basis 499 */ 500 MEM_REC_PROC_MAP, 501 502 /** 503 * Contains status map indicating deblocking status per MB basis 504 */ 505 MEM_REC_DBLK_MAP, 506 507 /* 508 * Contains AIR map and mask 509 */ 510 MEM_REC_AIR_MAP, 511 512 /** 513 * Contains status map indicating ME status per MB basis 514 */ 515 MEM_REC_ME_MAP, 516 517 /** 518 * Holds dpb manager context 519 */ 520 MEM_REC_DPB_MGR, 521 522 /** 523 * Holds intermediate buffers needed during processing stage 524 * Memory for process contexts is allocated in this memtab 525 */ 526 MEM_REC_PROC_SCRATCH, 527 528 /** 529 * Holds buffers for vert_bs, horz_bs and QP (all frame level) 530 */ 531 MEM_REC_QUANT_PARAM, 532 533 /** 534 * Holds top row syntax information 535 */ 536 MEM_REC_TOP_ROW_SYN_INFO, 537 538 /** 539 * Holds buffers for vert_bs, horz_bs and QP (all frame level) 540 */ 541 MEM_REC_BS_QP, 542 543 /** 544 * Holds input buffer manager context 545 */ 546 MEM_REC_INP_PIC, 547 548 /** 549 * Holds output buffer manager context 550 */ 551 MEM_REC_OUT, 552 553 /** 554 * Holds picture buffer manager context and array of pic_buf_ts 555 * Also holds reference picture buffers in non-shared mode 556 */ 557 MEM_REC_REF_PIC, 558 559 /* 560 * Mem record for color space conversion 561 */ 562 MEM_REC_CSC, 563 564 /** 565 * NMB info struct 566 */ 567 MEM_REC_MB_INFO_NMB, 568 569 /** 570 * Rate control of memory records. 571 */ 572 MEM_REC_RC, 573 574 /** 575 * Place holder to compute number of memory records. 576 */ 577 MEM_REC_CNT = MEM_REC_RC + NUM_RC_MEMTABS, 578 579 /* 580 * Do not add anything below 581 */ 582 }; 583 584 /** 585 **************************************************************************** 586 * Disable deblock levels 587 * Level 0 enables deblocking completely and level 4 disables completely 588 * Other levels are intermediate values to control deblocking level 589 **************************************************************************** 590 */ 591 enum 592 { 593 /** 594 * Enable deblocking completely 595 */ 596 DISABLE_DEBLK_LEVEL_0, 597 598 /** 599 * Disable only within MB edges - Not supported currently 600 */ 601 DISABLE_DEBLK_LEVEL_1, 602 603 /** 604 * Enable deblocking once in DEBLOCK_INTERVAL number of pictures 605 * and for I slices 606 */ 607 DISABLE_DEBLK_LEVEL_2, 608 609 /** 610 * Enable deblocking only for I slices 611 */ 612 DISABLE_DEBLK_LEVEL_3, 613 614 /** 615 * Disable deblocking completely 616 */ 617 DISABLE_DEBLK_LEVEL_4 618 }; 619 620 #endif /*_IH264E_DEFS_H_ */ 621