1 /*
2 * Copyright (c) 2023, Alliance for Open Media. All rights reserved.
3 *
4 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 */
11 #ifndef AOM_AV1_COMMON_ARM_HIGHBD_WARP_PLANE_NEON_H_
12 #define AOM_AV1_COMMON_ARM_HIGHBD_WARP_PLANE_NEON_H_
13
14 #include <arm_neon.h>
15 #include <assert.h>
16 #include <stdbool.h>
17
18 #include "aom_dsp/aom_dsp_common.h"
19 #include "aom_dsp/arm/mem_neon.h"
20 #include "aom_dsp/arm/sum_neon.h"
21 #include "aom_ports/mem.h"
22 #include "av1/common/scale.h"
23 #include "av1/common/warped_motion.h"
24 #include "config/av1_rtcd.h"
25
26 static AOM_FORCE_INLINE int16x8_t
27 highbd_horizontal_filter_4x1_f4(int16x8_t rv0, int16x8_t rv1, int16x8_t rv2,
28 int16x8_t rv3, int bd, int sx, int alpha);
29
30 static AOM_FORCE_INLINE int16x8_t highbd_horizontal_filter_8x1_f8(
31 int16x8_t rv0, int16x8_t rv1, int16x8_t rv2, int16x8_t rv3, int16x8_t rv4,
32 int16x8_t rv5, int16x8_t rv6, int16x8_t rv7, int bd, int sx, int alpha);
33
34 static AOM_FORCE_INLINE int16x8_t highbd_horizontal_filter_4x1_f1(
35 int16x8_t rv0, int16x8_t rv1, int16x8_t rv2, int16x8_t rv3, int bd, int sx);
36
37 static AOM_FORCE_INLINE int16x8_t highbd_horizontal_filter_8x1_f1(
38 int16x8_t rv0, int16x8_t rv1, int16x8_t rv2, int16x8_t rv3, int16x8_t rv4,
39 int16x8_t rv5, int16x8_t rv6, int16x8_t rv7, int bd, int sx);
40
41 static AOM_FORCE_INLINE int32x4_t vertical_filter_4x1_f1(const int16x8_t *tmp,
42 int sy);
43
44 static AOM_FORCE_INLINE int32x4x2_t vertical_filter_8x1_f1(const int16x8_t *tmp,
45 int sy);
46
47 static AOM_FORCE_INLINE int32x4_t vertical_filter_4x1_f4(const int16x8_t *tmp,
48 int sy, int gamma);
49
50 static AOM_FORCE_INLINE int32x4x2_t vertical_filter_8x1_f8(const int16x8_t *tmp,
51 int sy, int gamma);
52
load_filters_1(int ofs)53 static AOM_FORCE_INLINE int16x8_t load_filters_1(int ofs) {
54 const int ofs0 = ROUND_POWER_OF_TWO(ofs, WARPEDDIFF_PREC_BITS);
55
56 const int16_t *base =
57 (int16_t *)av1_warped_filter + WARPEDPIXEL_PREC_SHIFTS * 8;
58 return vld1q_s16(base + ofs0 * 8);
59 }
60
load_filters_4(int16x8_t out[],int ofs,int stride)61 static AOM_FORCE_INLINE void load_filters_4(int16x8_t out[], int ofs,
62 int stride) {
63 const int ofs0 = ROUND_POWER_OF_TWO(ofs + stride * 0, WARPEDDIFF_PREC_BITS);
64 const int ofs1 = ROUND_POWER_OF_TWO(ofs + stride * 1, WARPEDDIFF_PREC_BITS);
65 const int ofs2 = ROUND_POWER_OF_TWO(ofs + stride * 2, WARPEDDIFF_PREC_BITS);
66 const int ofs3 = ROUND_POWER_OF_TWO(ofs + stride * 3, WARPEDDIFF_PREC_BITS);
67
68 const int16_t *base =
69 (int16_t *)av1_warped_filter + WARPEDPIXEL_PREC_SHIFTS * 8;
70 out[0] = vld1q_s16(base + ofs0 * 8);
71 out[1] = vld1q_s16(base + ofs1 * 8);
72 out[2] = vld1q_s16(base + ofs2 * 8);
73 out[3] = vld1q_s16(base + ofs3 * 8);
74 }
75
load_filters_8(int16x8_t out[],int ofs,int stride)76 static AOM_FORCE_INLINE void load_filters_8(int16x8_t out[], int ofs,
77 int stride) {
78 const int ofs0 = ROUND_POWER_OF_TWO(ofs + stride * 0, WARPEDDIFF_PREC_BITS);
79 const int ofs1 = ROUND_POWER_OF_TWO(ofs + stride * 1, WARPEDDIFF_PREC_BITS);
80 const int ofs2 = ROUND_POWER_OF_TWO(ofs + stride * 2, WARPEDDIFF_PREC_BITS);
81 const int ofs3 = ROUND_POWER_OF_TWO(ofs + stride * 3, WARPEDDIFF_PREC_BITS);
82 const int ofs4 = ROUND_POWER_OF_TWO(ofs + stride * 4, WARPEDDIFF_PREC_BITS);
83 const int ofs5 = ROUND_POWER_OF_TWO(ofs + stride * 5, WARPEDDIFF_PREC_BITS);
84 const int ofs6 = ROUND_POWER_OF_TWO(ofs + stride * 6, WARPEDDIFF_PREC_BITS);
85 const int ofs7 = ROUND_POWER_OF_TWO(ofs + stride * 7, WARPEDDIFF_PREC_BITS);
86
87 const int16_t *base =
88 (int16_t *)av1_warped_filter + WARPEDPIXEL_PREC_SHIFTS * 8;
89 out[0] = vld1q_s16(base + ofs0 * 8);
90 out[1] = vld1q_s16(base + ofs1 * 8);
91 out[2] = vld1q_s16(base + ofs2 * 8);
92 out[3] = vld1q_s16(base + ofs3 * 8);
93 out[4] = vld1q_s16(base + ofs4 * 8);
94 out[5] = vld1q_s16(base + ofs5 * 8);
95 out[6] = vld1q_s16(base + ofs6 * 8);
96 out[7] = vld1q_s16(base + ofs7 * 8);
97 }
98
clip_pixel_highbd_vec(int32x4_t val,int bd)99 static AOM_FORCE_INLINE uint16x4_t clip_pixel_highbd_vec(int32x4_t val,
100 int bd) {
101 const int limit = (1 << bd) - 1;
102 return vqmovun_s32(vminq_s32(val, vdupq_n_s32(limit)));
103 }
104
clamp_horizontal(uint16x8x2_t src_1,int out_of_boundary_left,int out_of_boundary_right,const uint16_t * ref,int iy,int stride,int width,const uint16x8_t indx0,const uint16x8_t indx1)105 static AOM_FORCE_INLINE uint16x8x2_t clamp_horizontal(
106 uint16x8x2_t src_1, int out_of_boundary_left, int out_of_boundary_right,
107 const uint16_t *ref, int iy, int stride, int width, const uint16x8_t indx0,
108 const uint16x8_t indx1) {
109 if (out_of_boundary_left >= 0) {
110 uint16x8_t cmp_vec = vdupq_n_u16(out_of_boundary_left);
111 uint16x8_t vec_dup = vdupq_n_u16(ref[iy * stride]);
112 uint16x8_t mask0 = vcleq_u16(indx0, cmp_vec);
113 uint16x8_t mask1 = vcleq_u16(indx1, cmp_vec);
114 src_1.val[0] = vbslq_u16(mask0, vec_dup, src_1.val[0]);
115 src_1.val[1] = vbslq_u16(mask1, vec_dup, src_1.val[1]);
116 }
117 if (out_of_boundary_right >= 0) {
118 uint16x8_t cmp_vec = vdupq_n_u16(15 - out_of_boundary_right);
119 uint16x8_t vec_dup = vdupq_n_u16(ref[iy * stride + width - 1]);
120 uint16x8_t mask0 = vcgeq_u16(indx0, cmp_vec);
121 uint16x8_t mask1 = vcgeq_u16(indx1, cmp_vec);
122 src_1.val[0] = vbslq_u16(mask0, vec_dup, src_1.val[0]);
123 src_1.val[1] = vbslq_u16(mask1, vec_dup, src_1.val[1]);
124 }
125 return src_1;
126 }
127
warp_affine_horizontal(const uint16_t * ref,int width,int height,int stride,int p_width,int16_t alpha,int16_t beta,int iy4,int sx4,int ix4,int16x8_t tmp[],int bd)128 static AOM_FORCE_INLINE void warp_affine_horizontal(const uint16_t *ref,
129 int width, int height,
130 int stride, int p_width,
131 int16_t alpha, int16_t beta,
132 int iy4, int sx4, int ix4,
133 int16x8_t tmp[], int bd) {
134 const int round0 = (bd == 12) ? ROUND0_BITS + 2 : ROUND0_BITS;
135
136 if (ix4 <= -7) {
137 for (int k = 0; k < 15; ++k) {
138 int iy = clamp(iy4 + k - 7, 0, height - 1);
139 int32_t dup_val = (1 << (bd + FILTER_BITS - round0 - 1)) +
140 ref[iy * stride] * (1 << (FILTER_BITS - round0));
141 tmp[k] = vdupq_n_s16(dup_val);
142 }
143 return;
144 } else if (ix4 >= width + 6) {
145 for (int k = 0; k < 15; ++k) {
146 int iy = clamp(iy4 + k - 7, 0, height - 1);
147 int32_t dup_val =
148 (1 << (bd + FILTER_BITS - round0 - 1)) +
149 ref[iy * stride + (width - 1)] * (1 << (FILTER_BITS - round0));
150 tmp[k] = vdupq_n_s16(dup_val);
151 }
152 return;
153 }
154
155 static const uint16_t kIotaArr[] = { 0, 1, 2, 3, 4, 5, 6, 7,
156 8, 9, 10, 11, 12, 13, 14, 15 };
157 const uint16x8_t indx0 = vld1q_u16(kIotaArr);
158 const uint16x8_t indx1 = vld1q_u16(kIotaArr + 8);
159
160 const int out_of_boundary_left = -(ix4 - 6);
161 const int out_of_boundary_right = (ix4 + 8) - width;
162
163 #define APPLY_HORIZONTAL_SHIFT_4X1(fn, ...) \
164 do { \
165 if (out_of_boundary_left >= 0 || out_of_boundary_right >= 0) { \
166 for (int k = 0; k < 15; ++k) { \
167 const int iy = clamp(iy4 + k - 7, 0, height - 1); \
168 const uint16_t *idx = ref + iy * stride + ix4 - 7; \
169 /* We don't use vld1q_u16_x2 here as LLVM generates an incorrect \
170 * alignment hint for this intrinsic that causes a SIGBUS on Armv7 \
171 * targets when alignment checks are enabled. \
172 * (See bug: b/349455146) */ \
173 uint16x8x2_t src_1 = { { vld1q_u16(idx), vld1q_u16(idx + 8) } }; \
174 src_1 = clamp_horizontal(src_1, out_of_boundary_left, \
175 out_of_boundary_right, ref, iy, stride, \
176 width, indx0, indx1); \
177 int16x8_t rv0 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
178 vreinterpretq_s16_u16(src_1.val[1]), 0); \
179 int16x8_t rv1 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
180 vreinterpretq_s16_u16(src_1.val[1]), 1); \
181 int16x8_t rv2 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
182 vreinterpretq_s16_u16(src_1.val[1]), 2); \
183 int16x8_t rv3 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
184 vreinterpretq_s16_u16(src_1.val[1]), 3); \
185 tmp[k] = (fn)(rv0, rv1, rv2, rv3, __VA_ARGS__); \
186 } \
187 } else { \
188 for (int k = 0; k < 15; ++k) { \
189 const int iy = clamp(iy4 + k - 7, 0, height - 1); \
190 const uint16_t *src = ref + iy * stride + ix4; \
191 int16x8_t rv0 = vreinterpretq_s16_u16(vld1q_u16(src - 7)); \
192 int16x8_t rv1 = vreinterpretq_s16_u16(vld1q_u16(src - 6)); \
193 int16x8_t rv2 = vreinterpretq_s16_u16(vld1q_u16(src - 5)); \
194 int16x8_t rv3 = vreinterpretq_s16_u16(vld1q_u16(src - 4)); \
195 tmp[k] = (fn)(rv0, rv1, rv2, rv3, __VA_ARGS__); \
196 } \
197 } \
198 } while (0)
199
200 #define APPLY_HORIZONTAL_SHIFT_8X1(fn, ...) \
201 do { \
202 if (out_of_boundary_left >= 0 || out_of_boundary_right >= 0) { \
203 for (int k = 0; k < 15; ++k) { \
204 const int iy = clamp(iy4 + k - 7, 0, height - 1); \
205 const uint16_t *idx = ref + iy * stride + ix4 - 7; \
206 /* We don't use vld1q_u16_x2 here as LLVM generates an incorrect \
207 * alignment hint for this intrinsic that causes a SIGBUS on Armv7 \
208 * targets when alignment checks are enabled. \
209 * (See bug: b/349455146) */ \
210 uint16x8x2_t src_1 = { { vld1q_u16(idx), vld1q_u16(idx + 8) } }; \
211 src_1 = clamp_horizontal(src_1, out_of_boundary_left, \
212 out_of_boundary_right, ref, iy, stride, \
213 width, indx0, indx1); \
214 int16x8_t rv0 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
215 vreinterpretq_s16_u16(src_1.val[1]), 0); \
216 int16x8_t rv1 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
217 vreinterpretq_s16_u16(src_1.val[1]), 1); \
218 int16x8_t rv2 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
219 vreinterpretq_s16_u16(src_1.val[1]), 2); \
220 int16x8_t rv3 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
221 vreinterpretq_s16_u16(src_1.val[1]), 3); \
222 int16x8_t rv4 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
223 vreinterpretq_s16_u16(src_1.val[1]), 4); \
224 int16x8_t rv5 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
225 vreinterpretq_s16_u16(src_1.val[1]), 5); \
226 int16x8_t rv6 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
227 vreinterpretq_s16_u16(src_1.val[1]), 6); \
228 int16x8_t rv7 = vextq_s16(vreinterpretq_s16_u16(src_1.val[0]), \
229 vreinterpretq_s16_u16(src_1.val[1]), 7); \
230 tmp[k] = (fn)(rv0, rv1, rv2, rv3, rv4, rv5, rv6, rv7, __VA_ARGS__); \
231 } \
232 } else { \
233 for (int k = 0; k < 15; ++k) { \
234 const int iy = clamp(iy4 + k - 7, 0, height - 1); \
235 const uint16_t *src = ref + iy * stride + ix4; \
236 int16x8_t rv0 = vreinterpretq_s16_u16(vld1q_u16(src - 7)); \
237 int16x8_t rv1 = vreinterpretq_s16_u16(vld1q_u16(src - 6)); \
238 int16x8_t rv2 = vreinterpretq_s16_u16(vld1q_u16(src - 5)); \
239 int16x8_t rv3 = vreinterpretq_s16_u16(vld1q_u16(src - 4)); \
240 int16x8_t rv4 = vreinterpretq_s16_u16(vld1q_u16(src - 3)); \
241 int16x8_t rv5 = vreinterpretq_s16_u16(vld1q_u16(src - 2)); \
242 int16x8_t rv6 = vreinterpretq_s16_u16(vld1q_u16(src - 1)); \
243 int16x8_t rv7 = vreinterpretq_s16_u16(vld1q_u16(src - 0)); \
244 tmp[k] = (fn)(rv0, rv1, rv2, rv3, rv4, rv5, rv6, rv7, __VA_ARGS__); \
245 } \
246 } \
247 } while (0)
248
249 if (p_width == 4) {
250 if (beta == 0) {
251 if (alpha == 0) {
252 APPLY_HORIZONTAL_SHIFT_4X1(highbd_horizontal_filter_4x1_f1, bd, sx4);
253 } else {
254 APPLY_HORIZONTAL_SHIFT_4X1(highbd_horizontal_filter_4x1_f4, bd, sx4,
255 alpha);
256 }
257 } else {
258 if (alpha == 0) {
259 APPLY_HORIZONTAL_SHIFT_4X1(highbd_horizontal_filter_4x1_f1, bd,
260 (sx4 + beta * (k - 3)));
261 } else {
262 APPLY_HORIZONTAL_SHIFT_4X1(highbd_horizontal_filter_4x1_f4, bd,
263 (sx4 + beta * (k - 3)), alpha);
264 }
265 }
266 } else {
267 if (beta == 0) {
268 if (alpha == 0) {
269 APPLY_HORIZONTAL_SHIFT_8X1(highbd_horizontal_filter_8x1_f1, bd, sx4);
270 } else {
271 APPLY_HORIZONTAL_SHIFT_8X1(highbd_horizontal_filter_8x1_f8, bd, sx4,
272 alpha);
273 }
274 } else {
275 if (alpha == 0) {
276 APPLY_HORIZONTAL_SHIFT_8X1(highbd_horizontal_filter_8x1_f1, bd,
277 (sx4 + beta * (k - 3)));
278 } else {
279 APPLY_HORIZONTAL_SHIFT_8X1(highbd_horizontal_filter_8x1_f8, bd,
280 (sx4 + beta * (k - 3)), alpha);
281 }
282 }
283 }
284
285 #undef APPLY_HORIZONTAL_SHIFT_4X1
286 #undef APPLY_HORIZONTAL_SHIFT_8X1
287 }
288
highbd_vertical_filter_4x1_f4(uint16_t * pred,int p_stride,int bd,uint16_t * dst,int dst_stride,bool is_compound,bool do_average,bool use_dist_wtd_comp_avg,int fwd,int bwd,int16_t gamma,const int16x8_t * tmp,int i,int sy,int j)289 static AOM_FORCE_INLINE void highbd_vertical_filter_4x1_f4(
290 uint16_t *pred, int p_stride, int bd, uint16_t *dst, int dst_stride,
291 bool is_compound, bool do_average, bool use_dist_wtd_comp_avg, int fwd,
292 int bwd, int16_t gamma, const int16x8_t *tmp, int i, int sy, int j) {
293 int32x4_t sum0 = gamma == 0 ? vertical_filter_4x1_f1(tmp, sy)
294 : vertical_filter_4x1_f4(tmp, sy, gamma);
295
296 const int round0 = (bd == 12) ? ROUND0_BITS + 2 : ROUND0_BITS;
297 const int offset_bits_vert = bd + 2 * FILTER_BITS - round0;
298
299 sum0 = vaddq_s32(sum0, vdupq_n_s32(1 << offset_bits_vert));
300
301 uint16_t *dst16 = &pred[i * p_stride + j];
302
303 if (!is_compound) {
304 const int reduce_bits_vert = 2 * FILTER_BITS - round0;
305 sum0 = vrshlq_s32(sum0, vdupq_n_s32(-reduce_bits_vert));
306
307 const int res_sub_const = (1 << (bd - 1)) + (1 << bd);
308 sum0 = vsubq_s32(sum0, vdupq_n_s32(res_sub_const));
309 uint16x4_t res0 = clip_pixel_highbd_vec(sum0, bd);
310 vst1_u16(dst16, res0);
311 return;
312 }
313
314 sum0 = vrshrq_n_s32(sum0, COMPOUND_ROUND1_BITS);
315
316 uint16_t *p = &dst[i * dst_stride + j];
317
318 if (!do_average) {
319 vst1_u16(p, vqmovun_s32(sum0));
320 return;
321 }
322
323 uint16x4_t p0 = vld1_u16(p);
324 int32x4_t p_vec0 = vreinterpretq_s32_u32(vmovl_u16(p0));
325 if (use_dist_wtd_comp_avg) {
326 p_vec0 = vmulq_n_s32(p_vec0, fwd);
327 p_vec0 = vmlaq_n_s32(p_vec0, sum0, bwd);
328 p_vec0 = vshrq_n_s32(p_vec0, DIST_PRECISION_BITS);
329 } else {
330 p_vec0 = vhaddq_s32(p_vec0, sum0);
331 }
332
333 const int offset_bits = bd + 2 * FILTER_BITS - round0;
334 const int round1 = COMPOUND_ROUND1_BITS;
335 const int res_sub_const =
336 (1 << (offset_bits - round1)) + (1 << (offset_bits - round1 - 1));
337 const int round_bits = 2 * FILTER_BITS - round0 - round1;
338
339 p_vec0 = vsubq_s32(p_vec0, vdupq_n_s32(res_sub_const));
340 p_vec0 = vrshlq_s32(p_vec0, vdupq_n_s32(-round_bits));
341 uint16x4_t res0 = clip_pixel_highbd_vec(p_vec0, bd);
342 vst1_u16(dst16, res0);
343 }
344
highbd_vertical_filter_8x1_f8(uint16_t * pred,int p_stride,int bd,uint16_t * dst,int dst_stride,bool is_compound,bool do_average,bool use_dist_wtd_comp_avg,int fwd,int bwd,int16_t gamma,const int16x8_t * tmp,int i,int sy,int j)345 static AOM_FORCE_INLINE void highbd_vertical_filter_8x1_f8(
346 uint16_t *pred, int p_stride, int bd, uint16_t *dst, int dst_stride,
347 bool is_compound, bool do_average, bool use_dist_wtd_comp_avg, int fwd,
348 int bwd, int16_t gamma, const int16x8_t *tmp, int i, int sy, int j) {
349 int32x4x2_t sums = gamma == 0 ? vertical_filter_8x1_f1(tmp, sy)
350 : vertical_filter_8x1_f8(tmp, sy, gamma);
351 int32x4_t sum0 = sums.val[0];
352 int32x4_t sum1 = sums.val[1];
353
354 const int round0 = (bd == 12) ? ROUND0_BITS + 2 : ROUND0_BITS;
355 const int offset_bits_vert = bd + 2 * FILTER_BITS - round0;
356
357 sum0 = vaddq_s32(sum0, vdupq_n_s32(1 << offset_bits_vert));
358 sum1 = vaddq_s32(sum1, vdupq_n_s32(1 << offset_bits_vert));
359
360 uint16_t *dst16 = &pred[i * p_stride + j];
361
362 if (!is_compound) {
363 const int reduce_bits_vert = 2 * FILTER_BITS - round0;
364 sum0 = vrshlq_s32(sum0, vdupq_n_s32(-reduce_bits_vert));
365 sum1 = vrshlq_s32(sum1, vdupq_n_s32(-reduce_bits_vert));
366
367 const int res_sub_const = (1 << (bd - 1)) + (1 << bd);
368 sum0 = vsubq_s32(sum0, vdupq_n_s32(res_sub_const));
369 sum1 = vsubq_s32(sum1, vdupq_n_s32(res_sub_const));
370 uint16x4_t res0 = clip_pixel_highbd_vec(sum0, bd);
371 uint16x4_t res1 = clip_pixel_highbd_vec(sum1, bd);
372 vst1_u16(dst16, res0);
373 vst1_u16(dst16 + 4, res1);
374 return;
375 }
376
377 sum0 = vrshrq_n_s32(sum0, COMPOUND_ROUND1_BITS);
378 sum1 = vrshrq_n_s32(sum1, COMPOUND_ROUND1_BITS);
379
380 uint16_t *p = &dst[i * dst_stride + j];
381
382 if (!do_average) {
383 vst1_u16(p, vqmovun_s32(sum0));
384 vst1_u16(p + 4, vqmovun_s32(sum1));
385 return;
386 }
387
388 uint16x8_t p0 = vld1q_u16(p);
389 int32x4_t p_vec0 = vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(p0)));
390 int32x4_t p_vec1 = vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(p0)));
391 if (use_dist_wtd_comp_avg) {
392 p_vec0 = vmulq_n_s32(p_vec0, fwd);
393 p_vec1 = vmulq_n_s32(p_vec1, fwd);
394 p_vec0 = vmlaq_n_s32(p_vec0, sum0, bwd);
395 p_vec1 = vmlaq_n_s32(p_vec1, sum1, bwd);
396 p_vec0 = vshrq_n_s32(p_vec0, DIST_PRECISION_BITS);
397 p_vec1 = vshrq_n_s32(p_vec1, DIST_PRECISION_BITS);
398 } else {
399 p_vec0 = vhaddq_s32(p_vec0, sum0);
400 p_vec1 = vhaddq_s32(p_vec1, sum1);
401 }
402
403 const int offset_bits = bd + 2 * FILTER_BITS - round0;
404 const int round1 = COMPOUND_ROUND1_BITS;
405 const int res_sub_const =
406 (1 << (offset_bits - round1)) + (1 << (offset_bits - round1 - 1));
407 const int round_bits = 2 * FILTER_BITS - round0 - round1;
408
409 p_vec0 = vsubq_s32(p_vec0, vdupq_n_s32(res_sub_const));
410 p_vec1 = vsubq_s32(p_vec1, vdupq_n_s32(res_sub_const));
411
412 p_vec0 = vrshlq_s32(p_vec0, vdupq_n_s32(-round_bits));
413 p_vec1 = vrshlq_s32(p_vec1, vdupq_n_s32(-round_bits));
414 uint16x4_t res0 = clip_pixel_highbd_vec(p_vec0, bd);
415 uint16x4_t res1 = clip_pixel_highbd_vec(p_vec1, bd);
416 vst1_u16(dst16, res0);
417 vst1_u16(dst16 + 4, res1);
418 }
419
warp_affine_vertical(uint16_t * pred,int p_width,int p_height,int p_stride,int bd,uint16_t * dst,int dst_stride,bool is_compound,bool do_average,bool use_dist_wtd_comp_avg,int fwd,int bwd,int16_t gamma,int16_t delta,const int16x8_t * tmp,int i,int sy4,int j)420 static AOM_FORCE_INLINE void warp_affine_vertical(
421 uint16_t *pred, int p_width, int p_height, int p_stride, int bd,
422 uint16_t *dst, int dst_stride, bool is_compound, bool do_average,
423 bool use_dist_wtd_comp_avg, int fwd, int bwd, int16_t gamma, int16_t delta,
424 const int16x8_t *tmp, int i, int sy4, int j) {
425 int limit_height = p_height > 4 ? 8 : 4;
426
427 if (p_width > 4) {
428 // p_width == 8
429 for (int k = 0; k < limit_height; ++k) {
430 int sy = sy4 + delta * k;
431 highbd_vertical_filter_8x1_f8(
432 pred, p_stride, bd, dst, dst_stride, is_compound, do_average,
433 use_dist_wtd_comp_avg, fwd, bwd, gamma, tmp + k, i + k, sy, j);
434 }
435 } else {
436 // p_width == 4
437 for (int k = 0; k < limit_height; ++k) {
438 int sy = sy4 + delta * k;
439 highbd_vertical_filter_4x1_f4(
440 pred, p_stride, bd, dst, dst_stride, is_compound, do_average,
441 use_dist_wtd_comp_avg, fwd, bwd, gamma, tmp + k, i + k, sy, j);
442 }
443 }
444 }
445
highbd_warp_affine_common(const int32_t * mat,const uint16_t * ref,int width,int height,int stride,uint16_t * pred,int p_col,int p_row,int p_width,int p_height,int p_stride,int subsampling_x,int subsampling_y,int bd,ConvolveParams * conv_params,int16_t alpha,int16_t beta,int16_t gamma,int16_t delta)446 static AOM_FORCE_INLINE void highbd_warp_affine_common(
447 const int32_t *mat, const uint16_t *ref, int width, int height, int stride,
448 uint16_t *pred, int p_col, int p_row, int p_width, int p_height,
449 int p_stride, int subsampling_x, int subsampling_y, int bd,
450 ConvolveParams *conv_params, int16_t alpha, int16_t beta, int16_t gamma,
451 int16_t delta) {
452 uint16_t *const dst = conv_params->dst;
453 const int dst_stride = conv_params->dst_stride;
454 const bool is_compound = conv_params->is_compound;
455 const bool do_average = conv_params->do_average;
456 const bool use_dist_wtd_comp_avg = conv_params->use_dist_wtd_comp_avg;
457 const int fwd = conv_params->fwd_offset;
458 const int bwd = conv_params->bck_offset;
459
460 assert(IMPLIES(is_compound, dst != NULL));
461
462 for (int i = 0; i < p_height; i += 8) {
463 for (int j = 0; j < p_width; j += 8) {
464 // Calculate the center of this 8x8 block,
465 // project to luma coordinates (if in a subsampled chroma plane),
466 // apply the affine transformation,
467 // then convert back to the original coordinates (if necessary)
468 const int32_t src_x = (j + 4 + p_col) << subsampling_x;
469 const int32_t src_y = (i + 4 + p_row) << subsampling_y;
470 const int64_t dst_x =
471 (int64_t)mat[2] * src_x + (int64_t)mat[3] * src_y + (int64_t)mat[0];
472 const int64_t dst_y =
473 (int64_t)mat[4] * src_x + (int64_t)mat[5] * src_y + (int64_t)mat[1];
474 const int64_t x4 = dst_x >> subsampling_x;
475 const int64_t y4 = dst_y >> subsampling_y;
476
477 const int32_t ix4 = (int32_t)(x4 >> WARPEDMODEL_PREC_BITS);
478 int32_t sx4 = x4 & ((1 << WARPEDMODEL_PREC_BITS) - 1);
479 const int32_t iy4 = (int32_t)(y4 >> WARPEDMODEL_PREC_BITS);
480 int32_t sy4 = y4 & ((1 << WARPEDMODEL_PREC_BITS) - 1);
481
482 sx4 += alpha * (-4) + beta * (-4);
483 sy4 += gamma * (-4) + delta * (-4);
484
485 sx4 &= ~((1 << WARP_PARAM_REDUCE_BITS) - 1);
486 sy4 &= ~((1 << WARP_PARAM_REDUCE_BITS) - 1);
487
488 // Each horizontal filter result is formed by the sum of up to eight
489 // multiplications by filter values and then a shift. Although both the
490 // inputs and filters are loaded as int16, the input data is at most bd
491 // bits and the filters are at most 8 bits each. Additionally since we
492 // know all possible filter values we know that the sum of absolute
493 // filter values will fit in at most 9 bits. With this in mind we can
494 // conclude that the sum of each filter application will fit in bd + 9
495 // bits. The shift following the summation is ROUND0_BITS (which is 3),
496 // +2 for 12-bit, which gives us a final storage of:
497 // bd == 8: ( 8 + 9) - 3 => 14 bits
498 // bd == 10: (10 + 9) - 3 => 16 bits
499 // bd == 12: (12 + 9) - 5 => 16 bits
500 // So it is safe to use int16x8_t as the intermediate storage type here.
501 int16x8_t tmp[15];
502
503 warp_affine_horizontal(ref, width, height, stride, p_width, alpha, beta,
504 iy4, sx4, ix4, tmp, bd);
505 warp_affine_vertical(pred, p_width, p_height, p_stride, bd, dst,
506 dst_stride, is_compound, do_average,
507 use_dist_wtd_comp_avg, fwd, bwd, gamma, delta, tmp,
508 i, sy4, j);
509 }
510 }
511 }
512
513 #endif // AOM_AV1_COMMON_ARM_HIGHBD_WARP_PLANE_NEON_H_
514