1 /*
2 * Copyright (c) 2016, Alliance for Open Media. All rights reserved.
3 *
4 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 */
11
12 #ifndef AOM_AOM_DSP_X86_SYNONYMS_H_
13 #define AOM_AOM_DSP_X86_SYNONYMS_H_
14
15 #include <emmintrin.h>
16 #include <string.h>
17
18 #include "config/aom_config.h"
19
20 #include "aom/aom_integer.h"
21
22 /**
23 * Various reusable shorthands for x86 SIMD intrinsics.
24 *
25 * Intrinsics prefixed with xx_ operate on or return 128bit XMM registers.
26 * Intrinsics prefixed with yy_ operate on or return 256bit YMM registers.
27 */
28
29 // Loads and stores to do away with the tedium of casting the address
30 // to the right type.
xx_loadl_32(const void * a)31 static inline __m128i xx_loadl_32(const void *a) {
32 int val;
33 memcpy(&val, a, sizeof(val));
34 return _mm_cvtsi32_si128(val);
35 }
36
xx_loadl_64(const void * a)37 static inline __m128i xx_loadl_64(const void *a) {
38 return _mm_loadl_epi64((const __m128i *)a);
39 }
40
xx_load_128(const void * a)41 static inline __m128i xx_load_128(const void *a) {
42 return _mm_load_si128((const __m128i *)a);
43 }
44
xx_loadu_128(const void * a)45 static inline __m128i xx_loadu_128(const void *a) {
46 return _mm_loadu_si128((const __m128i *)a);
47 }
48
49 // Load 64 bits from each of hi and low, and pack into an SSE register
50 // Since directly loading as `int64_t`s and using _mm_set_epi64 may violate
51 // the strict aliasing rule, this takes a different approach
xx_loadu_2x64(const void * hi,const void * lo)52 static inline __m128i xx_loadu_2x64(const void *hi, const void *lo) {
53 return _mm_unpacklo_epi64(_mm_loadl_epi64((const __m128i *)lo),
54 _mm_loadl_epi64((const __m128i *)hi));
55 }
56
xx_storel_32(void * const a,const __m128i v)57 static inline void xx_storel_32(void *const a, const __m128i v) {
58 const int val = _mm_cvtsi128_si32(v);
59 memcpy(a, &val, sizeof(val));
60 }
61
xx_storel_64(void * const a,const __m128i v)62 static inline void xx_storel_64(void *const a, const __m128i v) {
63 _mm_storel_epi64((__m128i *)a, v);
64 }
65
xx_store_128(void * const a,const __m128i v)66 static inline void xx_store_128(void *const a, const __m128i v) {
67 _mm_store_si128((__m128i *)a, v);
68 }
69
xx_storeu_128(void * const a,const __m128i v)70 static inline void xx_storeu_128(void *const a, const __m128i v) {
71 _mm_storeu_si128((__m128i *)a, v);
72 }
73
74 // Fill an SSE register using an interleaved pair of values, ie. set the
75 // 8 channels to {a, b, a, b, a, b, a, b}, using the same channel ordering
76 // as when a register is stored to / loaded from memory.
77 //
78 // This is useful for rearranging filter kernels for use with the _mm_madd_epi16
79 // instruction
xx_set2_epi16(int16_t a,int16_t b)80 static inline __m128i xx_set2_epi16(int16_t a, int16_t b) {
81 return _mm_setr_epi16(a, b, a, b, a, b, a, b);
82 }
83
xx_round_epu16(__m128i v_val_w)84 static inline __m128i xx_round_epu16(__m128i v_val_w) {
85 return _mm_avg_epu16(v_val_w, _mm_setzero_si128());
86 }
87
xx_roundn_epu16(__m128i v_val_w,int bits)88 static inline __m128i xx_roundn_epu16(__m128i v_val_w, int bits) {
89 const __m128i v_s_w = _mm_srli_epi16(v_val_w, bits - 1);
90 return _mm_avg_epu16(v_s_w, _mm_setzero_si128());
91 }
92
xx_roundn_epu32(__m128i v_val_d,int bits)93 static inline __m128i xx_roundn_epu32(__m128i v_val_d, int bits) {
94 const __m128i v_bias_d = _mm_set1_epi32((1 << bits) >> 1);
95 const __m128i v_tmp_d = _mm_add_epi32(v_val_d, v_bias_d);
96 return _mm_srli_epi32(v_tmp_d, bits);
97 }
98
xx_roundn_epi16_unsigned(__m128i v_val_d,int bits)99 static inline __m128i xx_roundn_epi16_unsigned(__m128i v_val_d, int bits) {
100 const __m128i v_bias_d = _mm_set1_epi16((1 << bits) >> 1);
101 const __m128i v_tmp_d = _mm_add_epi16(v_val_d, v_bias_d);
102 return _mm_srai_epi16(v_tmp_d, bits);
103 }
104
105 // This is equivalent to ROUND_POWER_OF_TWO(v_val_d, bits)
xx_roundn_epi32_unsigned(__m128i v_val_d,int bits)106 static inline __m128i xx_roundn_epi32_unsigned(__m128i v_val_d, int bits) {
107 const __m128i v_bias_d = _mm_set1_epi32((1 << bits) >> 1);
108 const __m128i v_tmp_d = _mm_add_epi32(v_val_d, v_bias_d);
109 return _mm_srai_epi32(v_tmp_d, bits);
110 }
111
xx_roundn_epi16(__m128i v_val_d,int bits)112 static inline __m128i xx_roundn_epi16(__m128i v_val_d, int bits) {
113 const __m128i v_bias_d = _mm_set1_epi16((1 << bits) >> 1);
114 const __m128i v_sign_d = _mm_srai_epi16(v_val_d, 15);
115 const __m128i v_tmp_d =
116 _mm_add_epi16(_mm_add_epi16(v_val_d, v_bias_d), v_sign_d);
117 return _mm_srai_epi16(v_tmp_d, bits);
118 }
119
120 #endif // AOM_AOM_DSP_X86_SYNONYMS_H_
121