1 /*
2 * Copyright (c) 2018, Alliance for Open Media. All rights reserved.
3 *
4 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 */
11
12 #ifndef AOM_AOM_DSP_X86_OBMC_INTRINSIC_SSE4_H_
13 #define AOM_AOM_DSP_X86_OBMC_INTRINSIC_SSE4_H_
14
15 #include <smmintrin.h>
16
17 #include "aom_dsp/x86/obmc_intrinsic_ssse3.h"
18 #include "aom_dsp/x86/synonyms.h"
19
obmc_variance_w4(const uint8_t * pre,const int pre_stride,const int32_t * wsrc,const int32_t * mask,unsigned int * const sse,int * const sum,const int h)20 static inline void obmc_variance_w4(const uint8_t *pre, const int pre_stride,
21 const int32_t *wsrc, const int32_t *mask,
22 unsigned int *const sse, int *const sum,
23 const int h) {
24 const int pre_step = pre_stride - 4;
25 int n = 0;
26 __m128i v_sum_d = _mm_setzero_si128();
27 __m128i v_sse_d = _mm_setzero_si128();
28
29 assert(IS_POWER_OF_TWO(h));
30
31 do {
32 const __m128i v_p_b = xx_loadl_32(pre + n);
33 const __m128i v_m_d = _mm_load_si128((const __m128i *)(mask + n));
34 const __m128i v_w_d = _mm_load_si128((const __m128i *)(wsrc + n));
35
36 const __m128i v_p_d = _mm_cvtepu8_epi32(v_p_b);
37
38 // Values in both pre and mask fit in 15 bits, and are packed at 32 bit
39 // boundaries. We use pmaddwd, as it has lower latency on Haswell
40 // than pmulld but produces the same result with these inputs.
41 const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
42
43 const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
44 const __m128i v_rdiff_d = xx_roundn_epi32(v_diff_d, 12);
45 const __m128i v_sqrdiff_d = _mm_mullo_epi32(v_rdiff_d, v_rdiff_d);
46
47 v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
48 v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
49
50 n += 4;
51
52 if (n % 4 == 0) pre += pre_step;
53 } while (n < 4 * h);
54
55 *sum = xx_hsum_epi32_si32(v_sum_d);
56 *sse = xx_hsum_epi32_si32(v_sse_d);
57 }
58
59 #endif // AOM_AOM_DSP_X86_OBMC_INTRINSIC_SSE4_H_
60