1 /* 2 * Copyright (c) 2012-2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file renderhal_g9.h 24 //! \brief 25 //! 26 //! 27 //! \file renderhal_g9.h 28 //! \brief header file of Gen9 hardware functions 29 //! \details Gen9 hardware functions declare 30 //! 31 #ifndef __RENDERHAL_G9_H__ 32 #define __RENDERHAL_G9_H__ 33 34 #include "renderhal_platform_interface_legacy.h" 35 #include "mhw_render_hwcmd_g9_X.h" 36 #include "mhw_state_heap_hwcmd_g9_X.h" 37 #if (_RELEASE_INTERNAL || _DEBUG) 38 #if defined(CM_DIRECT_GUC_SUPPORT) 39 #include "mhw_mi_hwcmd_g9_X.h" 40 #endif 41 #endif 42 43 //! \brief for SKL GT2 VP and MDF 44 //! SLM URB DC RO Rest 45 //! 1 128 0 0 384 (KB chunks based on GT2) 46 #define RENDERHAL_L3_CACHE_CONFIG_CNTLREG_VALUE_G9_RENDERHAL (0x60000060) 47 #define RENDERHAL_L3_CACHE_SLM_CONFIG_CNTLREG_VALUE_G9_RENDERHAL (0x60000121) 48 #define RENDERHAL_SAMPLERS_AVS_G9 6 49 50 //! 51 //! \brief L3 cache CNTLREG value with SLM disabled 52 //! SLM URB Rest DC RO I/S C T 53 //! { 0, 256, 512, 0, 0, 0, 0, 0 } 54 //! 55 #define RENDERHAL_L3_CACHE_CNTL_REG_SLM_DISABLE_ALL_L3_512K_G9 (0x80000040) 56 57 //! 58 //! \brief L3 cache CNTLREG value with SLM enabled 59 //! SLM URB Rest DC RO I/S C T Sum 60 //! { 192, 128, 0, 256, 128, 0, 0, 0 } 61 #define RENDERHAL_L3_CACHE_CNTL_REG_SLM_ENABLE_G9 (0x00808021) 62 63 // SKL L3 Control Register Definition 64 typedef struct _RENDERHAL_L3_CONTROL_REGISTER_G9 65 { 66 // uint32_t 0 67 union _DW0 68 { 69 struct _BitField 70 { 71 uint32_t SlmModeEnable : BITFIELD_BIT( 0 ); // 72 uint32_t UrbAllocation : BITFIELD_RANGE( 1,7 ); // 73 uint32_t GpgpuL3CreditModeEnable : BITFIELD_BIT( 8 ); // 74 uint32_t ErrorDetectionBehaviorControl : BITFIELD_BIT( 9 ); // 75 uint32_t Reserved0 : BITFIELD_BIT( 10 ); // 76 uint32_t ReadOnlyClientPool : BITFIELD_RANGE( 11,17 ); // 77 uint32_t DcWayAssignment : BITFIELD_RANGE( 18,24 ); // 78 uint32_t AllL3ClientPool : BITFIELD_RANGE( 25,31 ); // 79 } BitField; 80 81 uint32_t Value; 82 } DW0; 83 84 } RENDERHAL_L3_CONTROL_REGISTER_G9, *PRENDERHAL_L3_CONTROL_REGISTER_G9; 85 86 #define CM_L3_CACHE_CONFIG_CNTLREG_VALUE_G9 0x60000121 87 88 #if (_RELEASE_INTERNAL || _DEBUG) 89 #if defined (CM_DIRECT_GUC_SUPPORT) 90 typedef struct _WORK_QUEUE_CMD_GUC 91 { 92 UK_SCHED_WORK_QUEUE_ITEM_HEADER WorkQueueItemHeader; 93 mhw_mi_g9_X::MI_BATCH_BUFFER_START_CMD BatchBufferStartCmd; 94 } WORK_QUEUE_CMD_GUC, *PWORK_QUEUE_CMD_GUC; 95 #endif 96 #endif 97 class XRenderHal_Interface_g9 : public XRenderHal_Platform_Interface_Legacy 98 { 99 public: XRenderHal_Interface_g9()100 XRenderHal_Interface_g9() {} ~XRenderHal_Interface_g9()101 virtual ~XRenderHal_Interface_g9() {} 102 103 //! 104 //! \brief Setup Surface State 105 //! \details Setup Surface States for Gen9 106 //! \param PRENDERHAL_INTERFACE pRenderHal 107 //! [in] Pointer to Hardware Interface Structure 108 //! \param PRENDERHAL_SURFACE pRenderHalSurface 109 //! [in] Pointer to Render Hal Surface 110 //! \param PRENDERHAL_SURFACE_STATE_PARAMS pParams 111 //! [in] Pointer to Surface State Params 112 //! \param int32_t *piNumEntries 113 //! [out] Pointer to Number of Surface State Entries (Num Planes) 114 //! \param PRENDERHAL_SURFACE_STATE_ENTRY * ppSurfaceEntries 115 //! [out] Array of Surface State Entries 116 //! \param PRENDERHAL_OFFSET_OVERRIDE pOffsetOverride 117 //! [in] If not nullptr, provides adjustments to Y, UV plane offsets, 118 //! used for kernel WA in a few cases. nullptr is the most common usage. 119 //! \return MOS_STATUS 120 //! 121 MOS_STATUS SetupSurfaceState( 122 PRENDERHAL_INTERFACE pRenderHal, 123 PRENDERHAL_SURFACE pRenderHalSurface, 124 PRENDERHAL_SURFACE_STATE_PARAMS pParams, 125 int32_t *piNumEntries, 126 PRENDERHAL_SURFACE_STATE_ENTRY *ppSurfaceEntries, 127 PRENDERHAL_OFFSET_OVERRIDE pOffsetOverride); 128 129 //! 130 //! \brief Check if Sampler128Elements is supported 131 //! \return true of false 132 //! IsSampler128ElementsSupported()133 virtual inline bool IsSampler128ElementsSupported() { return true; } 134 135 //! 136 //! \brief Checks how per thread scratch space size bits in VFE state are interpreted by HW 137 //! \details For BDW GT1/2/3 A0 steppings, per thread scratch space size in VFE state 138 //! is 11 bits indicating [2k bytes, 2 Mbytes]: 0=2k, 1=4k, 2=8k ... 10=2M 139 //! BDW+ excluding A0 step is 12 bits indicating [1k bytes, 2 Mbytes]: 0=1k, 1=2k, 2=4k, 3=8k ... 11=2M 140 //! \param PRENDERHAL_INTERFACE pRenderHal 141 //! [in] Pointer to RenderHal interface 142 //! \return true if BDW A0 stepping, false otherwise 143 //! PerThreadScratchSpaceStart2K(PRENDERHAL_INTERFACE pRenderHal)144 bool PerThreadScratchSpaceStart2K(PRENDERHAL_INTERFACE pRenderHal) {return false; } 145 146 //! 147 //! \brief Encode SLM Size for Interface Descriptor 148 //! \details Setup SLM size 149 //! \param uint32_t SLMSize 150 //! [in] SLM size in 1K 151 //! \return encoded output 152 //! 153 uint32_t EncodeSLMSize(uint32_t SLMSize); 154 155 //! 156 //! \brief Set Chroma Direction 157 //! \details Setup Chroma Direction for G9 158 //! \param PRENDERHAL_INTERFACE pRenderHal 159 //! [in] Pointer to Hardware Interface 160 //! \param PRENDERHAL_SURFACE pRenderHalSurface 161 //! [in] Pointer to Render Hal Surface 162 //! \return uint8_t 163 //! 164 uint8_t SetChromaDirection( 165 PRENDERHAL_INTERFACE pRenderHal, 166 PRENDERHAL_SURFACE pRenderHalSurface); 167 168 //! 169 //! \brief Convert To Nano Seconds 170 //! \details Convert to Nano Seconds 171 //! \param PRENDERHAL_INTERFACE pRenderHal 172 //! [in] Pointer to Hardware Interface Structure 173 //! \param uint64_t iTicks 174 //! [in] Ticks 175 //! \param uint64_t *piNs 176 //! [in] Nano Seconds 177 //! \return void 178 //! 179 void ConvertToNanoSeconds( 180 PRENDERHAL_INTERFACE pRenderHal, 181 uint64_t iTicks, 182 uint64_t *piNs); 183 184 //! 185 //! \brief Initialize the State Heap Settings per platform 186 //! \param PRENDERHAL_INTERFACE pRenderHal 187 //! [out] Pointer to PRENDERHAL_INTERFACE 188 //! \return void 189 //! 190 void InitStateHeapSettings( 191 PRENDERHAL_INTERFACE pRenderHal); 192 193 //! 194 //! \brief Initialize the default surface type and advanced surface type per platform 195 //! \param PRENDERHAL_INTERFACE pRenderHal 196 //! [out] Pointer to PRENDERHAL_INTERFACE 197 //! \return void 198 //! 199 void InitSurfaceTypes( 200 PRENDERHAL_INTERFACE pRenderHal); 201 202 //! 203 //! \brief Check if YV12 Single Pass is supported 204 //! \param PRENDERHAL_INTERFACE pRenderHal 205 //! [in] Pointer to Hardware Interface 206 //! \return true of false 207 //! IsEnableYV12SinglePass(PRENDERHAL_INTERFACE pRenderHal)208 inline bool IsEnableYV12SinglePass( 209 PRENDERHAL_INTERFACE pRenderHal) 210 { 211 return MEDIA_IS_WA(pRenderHal->pWaTable, WaEnableYV12BugFixInHalfSliceChicken7); 212 } 213 214 //! 215 //! \brief Get the Size of AVS Sampler State 216 //! \param PRENDERHAL_INTERFACE pRenderHal 217 //! [in] Pointer to Hardware Interface 218 //! \return size 219 //! GetSizeSamplerStateAvs(PRENDERHAL_INTERFACE pRenderHal)220 inline uint32_t GetSizeSamplerStateAvs( 221 PRENDERHAL_INTERFACE pRenderHal) 222 { 223 return 2 * pRenderHal->pHwSizes->dwSizeSamplerStateAvs;// Kernel using 1,3,5 sampler index for AVS sampler state. 224 } 225 226 //! 227 //! \brief Enables L3 cacheing flag and sets related registers/values 228 //! \param PRENDERHAL_INTERFACE pRenderHal 229 //! [in] Pointer to Hardware Interface 230 //! \param pCacheSettings 231 //! [in] L3 Cache Configurations 232 //! \return MOS_STATUS 233 //! MOS_STATUS_SUCCESS if success, else fail reason 234 //! 235 virtual MOS_STATUS EnableL3Caching( 236 PRENDERHAL_INTERFACE pRenderHal, 237 PRENDERHAL_L3_CACHE_SETTINGS pCacheSettings); 238 239 //! 240 //! \brief Get offset and/or pointer to sampler state 241 //! \details Get offset and/or pointer to sampler state in General State Heap 242 //! \param PRENDERHAL_INTERFACE pRenderHal 243 //! [in] Pointer to RenderHal Interface 244 //! \param int32_t iMediaID 245 //! [in] Media ID associated with sampler 246 //! \param int32_t iSamplerID 247 //! [in] Sampler ID 248 //! \param uint32_t *pdwSamplerOffset 249 //! [out] optional; offset of sampler state from GSH base 250 //! \param void **ppSampler 251 //! [out] optional; pointer to sampler state in GSH 252 //! \return MOS_STATUS 253 //! 254 virtual MOS_STATUS GetSamplerOffsetAndPtr_DSH( 255 PRENDERHAL_INTERFACE pRenderHal, 256 int32_t iMediaID, 257 int32_t iSamplerID, 258 PMHW_SAMPLER_STATE_PARAM pSamplerParams, 259 uint32_t *pdwSamplerOffset, 260 void **ppSampler); 261 262 //! 263 //! \brief Initialize the DSH Settings 264 //! \details Initialize the structure DynamicHeapSettings in pRenderHal 265 //! \param PRENDERHAL_INTERFACE pRenderHal 266 //! [in] Pointer to HW interface 267 //! \return void 268 //! 269 virtual void InitDynamicHeapSettings( 270 PRENDERHAL_INTERFACE pRenderHal); 271 272 //! 273 //! \brief Get the pointer to the MHW_VFE_PARAMS 274 //! \return MHW_VFE_PARAMS* 275 //! pointer to the MHW_VFE_PARAMS 276 //! GetVfeStateParameters()277 virtual MHW_VFE_PARAMS* GetVfeStateParameters() { return &m_vfeStateParams; } 278 279 //! 280 //! \brief Set Power Option Status 281 //! \param [in] pRenderHal 282 //! Pointer to Hardware Interface 283 //! \param [in,out] pCmdBuffer 284 //! Pointer to Command Buffer 285 //! \return MOS_STATUS 286 //! MOS_STATUS_SUCCESS if success, else fail reason 287 //! 288 virtual MOS_STATUS SetPowerOptionStatus( 289 PRENDERHAL_INTERFACE pRenderHal, 290 PMOS_COMMAND_BUFFER pCmdBuffer); 291 292 //! 293 //! \brief Set L3 cache override config parameters 294 //! \param [in] pRenderHal 295 //! Pointer to RenderHal Interface Structure 296 //! \param [in,out] pCacheSettings 297 //! Pointer to pCacheSettings 298 //! \param [in] bEnableSLM 299 //! Flag to enable SLM 300 //! \return MOS_STATUS 301 //! MOS_STATUS_SUCCESS if success. Error code otherwise 302 //! 303 virtual MOS_STATUS SetCacheOverrideParams( 304 PRENDERHAL_INTERFACE pRenderHal, 305 PRENDERHAL_L3_CACHE_SETTINGS pCacheSettings, 306 bool bEnableSLM); 307 308 //! \brief Get the size of Render Surface State Command 309 //! \return size_t 310 //! the size of render surface state command 311 virtual size_t GetSurfaceStateCmdSize(); 312 313 //! \brief Get the address of the ith Palette Data 314 //! \param [in] i 315 //! Index of the palette data 316 //! \return void * 317 //! address of the ith palette data table GetPaletteDataAddress(int i)318 virtual void* GetPaletteDataAddress(int i) {return &m_paletteData[i];} 319 320 //! \brief Get the size of Binding Table State Command 321 //! \return size_t 322 //! the size of binding table state command GetBTStateCmdSize()323 virtual size_t GetBTStateCmdSize() {return mhw_state_heap_g9_X::BINDING_TABLE_STATE_CMD::byteSize;} 324 325 //! \brief Check if compute context in use 326 //! \param PRENDERHAL_INTERFACE pRenderHal 327 //! [in] Pointer to Hardware Interface 328 //! \return true of false IsComputeContextInUse(PRENDERHAL_INTERFACE pRenderHal)329 virtual bool IsComputeContextInUse(PRENDERHAL_INTERFACE pRenderHal) 330 { 331 MOS_UNUSED(pRenderHal); 332 return false; 333 } 334 protected: 335 MHW_VFE_PARAMS m_vfeStateParams; 336 mhw_render_g9_X::PALETTE_ENTRY_CMD 337 m_paletteData[RENDERHAL_PALETTE_MAX][RENDERHAL_PALETTE_ENTRIES_MAX]; 338 }; 339 340 #endif // __RENDERHAL_G9_H__ 341