1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #include "drm_mode.h"
26 #include "drm_fourcc.h"
27 #include "igt.h"
28
29 IGT_TEST_DESCRIPTION("CRC test all different plane modes which kernel advertises.");
30
31 typedef struct {
32 int gfx_fd;
33 igt_display_t display;
34 enum igt_commit_style commit;
35
36 struct igt_fb fb;
37 struct igt_fb primary_fb;
38
39 union {
40 char name[5];
41 uint32_t dword;
42 } format;
43 bool separateprimaryplane;
44
45 uint32_t gem_handle;
46 uint32_t gem_handle_yuv;
47 unsigned int size;
48 unsigned char* buf;
49
50 /*
51 * comparison crcs
52 */
53 igt_pipe_crc_t *pipe_crc;
54
55 igt_crc_t cursor_crc;
56 igt_crc_t fullscreen_crc;
57 } data_t;
58
59
do_write(int fd,int handle,void * buf,int size)60 static void do_write(int fd, int handle, void *buf, int size)
61 { void *screenbuf;
62
63 gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
64 screenbuf = gem_mmap__gtt(fd, handle, size, PROT_WRITE);
65 memcpy(screenbuf, buf, size);
66 gem_munmap(screenbuf, size);
67 gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
68 gem_sync(fd, handle);
69 }
70
71
generate_comparison_crc_list(data_t * data,igt_output_t * output)72 static void generate_comparison_crc_list(data_t *data, igt_output_t *output)
73 {
74 drmModeModeInfo *mode;
75 uint64_t w, h;
76 int fbid;
77 cairo_t *cr;
78 igt_plane_t *primary;
79
80 mode = igt_output_get_mode(output);
81 fbid = igt_create_color_fb(data->gfx_fd,
82 mode->hdisplay,
83 mode->vdisplay,
84 DRM_FORMAT_XRGB8888,
85 LOCAL_DRM_FORMAT_MOD_NONE,
86 0, 0, 0,
87 &data->primary_fb);
88
89 igt_assert(fbid);
90
91 drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_WIDTH, &w);
92 drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_HEIGHT, &h);
93
94 cr = igt_get_cairo_ctx(data->gfx_fd, &data->primary_fb);
95 igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay,
96 0.0, 0.0, 0.0);
97 igt_paint_color(cr, 0, 0, w, h, 1.0, 1.0, 1.0);
98 igt_assert(cairo_status(cr) == 0);
99 igt_put_cairo_ctx(data->gfx_fd, &data->primary_fb, cr);
100
101 primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
102 igt_plane_set_fb(primary, &data->primary_fb);
103 igt_display_commit2(&data->display, data->commit);
104
105 igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, &data->cursor_crc);
106 igt_plane_set_fb(primary, NULL);
107 igt_display_commit2(&data->display, data->commit);
108
109 cr = igt_get_cairo_ctx(data->gfx_fd, &data->primary_fb);
110 igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay, 1.0, 1.0, 1.0);
111 igt_put_cairo_ctx(data->gfx_fd, &data->primary_fb, cr);
112
113 igt_plane_set_fb(primary, &data->primary_fb);
114 igt_display_commit2(&data->display, data->commit);
115
116 igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, &data->fullscreen_crc);
117
118 igt_remove_fb(data->gfx_fd, &data->primary_fb);
119 }
120
121 static const struct {
122 uint32_t fourcc;
123 char zeropadding;
124 enum { BYTES_PP_1 = 1,
125 BYTES_PP_4 = 4} bpp;
126 uint32_t value;
127 } fillers[] = {
128 { DRM_FORMAT_XBGR2101010, 0, BYTES_PP_4, 0xffffffff},
129 { 0, 0, 0, 0 }
130 };
131
132 /*
133 * fill_in_fb tell in return value if selected mode should be
134 * proceed to crc check
135 */
fill_in_fb(data_t * data,igt_output_t * output,igt_plane_t * plane,uint32_t format)136 static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
137 uint32_t format)
138 {
139 signed i, c, writesize;
140 unsigned int* ptemp_32_buf;
141
142 for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
143 if (fillers[i].fourcc == format)
144 break;
145 }
146
147 switch (fillers[i].bpp) {
148 case BYTES_PP_4:
149 ptemp_32_buf = (unsigned int*)data->buf;
150 for (c = 0; c < data->size/4; c++)
151 ptemp_32_buf[c] = fillers[i].value;
152 writesize = data->size;
153 break;
154 case BYTES_PP_1:
155 memset((void *)data->buf, fillers[i].value, data->size);
156 writesize = data->size;
157 break;
158 default:
159 igt_assert_f(0, "unknown bpp");
160 }
161
162 do_write(data->gfx_fd, data->gem_handle, (void*)data->buf, writesize);
163 return true;
164 }
165
166
setup_fb(data_t * data,igt_output_t * output,igt_plane_t * plane,uint32_t format)167 static bool setup_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
168 uint32_t format)
169 {
170 drmModeModeInfo *mode;
171 uint64_t w, h;
172 signed ret, gemsize = 0;
173 unsigned tile_width, tile_height;
174 int num_planes = 1;
175 uint64_t tiling;
176 int bpp = 0;
177 int i;
178
179 mode = igt_output_get_mode(output);
180 if (plane->type != DRM_PLANE_TYPE_CURSOR) {
181 w = mode->hdisplay;
182 h = mode->vdisplay;
183 tiling = LOCAL_I915_FORMAT_MOD_X_TILED;
184 } else {
185 drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_WIDTH, &w);
186 drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_HEIGHT, &h);
187 tiling = LOCAL_DRM_FORMAT_MOD_NONE;
188 }
189
190 for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
191 if (fillers[i].fourcc == format)
192 break;
193 }
194
195 switch (fillers[i].bpp) {
196 case BYTES_PP_1:
197 bpp = 8;
198 break;
199 case BYTES_PP_4:
200 bpp = 32;
201 break;
202 default:
203 igt_assert_f(0, "unknown bpp");
204 }
205
206 igt_get_fb_tile_size(data->gfx_fd, tiling, bpp,
207 &tile_width, &tile_height);
208 data->fb.offsets[0] = 0;
209 data->fb.strides[0] = ALIGN(w * bpp / 8, tile_width);
210 gemsize = data->size = data->fb.strides[0] * ALIGN(h, tile_height);
211 data->buf = (unsigned char *)calloc(data->size*2, 1);
212
213 data->gem_handle = gem_create(data->gfx_fd, gemsize);
214 ret = __gem_set_tiling(data->gfx_fd, data->gem_handle,
215 igt_fb_mod_to_tiling(tiling),
216 data->fb.strides[0]);
217
218 data->fb.gem_handle = data->gem_handle;
219 data->fb.width = w;
220 data->fb.height = h;
221 fill_in_fb(data, output, plane, format);
222
223 igt_assert_eq(ret, 0);
224
225 ret = __kms_addfb(data->gfx_fd, data->gem_handle, w, h,
226 format, tiling, data->fb.strides, data->fb.offsets,
227 num_planes, LOCAL_DRM_MODE_FB_MODIFIERS,
228 &data->fb.fb_id);
229
230 if(ret < 0) {
231 igt_info("Creating fb for format %s failed, return code %d\n",
232 (char*)&data->format.name, ret);
233
234 return false;
235 }
236
237 return true;
238 }
239
240
remove_fb(data_t * data,igt_output_t * output,igt_plane_t * plane)241 static void remove_fb(data_t* data, igt_output_t* output, igt_plane_t* plane)
242 {
243 if (data->separateprimaryplane) {
244 igt_plane_t* primary = igt_output_get_plane_type(output,
245 DRM_PLANE_TYPE_PRIMARY);
246 igt_plane_set_fb(primary, NULL);
247 igt_remove_fb(data->gfx_fd, &data->primary_fb);
248 data->separateprimaryplane = false;
249 }
250
251 igt_remove_fb(data->gfx_fd, &data->fb);
252 free(data->buf);
253 data->buf = NULL;
254 }
255
256
prepare_crtc(data_t * data,igt_output_t * output,igt_plane_t * plane,uint32_t format)257 static bool prepare_crtc(data_t *data, igt_output_t *output,
258 igt_plane_t *plane, uint32_t format)
259 {
260 drmModeModeInfo *mode;
261 igt_plane_t *primary;
262
263 if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
264 mode = igt_output_get_mode(output);
265 igt_create_color_fb(data->gfx_fd,
266 mode->hdisplay, mode->vdisplay,
267 DRM_FORMAT_XRGB8888,
268 LOCAL_DRM_FORMAT_MOD_NONE,
269 0, 0, 0,
270 &data->primary_fb);
271
272 primary = igt_output_get_plane_type(output,
273 DRM_PLANE_TYPE_PRIMARY);
274
275 igt_plane_set_fb(primary, &data->primary_fb);
276 igt_display_commit2(&data->display, data->commit);
277 data->separateprimaryplane = true;
278 }
279
280 if (!setup_fb(data, output, plane, format))
281 return false;
282
283 return true;
284 }
285
286
287 static int
test_one_mode(data_t * data,igt_output_t * output,igt_plane_t * plane,int mode,enum pipe pipe)288 test_one_mode(data_t* data, igt_output_t *output, igt_plane_t* plane,
289 int mode, enum pipe pipe)
290 {
291 igt_crc_t current_crc;
292 signed rVal = 0;
293 int i;
294
295 /*
296 * Limit tests only to those fb formats listed in fillers table
297 */
298 for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
299 if (fillers[i].fourcc == mode)
300 break;
301 }
302
303 if (fillers[i].bpp == 0)
304 return false;
305
306 if (prepare_crtc(data, output, plane, mode)) {
307 igt_plane_set_fb(plane, &data->fb);
308 igt_fb_set_size(&data->fb, plane, data->fb.width, data->fb.height);
309 igt_plane_set_size(plane, data->fb.width, data->fb.height);
310 igt_fb_set_position(&data->fb, plane, 0, 0);
311 igt_display_commit2(&data->display, data->commit);
312
313 igt_wait_for_vblank(data->gfx_fd, pipe);
314 igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, ¤t_crc);
315
316 if (plane->type != DRM_PLANE_TYPE_CURSOR) {
317 if (!igt_check_crc_equal(¤t_crc,
318 &data->fullscreen_crc)) {
319 igt_warn("crc mismatch. connector %s using pipe %s" \
320 " plane index %d mode %.4s\n",
321 igt_output_name(output),
322 kmstest_pipe_name(pipe),
323 plane->index,
324 (char *)&mode);
325 rVal++;
326 }
327 } else {
328 if (!igt_check_crc_equal(¤t_crc,
329 &data->cursor_crc)) {
330 igt_warn("crc mismatch. connector %s using pipe %s" \
331 " plane index %d mode %.4s\n",
332 igt_output_name(output),
333 kmstest_pipe_name(pipe),
334 plane->index,
335 (char *)&mode);
336 rVal++;
337 }
338 }
339 }
340 remove_fb(data, output, plane);
341 return rVal;
342 }
343
344
345 static void
test_available_modes(data_t * data)346 test_available_modes(data_t* data)
347 {
348 igt_output_t *output;
349 igt_plane_t *plane;
350 int modeindex;
351 enum pipe pipe;
352 int invalids = 0, i, lut_size;
353 drmModePlane *modePlane;
354
355 struct {
356 uint16_t red;
357 uint16_t green;
358 uint16_t blue;
359 uint16_t reserved;
360 } *lut = NULL;
361
362 for_each_pipe_with_valid_output(&data->display, pipe, output) {
363 igt_output_set_pipe(output, pipe);
364 igt_display_commit2(&data->display, data->commit);
365
366 if (igt_pipe_obj_has_prop(&data->display.pipes[pipe], IGT_CRTC_GAMMA_LUT_SIZE)) {
367 lut_size = igt_pipe_get_prop(&data->display, pipe,
368 IGT_CRTC_GAMMA_LUT_SIZE);
369
370 lut = calloc(sizeof(*lut), lut_size);
371
372 for (i = 0; i < lut_size; i++) {
373 lut[i].red = (i * 0xffff / (lut_size - 1)) & 0xfc00;
374 lut[i].green = (i * 0xffff / (lut_size - 1)) & 0xfc00;
375 lut[i].blue = (i * 0xffff / (lut_size - 1)) & 0xfc00;
376 }
377
378 igt_pipe_replace_prop_blob(&data->display, pipe,
379 IGT_CRTC_GAMMA_LUT,
380 lut, sizeof(*lut) * lut_size);
381 igt_display_commit2(&data->display, data->commit);
382
383 for (i = 0; i < lut_size; i++) {
384 lut[i].red = i * 0xffff / (lut_size - 1);
385 lut[i].green = i * 0xffff / (lut_size - 1);
386 lut[i].blue = i * 0xffff / (lut_size - 1);
387 }
388 }
389
390 data->pipe_crc = igt_pipe_crc_new(data->gfx_fd, pipe,
391 INTEL_PIPE_CRC_SOURCE_AUTO);
392
393 igt_pipe_crc_start(data->pipe_crc);
394
395 /*
396 * regenerate comparison crcs for each pipe just in case.
397 */
398 generate_comparison_crc_list(data, output);
399
400 for_each_plane_on_pipe(&data->display, pipe, plane) {
401 modePlane = drmModeGetPlane(data->gfx_fd,
402 plane->drm_plane->plane_id);
403
404 if (plane->type == DRM_PLANE_TYPE_CURSOR)
405 continue;
406
407 for (modeindex = 0;
408 modeindex < modePlane->count_formats;
409 modeindex++) {
410 data->format.dword = modePlane->formats[modeindex];
411
412 invalids += test_one_mode(data, output,
413 plane,
414 modePlane->formats[modeindex],
415 pipe);
416 }
417 drmModeFreePlane(modePlane);
418 }
419 igt_pipe_crc_stop(data->pipe_crc);
420 igt_pipe_crc_free(data->pipe_crc);
421
422 if (lut != NULL) {
423 igt_pipe_replace_prop_blob(&data->display, pipe,
424 IGT_CRTC_GAMMA_LUT,
425 lut, sizeof(*lut) * lut_size);
426 free(lut);
427 lut = NULL;
428 }
429
430 igt_output_set_pipe(output, PIPE_NONE);
431 igt_display_commit2(&data->display, data->commit);
432 }
433 igt_assert(invalids == 0);
434 }
435
436
437 igt_main
438 {
439 data_t data = {};
440
441 igt_skip_on_simulation();
442
443 igt_fixture {
444 data.gfx_fd = drm_open_driver_master(DRIVER_INTEL);
445 kmstest_set_vt_graphics_mode();
446 igt_display_require(&data.display, data.gfx_fd);
447 igt_require_pipe_crc(data.gfx_fd);
448 }
449
450 data.commit = data.display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
451
452 igt_subtest("available_mode_test_crc") {
453 test_available_modes(&data);
454 }
455
456 igt_fixture {
457 kmstest_restore_vt_mode();
458 igt_display_fini(&data.display);
459 }
460 }
461