xref: /aosp_15_r20/external/igt-gpu-tools/tests/i915/gem_exec_big.c (revision d83cc019efdc2edc6c4b16e9034a3ceb8d35d77c)
1 /*
2  * Copyright © 2011,2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Chris Wilson <[email protected]>
25  *    Daniel Vetter <[email protected]>
26  *
27  */
28 
29 /*
30  * Testcase: run a nop batch which is really big
31  *
32  * Mostly useful to stress-test the error-capture code
33  */
34 
35 #include "igt.h"
36 #include <unistd.h>
37 #include <stdlib.h>
38 #include <stdint.h>
39 #include <stdio.h>
40 #include <string.h>
41 #include <fcntl.h>
42 #include <inttypes.h>
43 #include <errno.h>
44 #include <sys/stat.h>
45 #include <sys/ioctl.h>
46 #include <sys/time.h>
47 #include "drm.h"
48 
49 IGT_TEST_DESCRIPTION("Run a large nop batch to stress test the error capture"
50 		     " code.");
51 
52 #define FORCE_PREAD_PWRITE 0
53 
54 static int use_64bit_relocs;
55 
exec1(int fd,uint32_t handle,uint64_t reloc_ofs,unsigned flags,char * ptr)56 static void exec1(int fd, uint32_t handle, uint64_t reloc_ofs, unsigned flags, char *ptr)
57 {
58 	struct drm_i915_gem_execbuffer2 execbuf;
59 	struct drm_i915_gem_exec_object2 gem_exec[1];
60 	struct drm_i915_gem_relocation_entry gem_reloc[1];
61 
62 	gem_reloc[0].offset = reloc_ofs;
63 	gem_reloc[0].delta = 0;
64 	gem_reloc[0].target_handle = handle;
65 	gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
66 	gem_reloc[0].write_domain = 0;
67 	gem_reloc[0].presumed_offset = 0;
68 
69 	gem_exec[0].handle = handle;
70 	gem_exec[0].relocation_count = 1;
71 	gem_exec[0].relocs_ptr = to_user_pointer(gem_reloc);
72 	gem_exec[0].alignment = 0;
73 	gem_exec[0].offset = 0;
74 	gem_exec[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
75 	gem_exec[0].rsvd1 = 0;
76 	gem_exec[0].rsvd2 = 0;
77 
78 	execbuf.buffers_ptr = to_user_pointer(gem_exec);
79 	execbuf.buffer_count = 1;
80 	execbuf.batch_start_offset = 0;
81 	execbuf.batch_len = 8;
82 	execbuf.cliprects_ptr = 0;
83 	execbuf.num_cliprects = 0;
84 	execbuf.DR1 = 0;
85 	execbuf.DR4 = 0;
86 	execbuf.flags = flags;
87 	i915_execbuffer2_set_context_id(execbuf, 0);
88 	execbuf.rsvd2 = 0;
89 
90 	/* Avoid hitting slowpaths in the reloc processing which might yield a
91 	 * presumed_offset of -1. Happens when the batch is still busy from the
92 	 * last round. */
93 	gem_sync(fd, handle);
94 
95 	gem_execbuf(fd, &execbuf);
96 
97 	igt_warn_on(gem_reloc[0].presumed_offset == -1);
98 
99 	if (use_64bit_relocs) {
100 		uint64_t tmp;
101 		if (ptr)
102 			tmp = *(uint64_t *)(ptr+reloc_ofs);
103 		else
104 			gem_read(fd, handle, reloc_ofs, &tmp, sizeof(tmp));
105 		igt_assert_eq(tmp, gem_reloc[0].presumed_offset);
106 	} else {
107 		uint32_t tmp;
108 		if (ptr)
109 			tmp = *(uint32_t *)(ptr+reloc_ofs);
110 		else
111 			gem_read(fd, handle, reloc_ofs, &tmp, sizeof(tmp));
112 		igt_assert_eq(tmp, gem_reloc[0].presumed_offset);
113 	}
114 }
115 
xchg_reloc(void * array,unsigned i,unsigned j)116 static void xchg_reloc(void *array, unsigned i, unsigned j)
117 {
118 	struct drm_i915_gem_relocation_entry *reloc = array;
119 	struct drm_i915_gem_relocation_entry *a = &reloc[i];
120 	struct drm_i915_gem_relocation_entry *b = &reloc[j];
121 	struct drm_i915_gem_relocation_entry tmp;
122 
123 	tmp = *a;
124 	*a = *b;
125 	*b = tmp;
126 }
127 
execN(int fd,uint32_t handle,uint64_t batch_size,unsigned flags,char * ptr)128 static void execN(int fd, uint32_t handle, uint64_t batch_size, unsigned flags, char *ptr)
129 {
130 #define reloc_ofs(N, T) ((((N)+1) << 12) - 4*(1 + ((N) == ((T)-1))))
131 	struct drm_i915_gem_execbuffer2 execbuf;
132 	struct drm_i915_gem_exec_object2 gem_exec[1];
133 	struct drm_i915_gem_relocation_entry *gem_reloc;
134 	uint64_t n, nreloc = batch_size >> 12;
135 
136 	gem_reloc = calloc(nreloc, sizeof(*gem_reloc));
137 	igt_assert(gem_reloc);
138 
139 	for (n = 0; n < nreloc; n++) {
140 		gem_reloc[n].offset = reloc_ofs(n, nreloc);
141 		gem_reloc[n].target_handle = handle;
142 		gem_reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
143 		gem_reloc[n].presumed_offset = n ^ 0xbeefdeaddeadbeef;
144 		if (ptr) {
145 			if (use_64bit_relocs)
146 				*(uint64_t *)(ptr + gem_reloc[n].offset) = gem_reloc[n].presumed_offset;
147 			else
148 				*(uint32_t *)(ptr + gem_reloc[n].offset) = gem_reloc[n].presumed_offset;
149 		} else
150 			gem_write(fd, handle, gem_reloc[n].offset, &gem_reloc[n].presumed_offset, 4*(1+use_64bit_relocs));
151 	}
152 
153 	memset(gem_exec, 0, sizeof(gem_exec));
154 	gem_exec[0].handle = handle;
155 	gem_exec[0].relocation_count = nreloc;
156 	gem_exec[0].relocs_ptr = to_user_pointer(gem_reloc);
157 	gem_exec[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
158 
159 	memset(&execbuf, 0, sizeof(execbuf));
160 	execbuf.buffers_ptr = to_user_pointer(gem_exec);
161 	execbuf.buffer_count = 1;
162 	execbuf.flags = flags;
163 
164 	/* Avoid hitting slowpaths in the reloc processing which might yield a
165 	 * presumed_offset of -1. Happens when the batch is still busy from the
166 	 * last round. */
167 	gem_sync(fd, handle);
168 
169 	igt_permute_array(gem_reloc, nreloc, xchg_reloc);
170 
171 	gem_execbuf(fd, &execbuf);
172 	for (n = 0; n < nreloc; n++) {
173 		if (igt_warn_on(gem_reloc[n].presumed_offset == -1))
174 			break;
175 	}
176 
177 	if (use_64bit_relocs) {
178 		for (n = 0; n < nreloc; n++) {
179 			uint64_t tmp;
180 			if (ptr)
181 				tmp = *(uint64_t *)(ptr+reloc_ofs(n, nreloc));
182 			else
183 				gem_read(fd, handle, reloc_ofs(n, nreloc), &tmp, sizeof(tmp));
184 			igt_assert_eq(tmp, gem_reloc[n].presumed_offset);
185 		}
186 	} else {
187 		for (n = 0; n < nreloc; n++) {
188 			uint32_t tmp;
189 			if (ptr)
190 				tmp = *(uint32_t *)(ptr+reloc_ofs(n, nreloc));
191 			else
192 				gem_read(fd, handle, reloc_ofs(n, nreloc), &tmp, sizeof(tmp));
193 			igt_assert_eq(tmp, gem_reloc[n].presumed_offset);
194 		}
195 	}
196 
197 	free(gem_reloc);
198 #undef reloc_ofs
199 }
200 
exhaustive(int fd)201 static void exhaustive(int fd)
202 {
203 	uint32_t batch[2] = {MI_BATCH_BUFFER_END};
204 	uint64_t batch_size, max, ggtt_max, reloc_ofs;
205 
206 	max = 3 * gem_aperture_size(fd) / 4;
207 	ggtt_max = 3 * gem_global_aperture_size(fd) / 4;
208 	intel_require_memory(1, max, CHECK_RAM);
209 
210 	for (batch_size = 4096; batch_size <= max; ) {
211 		uint32_t handle;
212 		void *ptr;
213 
214 		handle = gem_create(fd, batch_size);
215 		gem_write(fd, handle, 0, batch, sizeof(batch));
216 
217 		if (!FORCE_PREAD_PWRITE && gem_has_llc(fd))
218 			ptr = __gem_mmap__cpu(fd, handle, 0, batch_size, PROT_READ);
219 		else if (!FORCE_PREAD_PWRITE && gem_mmap__has_wc(fd))
220 			ptr = __gem_mmap__wc(fd, handle, 0, batch_size, PROT_READ);
221 		else
222 			ptr = NULL;
223 
224 		igt_debug("Forwards (%lld)\n", (long long)batch_size);
225 		for (reloc_ofs = 4096; reloc_ofs < batch_size; reloc_ofs += 4096) {
226 			igt_debug("batch_size %llu, reloc_ofs %llu\n",
227 				  (long long)batch_size, (long long)reloc_ofs);
228 			exec1(fd, handle, reloc_ofs, 0, ptr);
229 			if (batch_size < ggtt_max)
230 				exec1(fd, handle, reloc_ofs, I915_EXEC_SECURE, ptr);
231 		}
232 
233 		igt_debug("Backwards (%lld)\n", (long long)batch_size);
234 		for (reloc_ofs = batch_size - 4096; reloc_ofs; reloc_ofs -= 4096) {
235 			igt_debug("batch_size %llu, reloc_ofs %llu\n",
236 				  (long long)batch_size, (long long)reloc_ofs);
237 			exec1(fd, handle, reloc_ofs, 0, ptr);
238 			if (batch_size < ggtt_max)
239 				exec1(fd, handle, reloc_ofs, I915_EXEC_SECURE, ptr);
240 		}
241 
242 		igt_debug("Random (%lld)\n", (long long)batch_size);
243 		execN(fd, handle, batch_size, 0, ptr);
244 		if (batch_size < ggtt_max)
245 			execN(fd, handle, batch_size, I915_EXEC_SECURE, ptr);
246 
247 		if (ptr)
248 			munmap(ptr, batch_size);
249 		gem_madvise(fd, handle, I915_MADV_DONTNEED);
250 
251 		if (batch_size < max && 2*batch_size > max)
252 			batch_size = max;
253 		else
254 			batch_size *= 2;
255 	}
256 }
257 
single(int i915)258 static void single(int i915)
259 {
260 	const uint32_t bbe = MI_BATCH_BUFFER_END;
261 	uint64_t batch_size, limit;
262 	uint32_t handle;
263 	void *ptr;
264 
265 	batch_size = (intel_get_avail_ram_mb() / 2) << 20; /* XXX CI slack? */
266 	limit = gem_aperture_size(i915) - (256 << 10); /* low pages reserved */
267 	if (!gem_uses_full_ppgtt(i915))
268 		limit = 3 * limit / 4;
269 
270 	batch_size = min(batch_size, limit);
271 	batch_size = ALIGN(batch_size, 4096);
272 	igt_info("Submitting a %'"PRId64"MiB batch, %saperture size %'"PRId64"MiB\n",
273 		 batch_size >> 20,
274 		 gem_uses_full_ppgtt(i915) ? "" : "shared ",
275 		 gem_aperture_size(i915) >> 20);
276 	intel_require_memory(1, batch_size, CHECK_RAM);
277 
278 	handle = gem_create(i915, batch_size);
279 	gem_write(i915, handle, 0, &bbe, sizeof(bbe));
280 
281 	if (!FORCE_PREAD_PWRITE && gem_has_llc(i915))
282 		ptr = __gem_mmap__cpu(i915, handle, 0, batch_size, PROT_READ);
283 	else if (!FORCE_PREAD_PWRITE && gem_mmap__has_wc(i915))
284 		ptr = __gem_mmap__wc(i915, handle, 0, batch_size, PROT_READ);
285 	else
286 		ptr = NULL;
287 
288 	execN(i915, handle, batch_size, 0, ptr);
289 
290 	if (ptr)
291 		munmap(ptr, batch_size);
292 }
293 
294 igt_main
295 {
296 	int i915 = -1;
297 
298 	igt_fixture {
299 		i915 = drm_open_driver(DRIVER_INTEL);
300 		igt_require_gem(i915);
301 
302 		use_64bit_relocs = intel_gen(intel_get_drm_devid(i915)) >= 8;
303 	}
304 
305 	igt_subtest("single")
306 		single(i915);
307 
308 	igt_subtest("exhaustive")
309 		exhaustive(i915);
310 
311 	igt_fixture
312 		close(i915);
313 }
314