xref: /aosp_15_r20/external/igt-gpu-tools/tests/i915/gem_bad_blit.c (revision d83cc019efdc2edc6c4b16e9034a3ceb8d35d77c)
1 /*
2  * Copyright © 2009 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <[email protected]>
25  *
26  */
27 
28 /** @file gem_tiled_blits.c
29  *
30  * This is a test of doing many tiled blits, with a working set
31  * larger than the aperture size.
32  *
33  * The goal is to catch a couple types of failure;
34  * - Fence management problems on pre-965.
35  * - A17 or L-shaped memory tiling workaround problems in acceleration.
36  *
37  * The model is to fill a collection of 1MB objects in a way that can't trip
38  * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled
39  * object.  Then, copy the 1MB objects randomly between each other for a while.
40  * Finally, download their data through linear objects again and see what
41  * resulted.
42  */
43 
44 #include "igt.h"
45 #include <stdlib.h>
46 #include <stdio.h>
47 #include <string.h>
48 #include <fcntl.h>
49 #include <inttypes.h>
50 #include <errno.h>
51 #include <sys/stat.h>
52 #include <sys/time.h>
53 #include "drm.h"
54 #include "intel_bufmgr.h"
55 
56 static drm_intel_bufmgr *bufmgr;
57 struct intel_batchbuffer *batch;
58 
59 #define BAD_GTT_DEST (256*1024*1024ULL) /* past end of aperture */
60 
61 static void
bad_blit(drm_intel_bo * src_bo,uint32_t devid)62 bad_blit(drm_intel_bo *src_bo, uint32_t devid)
63 {
64 	uint32_t src_pitch = 512, dst_pitch = 512;
65 	uint32_t cmd_bits = 0;
66 
67 	if (IS_965(devid)) {
68 		src_pitch /= 4;
69 		cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
70 	}
71 
72 	if (IS_965(devid)) {
73 		dst_pitch /= 4;
74 		cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
75 	}
76 
77 	BLIT_COPY_BATCH_START(cmd_bits);
78 	OUT_BATCH((3 << 24) | /* 32 bits */
79 		  (0xcc << 16) | /* copy ROP */
80 		  dst_pitch);
81 	OUT_BATCH(0); /* dst x1,y1 */
82 	OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
83 	OUT_BATCH(BAD_GTT_DEST);
84 	if (batch->gen >= 8)
85 		OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */
86 	OUT_BATCH(0); /* src x1,y1 */
87 	OUT_BATCH(src_pitch);
88 	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
89 	ADVANCE_BATCH();
90 
91 	intel_batchbuffer_flush(batch);
92 }
93 
94 igt_simple_main
95 {
96 	drm_intel_bo *src;
97 	int fd;
98 
99 	fd = drm_open_driver(DRIVER_INTEL);
100 	igt_require_gem(fd);
101 
102 	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
103 	drm_intel_bufmgr_gem_enable_reuse(bufmgr);
104 	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
105 
106 	src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
107 
108 	bad_blit(src, batch->devid);
109 
110 	intel_batchbuffer_free(batch);
111 	drm_intel_bufmgr_destroy(bufmgr);
112 
113 	close(fd);
114 }
115