xref: /aosp_15_r20/external/flashrom/doc/user_docs/msi_jspi1.rst (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1=========
2MSI JSPI1
3=========
4
5JSPI1 is a 5x2 or 6x2 2.0mm pitch pin header on many MSI motherboards.
6It is used to recover from bad boot ROM images. Specifically,
7it appears to be used to connect an alternate ROM with a working image.
8Pull the #HOLD line low to deselect the onboard SPI ROM, allowing another
9SPI ROM to take its place on the bus. Pull the #WP line high to disable write-protection.
10Some boards use 1.8V flash chips, while others use 3.3V flash chips;
11Check the flash chip datasheet to determine the correct value.
12
13**JSPI1 (5x2)**
14
15======== ======== ======== ====
16name     pin      pin      name
17======== ======== ======== ====
18VCC      1        2 	   VCC
19MISO     3        4	   MOSI
20#SS      5        6	   SCLK
21GND      7        8	   GND
22#HOLD    9        10 	   NC
23======== ======== ======== ====
24
25**JSPI1 (6x2)**
26
27======== ======== ======== ============
28name     pin      pin      name
29======== ======== ======== ============
30VCC      1	  2	   VCC
31SO       3        4	   SI
32#SS      5	  6	   CLK
33GND      7        8	   GND
34NC       9        10	   NC (no pin)
35#WP      11       12	   #HOLD
36======== ======== ======== ============
37
38======== =====================================
39name	 function
40======== =====================================
41VCC	 Voltage (See flash chip datasheet)
42MISO	 SPI Master In/Slave Out
43MOSI	 SPI Master Out/Slave In
44#SS	 SPI Slave (Chip) Select (active low)
45SCLK	 SPI Clock
46GND	 ground/common
47#HOLD	 SPI hold (active low)
48#WP	 SPI write-protect (active low)
49NC	 Not Connected (or no pin)
50======== =====================================
51