1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4
5
TEST(PROCESSORS_COUNT,non_zero)6 TEST(PROCESSORS_COUNT, non_zero) {
7 ASSERT_TRUE(cpuinfo_initialize());
8 EXPECT_NE(0, cpuinfo_get_processors_count());
9 cpuinfo_deinitialize();
10 }
11
TEST(PROCESSORS,non_null)12 TEST(PROCESSORS, non_null) {
13 ASSERT_TRUE(cpuinfo_initialize());
14 EXPECT_TRUE(cpuinfo_get_processors());
15 cpuinfo_deinitialize();
16 }
17
TEST(PROCESSOR,non_null)18 TEST(PROCESSOR, non_null) {
19 ASSERT_TRUE(cpuinfo_initialize());
20 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
21 EXPECT_TRUE(cpuinfo_get_processor(i));
22 }
23 cpuinfo_deinitialize();
24 }
25
TEST(PROCESSOR,valid_smt_id)26 TEST(PROCESSOR, valid_smt_id) {
27 ASSERT_TRUE(cpuinfo_initialize());
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
30 ASSERT_TRUE(processor);
31 const cpuinfo_core* core = processor->core;
32 ASSERT_TRUE(core);
33
34 EXPECT_LT(processor->smt_id, core->processor_count);
35 }
36 cpuinfo_deinitialize();
37 }
38
TEST(PROCESSOR,valid_core)39 TEST(PROCESSOR, valid_core) {
40 ASSERT_TRUE(cpuinfo_initialize());
41 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
42 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
43 ASSERT_TRUE(processor);
44
45 EXPECT_TRUE(processor->core);
46 }
47 cpuinfo_deinitialize();
48 }
49
TEST(PROCESSOR,consistent_core)50 TEST(PROCESSOR, consistent_core) {
51 ASSERT_TRUE(cpuinfo_initialize());
52 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
53 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
54 ASSERT_TRUE(processor);
55 const cpuinfo_core* core = processor->core;
56 ASSERT_TRUE(core);
57
58 EXPECT_GE(i, core->processor_start);
59 EXPECT_LT(i, core->processor_start + core->processor_count);
60 }
61 cpuinfo_deinitialize();
62 }
63
TEST(PROCESSOR,valid_cluster)64 TEST(PROCESSOR, valid_cluster) {
65 ASSERT_TRUE(cpuinfo_initialize());
66 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
67 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
68 ASSERT_TRUE(processor);
69
70 EXPECT_TRUE(processor->cluster);
71 }
72 cpuinfo_deinitialize();
73 }
74
TEST(PROCESSOR,consistent_cluster)75 TEST(PROCESSOR, consistent_cluster) {
76 ASSERT_TRUE(cpuinfo_initialize());
77 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
78 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
79 ASSERT_TRUE(processor);
80 const cpuinfo_cluster* cluster = processor->cluster;
81 ASSERT_TRUE(cluster);
82
83 EXPECT_GE(i, cluster->processor_start);
84 EXPECT_LT(i, cluster->processor_start + cluster->processor_count);
85 }
86 cpuinfo_deinitialize();
87 }
88
TEST(PROCESSOR,valid_package)89 TEST(PROCESSOR, valid_package) {
90 ASSERT_TRUE(cpuinfo_initialize());
91 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
92 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
93 ASSERT_TRUE(processor);
94
95 EXPECT_TRUE(processor->package);
96 }
97 cpuinfo_deinitialize();
98 }
99
TEST(PROCESSOR,consistent_package)100 TEST(PROCESSOR, consistent_package) {
101 ASSERT_TRUE(cpuinfo_initialize());
102 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
103 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
104 ASSERT_TRUE(processor);
105 const cpuinfo_package* package = processor->package;
106 ASSERT_TRUE(package);
107
108 EXPECT_GE(i, package->processor_start);
109 EXPECT_LT(i, package->processor_start + package->processor_count);
110 }
111 cpuinfo_deinitialize();
112 }
113
TEST(PROCESSOR,consistent_l1i)114 TEST(PROCESSOR, consistent_l1i) {
115 ASSERT_TRUE(cpuinfo_initialize());
116 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
117 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
118 ASSERT_TRUE(processor);
119 const cpuinfo_cache* l1i = processor->cache.l1i;
120 if (l1i != nullptr) {
121 EXPECT_GE(i, l1i->processor_start);
122 EXPECT_LT(i, l1i->processor_start + l1i->processor_count);
123 }
124 }
125 cpuinfo_deinitialize();
126 }
127
TEST(PROCESSOR,consistent_l1d)128 TEST(PROCESSOR, consistent_l1d) {
129 ASSERT_TRUE(cpuinfo_initialize());
130 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
131 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
132 ASSERT_TRUE(processor);
133 const cpuinfo_cache* l1d = processor->cache.l1d;
134 if (l1d != nullptr) {
135 EXPECT_GE(i, l1d->processor_start);
136 EXPECT_LT(i, l1d->processor_start + l1d->processor_count);
137 }
138 }
139 cpuinfo_deinitialize();
140 }
141
TEST(PROCESSOR,consistent_l2)142 TEST(PROCESSOR, consistent_l2) {
143 ASSERT_TRUE(cpuinfo_initialize());
144 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
145 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
146 ASSERT_TRUE(processor);
147 const cpuinfo_cache* l2 = processor->cache.l2;
148 if (l2 != nullptr) {
149 EXPECT_GE(i, l2->processor_start);
150 EXPECT_LT(i, l2->processor_start + l2->processor_count);
151 }
152 }
153 cpuinfo_deinitialize();
154 }
155
TEST(PROCESSOR,consistent_l3)156 TEST(PROCESSOR, consistent_l3) {
157 ASSERT_TRUE(cpuinfo_initialize());
158 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
159 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
160 ASSERT_TRUE(processor);
161 const cpuinfo_cache* l3 = processor->cache.l3;
162 if (l3 != nullptr) {
163 EXPECT_GE(i, l3->processor_start);
164 EXPECT_LT(i, l3->processor_start + l3->processor_count);
165 }
166 }
167 cpuinfo_deinitialize();
168 }
169
TEST(PROCESSOR,consistent_l4)170 TEST(PROCESSOR, consistent_l4) {
171 ASSERT_TRUE(cpuinfo_initialize());
172 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
173 const cpuinfo_processor* processor = cpuinfo_get_processor(i);
174 ASSERT_TRUE(processor);
175 const cpuinfo_cache* l4 = processor->cache.l4;
176 if (l4 != nullptr) {
177 EXPECT_GE(i, l4->processor_start);
178 EXPECT_LT(i, l4->processor_start + l4->processor_count);
179 }
180 }
181 cpuinfo_deinitialize();
182 }
183
TEST(CORES_COUNT,within_bounds)184 TEST(CORES_COUNT, within_bounds) {
185 ASSERT_TRUE(cpuinfo_initialize());
186 EXPECT_NE(0, cpuinfo_get_cores_count());
187 EXPECT_LE(cpuinfo_get_cores_count(), cpuinfo_get_processors_count());
188 EXPECT_GE(cpuinfo_get_cores_count(), cpuinfo_get_packages_count());
189 cpuinfo_deinitialize();
190 }
191
TEST(CORES,non_null)192 TEST(CORES, non_null) {
193 ASSERT_TRUE(cpuinfo_initialize());
194 EXPECT_TRUE(cpuinfo_get_cores());
195 cpuinfo_deinitialize();
196 }
197
TEST(CORE,non_null)198 TEST(CORE, non_null) {
199 ASSERT_TRUE(cpuinfo_initialize());
200 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
201 EXPECT_TRUE(cpuinfo_get_core(i));
202 }
203 cpuinfo_deinitialize();
204 }
205
TEST(CORE,non_zero_processors)206 TEST(CORE, non_zero_processors) {
207 ASSERT_TRUE(cpuinfo_initialize());
208 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
209 const cpuinfo_core* core = cpuinfo_get_core(i);
210 ASSERT_TRUE(core);
211
212 EXPECT_NE(0, core->processor_count);
213 }
214 cpuinfo_deinitialize();
215 }
216
TEST(CORE,consistent_processors)217 TEST(CORE, consistent_processors) {
218 ASSERT_TRUE(cpuinfo_initialize());
219 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
220 const cpuinfo_core* core = cpuinfo_get_core(i);
221 ASSERT_TRUE(core);
222
223 for (uint32_t i = 0; i < core->processor_count; i++) {
224 const cpuinfo_processor* processor = cpuinfo_get_processor(core->processor_start + i);
225 ASSERT_TRUE(processor);
226
227 EXPECT_EQ(core, processor->core);
228 }
229 }
230 cpuinfo_deinitialize();
231 }
232
TEST(CORE,valid_core_id)233 TEST(CORE, valid_core_id) {
234 ASSERT_TRUE(cpuinfo_initialize());
235 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
236 const cpuinfo_core* core = cpuinfo_get_core(i);
237 ASSERT_TRUE(core);
238 const cpuinfo_package* package = core->package;
239 ASSERT_TRUE(package);
240
241 EXPECT_LT(core->core_id, package->core_count);
242 }
243 cpuinfo_deinitialize();
244 }
245
TEST(CORE,valid_cluster)246 TEST(CORE, valid_cluster) {
247 ASSERT_TRUE(cpuinfo_initialize());
248 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
249 const cpuinfo_core* core = cpuinfo_get_core(i);
250 ASSERT_TRUE(core);
251
252 EXPECT_TRUE(core->cluster);
253 }
254 cpuinfo_deinitialize();
255 }
256
TEST(CORE,consistent_cluster)257 TEST(CORE, consistent_cluster) {
258 ASSERT_TRUE(cpuinfo_initialize());
259 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
260 const cpuinfo_core* core = cpuinfo_get_core(i);
261 ASSERT_TRUE(core);
262 const cpuinfo_cluster* cluster = core->cluster;
263 ASSERT_TRUE(cluster);
264
265 EXPECT_GE(i, cluster->core_start);
266 EXPECT_LT(i, cluster->core_start + cluster->core_count);
267 }
268 cpuinfo_deinitialize();
269 }
270
TEST(CORE,valid_package)271 TEST(CORE, valid_package) {
272 ASSERT_TRUE(cpuinfo_initialize());
273 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
274 const cpuinfo_core* core = cpuinfo_get_core(i);
275 ASSERT_TRUE(core);
276
277 EXPECT_TRUE(core->package);
278 }
279 cpuinfo_deinitialize();
280 }
281
TEST(CORE,consistent_package)282 TEST(CORE, consistent_package) {
283 ASSERT_TRUE(cpuinfo_initialize());
284 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
285 const cpuinfo_core* core = cpuinfo_get_core(i);
286 ASSERT_TRUE(core);
287 const cpuinfo_package* package = core->package;
288 ASSERT_TRUE(package);
289
290 EXPECT_GE(i, package->core_start);
291 EXPECT_LT(i, package->core_start + package->core_count);
292 }
293 cpuinfo_deinitialize();
294 }
295
TEST(CORE,known_vendor)296 TEST(CORE, known_vendor) {
297 ASSERT_TRUE(cpuinfo_initialize());
298 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
299 const cpuinfo_core* core = cpuinfo_get_core(i);
300 ASSERT_TRUE(core);
301
302 EXPECT_NE(cpuinfo_vendor_unknown, core->vendor);
303 }
304 cpuinfo_deinitialize();
305 }
306
TEST(CORE,known_uarch)307 TEST(CORE, known_uarch) {
308 ASSERT_TRUE(cpuinfo_initialize());
309 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
310 const cpuinfo_core* core = cpuinfo_get_core(i);
311 ASSERT_TRUE(core);
312
313 EXPECT_NE(cpuinfo_uarch_unknown, core->uarch);
314 }
315 cpuinfo_deinitialize();
316 }
317
TEST(CLUSTERS_COUNT,within_bounds)318 TEST(CLUSTERS_COUNT, within_bounds) {
319 ASSERT_TRUE(cpuinfo_initialize());
320 EXPECT_NE(0, cpuinfo_get_clusters_count());
321 EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_cores_count());
322 EXPECT_LE(cpuinfo_get_clusters_count(), cpuinfo_get_processors_count());
323 EXPECT_GE(cpuinfo_get_clusters_count(), cpuinfo_get_packages_count());
324 cpuinfo_deinitialize();
325 }
326
TEST(CLUSTERS,non_null)327 TEST(CLUSTERS, non_null) {
328 ASSERT_TRUE(cpuinfo_initialize());
329 EXPECT_TRUE(cpuinfo_get_clusters());
330 cpuinfo_deinitialize();
331 }
332
TEST(CLUSTER,non_null)333 TEST(CLUSTER, non_null) {
334 ASSERT_TRUE(cpuinfo_initialize());
335 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
336 EXPECT_TRUE(cpuinfo_get_cluster(i));
337 }
338 cpuinfo_deinitialize();
339 }
340
TEST(CLUSTER,non_zero_processors)341 TEST(CLUSTER, non_zero_processors) {
342 ASSERT_TRUE(cpuinfo_initialize());
343 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
344 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
345 ASSERT_TRUE(cluster);
346
347 EXPECT_NE(0, cluster->processor_count);
348 }
349 cpuinfo_deinitialize();
350 }
351
TEST(CLUSTER,valid_processors)352 TEST(CLUSTER, valid_processors) {
353 ASSERT_TRUE(cpuinfo_initialize());
354 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
355 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
356 ASSERT_TRUE(cluster);
357
358 EXPECT_LT(cluster->processor_start, cpuinfo_get_processors_count());
359 EXPECT_LE(cluster->processor_start + cluster->processor_count, cpuinfo_get_processors_count());
360 }
361 cpuinfo_deinitialize();
362 }
363
TEST(CLUSTER,consistent_processors)364 TEST(CLUSTER, consistent_processors) {
365 ASSERT_TRUE(cpuinfo_initialize());
366 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
367 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
368 ASSERT_TRUE(cluster);
369
370 for (uint32_t j = 0; j < cluster->processor_count; j++) {
371 const cpuinfo_processor* processor = cpuinfo_get_processor(cluster->processor_start + j);
372 EXPECT_EQ(cluster, processor->cluster);
373 }
374 }
375 cpuinfo_deinitialize();
376 }
377
TEST(CLUSTER,non_zero_cores)378 TEST(CLUSTER, non_zero_cores) {
379 ASSERT_TRUE(cpuinfo_initialize());
380 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
381 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
382 ASSERT_TRUE(cluster);
383
384 EXPECT_NE(0, cluster->core_count);
385 }
386 cpuinfo_deinitialize();
387 }
388
TEST(CLUSTER,valid_cores)389 TEST(CLUSTER, valid_cores) {
390 ASSERT_TRUE(cpuinfo_initialize());
391 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
392 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
393 ASSERT_TRUE(cluster);
394
395 EXPECT_LT(cluster->core_start, cpuinfo_get_cores_count());
396 EXPECT_LE(cluster->core_start + cluster->core_count, cpuinfo_get_cores_count());
397 }
398 cpuinfo_deinitialize();
399 }
400
TEST(CLUSTER,consistent_cores)401 TEST(CLUSTER, consistent_cores) {
402 ASSERT_TRUE(cpuinfo_initialize());
403 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
404 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
405 ASSERT_TRUE(cluster);
406
407 for (uint32_t j = 0; j < cluster->core_count; j++) {
408 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
409 ASSERT_TRUE(core);
410
411 EXPECT_EQ(cluster, core->cluster);
412 }
413 }
414 cpuinfo_deinitialize();
415 }
416
TEST(CLUSTER,valid_cluster_id)417 TEST(CLUSTER, valid_cluster_id) {
418 ASSERT_TRUE(cpuinfo_initialize());
419 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
420 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
421 ASSERT_TRUE(cluster);
422
423 for (uint32_t j = 0; j < cluster->core_count; j++) {
424 const cpuinfo_package* package = cluster->package;
425 ASSERT_TRUE(package);
426
427 EXPECT_LT(cluster->cluster_id, package->cluster_count);
428 }
429 }
430 cpuinfo_deinitialize();
431 }
432
TEST(CLUSTER,valid_package)433 TEST(CLUSTER, valid_package) {
434 ASSERT_TRUE(cpuinfo_initialize());
435 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
436 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
437 ASSERT_TRUE(cluster);
438
439 EXPECT_TRUE(cluster->package);
440 }
441 cpuinfo_deinitialize();
442 }
443
TEST(CLUSTER,consistent_package)444 TEST(CLUSTER, consistent_package) {
445 ASSERT_TRUE(cpuinfo_initialize());
446 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
447 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
448 ASSERT_TRUE(cluster);
449 const cpuinfo_package* package = cluster->package;
450 ASSERT_TRUE(package);
451
452 EXPECT_GE(i, package->cluster_start);
453 EXPECT_LT(i, package->cluster_start + package->cluster_count);
454 }
455 cpuinfo_deinitialize();
456 }
457
TEST(CLUSTER,consistent_vendor)458 TEST(CLUSTER, consistent_vendor) {
459 ASSERT_TRUE(cpuinfo_initialize());
460 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
461 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
462 ASSERT_TRUE(cluster);
463
464 for (uint32_t j = 0; j < cluster->core_count; j++) {
465 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
466 ASSERT_TRUE(core);
467
468 EXPECT_EQ(cluster->vendor, core->vendor);
469 }
470 }
471 cpuinfo_deinitialize();
472 }
473
TEST(CLUSTER,consistent_uarch)474 TEST(CLUSTER, consistent_uarch) {
475 ASSERT_TRUE(cpuinfo_initialize());
476 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
477 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
478 ASSERT_TRUE(cluster);
479
480 for (uint32_t j = 0; j < cluster->core_count; j++) {
481 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
482 ASSERT_TRUE(core);
483
484 EXPECT_EQ(cluster->uarch, core->uarch);
485 }
486 }
487 cpuinfo_deinitialize();
488 }
489
490 #if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
TEST(CLUSTER,consistent_cpuid)491 TEST(CLUSTER, consistent_cpuid) {
492 ASSERT_TRUE(cpuinfo_initialize());
493 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
494 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
495 ASSERT_TRUE(cluster);
496
497 for (uint32_t j = 0; j < cluster->core_count; j++) {
498 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
499 ASSERT_TRUE(core);
500
501 EXPECT_EQ(cluster->cpuid, core->cpuid);
502 }
503 }
504 cpuinfo_deinitialize();
505 }
506 #endif /* CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64 */
507
508 #if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
TEST(CLUSTER,consistent_midr)509 TEST(CLUSTER, consistent_midr) {
510 ASSERT_TRUE(cpuinfo_initialize());
511 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
512 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
513 ASSERT_TRUE(cluster);
514
515 for (uint32_t j = 0; j < cluster->core_count; j++) {
516 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
517 ASSERT_TRUE(core);
518
519 EXPECT_EQ(cluster->midr, core->midr);
520 }
521 }
522 cpuinfo_deinitialize();
523 }
524 #endif /* CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 */
525
TEST(CLUSTER,consistent_frequency)526 TEST(CLUSTER, consistent_frequency) {
527 ASSERT_TRUE(cpuinfo_initialize());
528 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
529 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(i);
530 ASSERT_TRUE(cluster);
531
532 for (uint32_t j = 0; j < cluster->core_count; j++) {
533 const cpuinfo_core* core = cpuinfo_get_core(cluster->core_start + j);
534 ASSERT_TRUE(core);
535
536 EXPECT_EQ(cluster->frequency, core->frequency);
537 }
538 }
539 cpuinfo_deinitialize();
540 }
541
TEST(PACKAGES_COUNT,within_bounds)542 TEST(PACKAGES_COUNT, within_bounds) {
543 ASSERT_TRUE(cpuinfo_initialize());
544 EXPECT_NE(0, cpuinfo_get_packages_count());
545 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_cores_count());
546 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_processors_count());
547 cpuinfo_deinitialize();
548 }
549
TEST(PACKAGES,non_null)550 TEST(PACKAGES, non_null) {
551 ASSERT_TRUE(cpuinfo_initialize());
552 EXPECT_TRUE(cpuinfo_get_packages());
553 cpuinfo_deinitialize();
554 }
555
TEST(PACKAGE,non_null)556 TEST(PACKAGE, non_null) {
557 ASSERT_TRUE(cpuinfo_initialize());
558 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
559 EXPECT_TRUE(cpuinfo_get_package(i));
560 }
561 cpuinfo_deinitialize();
562 }
563
TEST(PACKAGE,non_zero_processors)564 TEST(PACKAGE, non_zero_processors) {
565 ASSERT_TRUE(cpuinfo_initialize());
566 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
567 const cpuinfo_package* package = cpuinfo_get_package(i);
568 ASSERT_TRUE(package);
569
570 EXPECT_NE(0, package->processor_count);
571 }
572 cpuinfo_deinitialize();
573 }
574
TEST(PACKAGE,valid_processors)575 TEST(PACKAGE, valid_processors) {
576 ASSERT_TRUE(cpuinfo_initialize());
577 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
578 const cpuinfo_package* package = cpuinfo_get_package(i);
579 ASSERT_TRUE(package);
580
581 EXPECT_LT(package->processor_start, cpuinfo_get_processors_count());
582 EXPECT_LE(package->processor_start + package->processor_count, cpuinfo_get_processors_count());
583 }
584 cpuinfo_deinitialize();
585 }
586
TEST(PACKAGE,consistent_processors)587 TEST(PACKAGE, consistent_processors) {
588 ASSERT_TRUE(cpuinfo_initialize());
589 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
590 const cpuinfo_package* package = cpuinfo_get_package(i);
591 ASSERT_TRUE(package);
592
593 for (uint32_t j = 0; j < package->processor_count; j++) {
594 const cpuinfo_processor* processor = cpuinfo_get_processor(package->processor_start + j);
595 ASSERT_TRUE(processor);
596
597 EXPECT_EQ(package, processor->package);
598 }
599 }
600 cpuinfo_deinitialize();
601 }
602
TEST(PACKAGE,non_zero_cores)603 TEST(PACKAGE, non_zero_cores) {
604 ASSERT_TRUE(cpuinfo_initialize());
605 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
606 const cpuinfo_package* package = cpuinfo_get_package(i);
607 ASSERT_TRUE(package);
608
609 EXPECT_NE(0, package->core_count);
610 }
611 cpuinfo_deinitialize();
612 }
613
TEST(PACKAGE,valid_cores)614 TEST(PACKAGE, valid_cores) {
615 ASSERT_TRUE(cpuinfo_initialize());
616 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
617 const cpuinfo_package* package = cpuinfo_get_package(i);
618 ASSERT_TRUE(package);
619
620 EXPECT_LT(package->core_start, cpuinfo_get_cores_count());
621 EXPECT_LE(package->core_start + package->core_count, cpuinfo_get_cores_count());
622 }
623 cpuinfo_deinitialize();
624 }
625
TEST(PACKAGE,consistent_cores)626 TEST(PACKAGE, consistent_cores) {
627 ASSERT_TRUE(cpuinfo_initialize());
628 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
629 const cpuinfo_package* package = cpuinfo_get_package(i);
630 ASSERT_TRUE(package);
631
632 for (uint32_t j = 0; j < package->core_count; j++) {
633 const cpuinfo_core* core = cpuinfo_get_core(package->core_start + j);
634 ASSERT_TRUE(core);
635
636 EXPECT_EQ(package, core->package);
637 }
638 }
639 cpuinfo_deinitialize();
640 }
641
TEST(PACKAGE,non_zero_clusters)642 TEST(PACKAGE, non_zero_clusters) {
643 ASSERT_TRUE(cpuinfo_initialize());
644 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
645 const cpuinfo_package* package = cpuinfo_get_package(i);
646 ASSERT_TRUE(package);
647
648 EXPECT_NE(0, package->cluster_count);
649 }
650 cpuinfo_deinitialize();
651 }
652
TEST(PACKAGE,valid_clusters)653 TEST(PACKAGE, valid_clusters) {
654 ASSERT_TRUE(cpuinfo_initialize());
655 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
656 const cpuinfo_package* package = cpuinfo_get_package(i);
657 ASSERT_TRUE(package);
658
659 EXPECT_LT(package->cluster_start, cpuinfo_get_clusters_count());
660 EXPECT_LE(package->cluster_start + package->cluster_count, cpuinfo_get_clusters_count());
661 }
662 cpuinfo_deinitialize();
663 }
664
TEST(PACKAGE,consistent_cluster)665 TEST(PACKAGE, consistent_cluster) {
666 ASSERT_TRUE(cpuinfo_initialize());
667 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
668 const cpuinfo_package* package = cpuinfo_get_package(i);
669 ASSERT_TRUE(package);
670
671 for (uint32_t j = 0; j < package->cluster_count; j++) {
672 const cpuinfo_cluster* cluster = cpuinfo_get_cluster(package->cluster_start + j);
673 ASSERT_TRUE(cluster);
674
675 EXPECT_EQ(package, cluster->package);
676 }
677 }
678 cpuinfo_deinitialize();
679 }
680
TEST(UARCHS_COUNT,within_bounds)681 TEST(UARCHS_COUNT, within_bounds) {
682 ASSERT_TRUE(cpuinfo_initialize());
683 EXPECT_NE(0, cpuinfo_get_uarchs_count());
684 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_cores_count());
685 EXPECT_LE(cpuinfo_get_packages_count(), cpuinfo_get_processors_count());
686 cpuinfo_deinitialize();
687 }
688
TEST(UARCHS,non_null)689 TEST(UARCHS, non_null) {
690 ASSERT_TRUE(cpuinfo_initialize());
691 EXPECT_TRUE(cpuinfo_get_uarchs());
692 cpuinfo_deinitialize();
693 }
694
TEST(UARCH,non_null)695 TEST(UARCH, non_null) {
696 ASSERT_TRUE(cpuinfo_initialize());
697 for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
698 EXPECT_TRUE(cpuinfo_get_uarch(i));
699 }
700 cpuinfo_deinitialize();
701 }
702
TEST(UARCH,non_zero_processors)703 TEST(UARCH, non_zero_processors) {
704 ASSERT_TRUE(cpuinfo_initialize());
705 for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
706 const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
707 ASSERT_TRUE(uarch);
708
709 EXPECT_NE(0, uarch->processor_count);
710 }
711 cpuinfo_deinitialize();
712 }
713
TEST(UARCH,valid_processors)714 TEST(UARCH, valid_processors) {
715 ASSERT_TRUE(cpuinfo_initialize());
716 for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
717 const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
718 ASSERT_TRUE(uarch);
719
720 EXPECT_LE(uarch->processor_count, cpuinfo_get_processors_count());
721 }
722 cpuinfo_deinitialize();
723 }
724
TEST(UARCH,non_zero_cores)725 TEST(UARCH, non_zero_cores) {
726 ASSERT_TRUE(cpuinfo_initialize());
727 for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
728 const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
729 ASSERT_TRUE(uarch);
730
731 EXPECT_NE(0, uarch->core_count);
732 }
733 cpuinfo_deinitialize();
734 }
735
TEST(UARCH,valid_cores)736 TEST(UARCH, valid_cores) {
737 ASSERT_TRUE(cpuinfo_initialize());
738 for (uint32_t i = 0; i < cpuinfo_get_uarchs_count(); i++) {
739 const cpuinfo_uarch_info* uarch = cpuinfo_get_uarch(i);
740 ASSERT_TRUE(uarch);
741
742 EXPECT_LE(uarch->core_count, cpuinfo_get_cores_count());
743 }
744 cpuinfo_deinitialize();
745 }
746
TEST(L1I_CACHES_COUNT,within_bounds)747 TEST(L1I_CACHES_COUNT, within_bounds) {
748 ASSERT_TRUE(cpuinfo_initialize());
749 EXPECT_NE(0, cpuinfo_get_l1i_caches_count());
750 EXPECT_LE(cpuinfo_get_l1i_caches_count(), cpuinfo_get_processors_count());
751 cpuinfo_deinitialize();
752 }
753
TEST(L1I_CACHES,non_null)754 TEST(L1I_CACHES, non_null) {
755 ASSERT_TRUE(cpuinfo_initialize());
756 EXPECT_TRUE(cpuinfo_get_l1i_caches());
757 cpuinfo_deinitialize();
758 }
759
TEST(L1I_CACHE,non_null)760 TEST(L1I_CACHE, non_null) {
761 ASSERT_TRUE(cpuinfo_initialize());
762 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
763 EXPECT_TRUE(cpuinfo_get_l1i_cache(i));
764 }
765 cpuinfo_deinitialize();
766 }
767
TEST(L1I_CACHE,non_zero_size)768 TEST(L1I_CACHE, non_zero_size) {
769 ASSERT_TRUE(cpuinfo_initialize());
770 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
771 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
772 ASSERT_TRUE(cache);
773
774 EXPECT_NE(0, cache->size);
775 }
776 cpuinfo_deinitialize();
777 }
778
TEST(L1I_CACHE,valid_size)779 TEST(L1I_CACHE, valid_size) {
780 ASSERT_TRUE(cpuinfo_initialize());
781 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
782 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
783 ASSERT_TRUE(cache);
784
785 EXPECT_EQ(cache->size,
786 cache->associativity * cache->sets * cache->partitions * cache->line_size);
787 }
788 cpuinfo_deinitialize();
789 }
790
TEST(L1I_CACHE,non_zero_associativity)791 TEST(L1I_CACHE, non_zero_associativity) {
792 ASSERT_TRUE(cpuinfo_initialize());
793 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
794 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
795 ASSERT_TRUE(cache);
796
797 EXPECT_NE(0, cache->associativity);
798 }
799 cpuinfo_deinitialize();
800 }
801
TEST(L1I_CACHE,non_zero_partitions)802 TEST(L1I_CACHE, non_zero_partitions) {
803 ASSERT_TRUE(cpuinfo_initialize());
804 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
805 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
806 ASSERT_TRUE(cache);
807
808 EXPECT_NE(0, cache->partitions);
809 }
810 cpuinfo_deinitialize();
811 }
812
TEST(L1I_CACHE,non_zero_line_size)813 TEST(L1I_CACHE, non_zero_line_size) {
814 ASSERT_TRUE(cpuinfo_initialize());
815 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
816 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
817 ASSERT_TRUE(cache);
818
819 EXPECT_NE(0, cache->line_size);
820 }
821 cpuinfo_deinitialize();
822 }
823
TEST(L1I_CACHE,power_of_2_line_size)824 TEST(L1I_CACHE, power_of_2_line_size) {
825 ASSERT_TRUE(cpuinfo_initialize());
826 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
827 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
828 ASSERT_TRUE(cache);
829
830 const uint32_t line_size = cache->line_size;
831 EXPECT_NE(0, line_size);
832 EXPECT_EQ(0, line_size & (line_size - 1));
833 }
834 cpuinfo_deinitialize();
835 }
836
TEST(L1I_CACHE,reasonable_line_size)837 TEST(L1I_CACHE, reasonable_line_size) {
838 ASSERT_TRUE(cpuinfo_initialize());
839 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
840 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
841 ASSERT_TRUE(cache);
842
843 EXPECT_GE(cache->line_size, 16);
844 EXPECT_LE(cache->line_size, 128);
845 }
846 cpuinfo_deinitialize();
847 }
848
TEST(L1I_CACHE,valid_flags)849 TEST(L1I_CACHE, valid_flags) {
850 ASSERT_TRUE(cpuinfo_initialize());
851
852 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
853 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
854 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
855 ASSERT_TRUE(cache);
856
857 EXPECT_EQ(0, cache->flags & ~valid_flags);
858 }
859 cpuinfo_deinitialize();
860 }
861
TEST(L1I_CACHE,non_inclusive)862 TEST(L1I_CACHE, non_inclusive) {
863 ASSERT_TRUE(cpuinfo_initialize());
864 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
865 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
866 ASSERT_TRUE(cache);
867
868 EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE);
869 }
870 cpuinfo_deinitialize();
871 }
872
TEST(L1I_CACHE,non_zero_processors)873 TEST(L1I_CACHE, non_zero_processors) {
874 ASSERT_TRUE(cpuinfo_initialize());
875 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
876 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
877 ASSERT_TRUE(cache);
878
879 EXPECT_NE(0, cache->processor_count);
880 }
881 cpuinfo_deinitialize();
882 }
883
TEST(L1I_CACHE,valid_processors)884 TEST(L1I_CACHE, valid_processors) {
885 ASSERT_TRUE(cpuinfo_initialize());
886 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
887 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
888 ASSERT_TRUE(cache);
889
890 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
891 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
892 }
893 cpuinfo_deinitialize();
894 }
895
TEST(L1I_CACHE,consistent_processors)896 TEST(L1I_CACHE, consistent_processors) {
897 ASSERT_TRUE(cpuinfo_initialize());
898 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
899 const cpuinfo_cache* cache = cpuinfo_get_l1i_cache(i);
900 ASSERT_TRUE(cache);
901
902 for (uint32_t j = 0; j < cache->processor_count; j++) {
903 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
904 ASSERT_TRUE(processor);
905
906 EXPECT_EQ(cache, processor->cache.l1i);
907 }
908 }
909 cpuinfo_deinitialize();
910 }
911
TEST(L1D_CACHES_COUNT,within_bounds)912 TEST(L1D_CACHES_COUNT, within_bounds) {
913 ASSERT_TRUE(cpuinfo_initialize());
914 EXPECT_NE(0, cpuinfo_get_l1d_caches_count());
915 EXPECT_LE(cpuinfo_get_l1d_caches_count(), cpuinfo_get_processors_count());
916 cpuinfo_deinitialize();
917 }
918
TEST(L1D_CACHES,non_null)919 TEST(L1D_CACHES, non_null) {
920 ASSERT_TRUE(cpuinfo_initialize());
921 EXPECT_TRUE(cpuinfo_get_l1d_caches());
922 cpuinfo_deinitialize();
923 }
924
TEST(L1D_CACHE,non_null)925 TEST(L1D_CACHE, non_null) {
926 ASSERT_TRUE(cpuinfo_initialize());
927 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
928 EXPECT_TRUE(cpuinfo_get_l1d_cache(i));
929 }
930 cpuinfo_deinitialize();
931 }
932
TEST(L1D_CACHE,non_zero_size)933 TEST(L1D_CACHE, non_zero_size) {
934 ASSERT_TRUE(cpuinfo_initialize());
935 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
936 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
937 ASSERT_TRUE(cache);
938
939 EXPECT_NE(0, cache->size);
940 }
941 cpuinfo_deinitialize();
942 }
943
TEST(L1D_CACHE,valid_size)944 TEST(L1D_CACHE, valid_size) {
945 ASSERT_TRUE(cpuinfo_initialize());
946 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
947 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
948 ASSERT_TRUE(cache);
949
950 EXPECT_EQ(cache->size,
951 cache->associativity * cache->sets * cache->partitions * cache->line_size);
952 }
953 cpuinfo_deinitialize();
954 }
955
TEST(L1D_CACHE,non_zero_associativity)956 TEST(L1D_CACHE, non_zero_associativity) {
957 ASSERT_TRUE(cpuinfo_initialize());
958 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
959 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
960 ASSERT_TRUE(cache);
961
962 EXPECT_NE(0, cache->associativity);
963 }
964 cpuinfo_deinitialize();
965 }
966
TEST(L1D_CACHE,non_zero_partitions)967 TEST(L1D_CACHE, non_zero_partitions) {
968 ASSERT_TRUE(cpuinfo_initialize());
969 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
970 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
971 ASSERT_TRUE(cache);
972
973 EXPECT_NE(0, cache->partitions);
974 }
975 cpuinfo_deinitialize();
976 }
977
TEST(L1D_CACHE,non_zero_line_size)978 TEST(L1D_CACHE, non_zero_line_size) {
979 ASSERT_TRUE(cpuinfo_initialize());
980 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
981 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
982 ASSERT_TRUE(cache);
983
984 EXPECT_NE(0, cache->line_size);
985 }
986 cpuinfo_deinitialize();
987 }
988
TEST(L1D_CACHE,power_of_2_line_size)989 TEST(L1D_CACHE, power_of_2_line_size) {
990 ASSERT_TRUE(cpuinfo_initialize());
991 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
992 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
993 ASSERT_TRUE(cache);
994
995 const uint32_t line_size = cache->line_size;
996 EXPECT_NE(0, line_size);
997 EXPECT_EQ(0, line_size & (line_size - 1));
998 }
999 cpuinfo_deinitialize();
1000 }
1001
TEST(L1D_CACHE,reasonable_line_size)1002 TEST(L1D_CACHE, reasonable_line_size) {
1003 ASSERT_TRUE(cpuinfo_initialize());
1004 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1005 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1006 ASSERT_TRUE(cache);
1007
1008 EXPECT_GE(cache->line_size, 16);
1009 EXPECT_LE(cache->line_size, 128);
1010 }
1011 cpuinfo_deinitialize();
1012 }
1013
TEST(L1D_CACHE,valid_flags)1014 TEST(L1D_CACHE, valid_flags) {
1015 ASSERT_TRUE(cpuinfo_initialize());
1016
1017 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
1018 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1019 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1020 ASSERT_TRUE(cache);
1021
1022 EXPECT_EQ(0, cache->flags & ~valid_flags);
1023 }
1024 cpuinfo_deinitialize();
1025 }
1026
TEST(L1D_CACHE,non_inclusive)1027 TEST(L1D_CACHE, non_inclusive) {
1028 ASSERT_TRUE(cpuinfo_initialize());
1029 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1030 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1031 ASSERT_TRUE(cache);
1032
1033 EXPECT_NE(CPUINFO_CACHE_INCLUSIVE, cache->flags & CPUINFO_CACHE_INCLUSIVE);
1034 }
1035 cpuinfo_deinitialize();
1036 }
1037
TEST(L1D_CACHE,non_zero_processors)1038 TEST(L1D_CACHE, non_zero_processors) {
1039 ASSERT_TRUE(cpuinfo_initialize());
1040 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1041 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1042 ASSERT_TRUE(cache);
1043
1044 EXPECT_NE(0, cache->processor_count);
1045 }
1046 cpuinfo_deinitialize();
1047 }
1048
TEST(L1D_CACHE,valid_processors)1049 TEST(L1D_CACHE, valid_processors) {
1050 ASSERT_TRUE(cpuinfo_initialize());
1051 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1052 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1053 ASSERT_TRUE(cache);
1054
1055 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
1056 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
1057 }
1058 cpuinfo_deinitialize();
1059 }
1060
TEST(L1D_CACHE,consistent_processors)1061 TEST(L1D_CACHE, consistent_processors) {
1062 ASSERT_TRUE(cpuinfo_initialize());
1063 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
1064 const cpuinfo_cache* cache = cpuinfo_get_l1d_cache(i);
1065 ASSERT_TRUE(cache);
1066
1067 for (uint32_t j = 0; j < cache->processor_count; j++) {
1068 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
1069 ASSERT_TRUE(processor);
1070
1071 EXPECT_EQ(cache, processor->cache.l1d);
1072 }
1073 }
1074 cpuinfo_deinitialize();
1075 }
1076
TEST(L2_CACHES_COUNT,within_bounds)1077 TEST(L2_CACHES_COUNT, within_bounds) {
1078 ASSERT_TRUE(cpuinfo_initialize());
1079 EXPECT_NE(0, cpuinfo_get_l2_caches_count());
1080 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_processors_count());
1081 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1d_caches_count());
1082 EXPECT_LE(cpuinfo_get_l2_caches_count(), cpuinfo_get_l1i_caches_count());
1083 cpuinfo_deinitialize();
1084 }
1085
TEST(L2_CACHES,non_null)1086 TEST(L2_CACHES, non_null) {
1087 ASSERT_TRUE(cpuinfo_initialize());
1088 EXPECT_TRUE(cpuinfo_get_l2_caches());
1089 cpuinfo_deinitialize();
1090 }
1091
TEST(L2_CACHE,non_null)1092 TEST(L2_CACHE, non_null) {
1093 ASSERT_TRUE(cpuinfo_initialize());
1094 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1095 EXPECT_TRUE(cpuinfo_get_l2_cache(i));
1096 }
1097 cpuinfo_deinitialize();
1098 }
1099
TEST(L2_CACHE,non_zero_size)1100 TEST(L2_CACHE, non_zero_size) {
1101 ASSERT_TRUE(cpuinfo_initialize());
1102 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1103 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1104 ASSERT_TRUE(cache);
1105
1106 EXPECT_NE(0, cache->size);
1107 }
1108 cpuinfo_deinitialize();
1109 }
1110
TEST(L2_CACHE,valid_size)1111 TEST(L2_CACHE, valid_size) {
1112 ASSERT_TRUE(cpuinfo_initialize());
1113 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1114 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1115 ASSERT_TRUE(cache);
1116
1117 EXPECT_EQ(cache->size,
1118 cache->associativity * cache->sets * cache->partitions * cache->line_size);
1119 }
1120 cpuinfo_deinitialize();
1121 }
1122
TEST(L2_CACHE,non_zero_associativity)1123 TEST(L2_CACHE, non_zero_associativity) {
1124 ASSERT_TRUE(cpuinfo_initialize());
1125 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1126 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1127 ASSERT_TRUE(cache);
1128
1129 EXPECT_NE(0, cache->associativity);
1130 }
1131 cpuinfo_deinitialize();
1132 }
1133
TEST(L2_CACHE,non_zero_partitions)1134 TEST(L2_CACHE, non_zero_partitions) {
1135 ASSERT_TRUE(cpuinfo_initialize());
1136 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1137 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1138 ASSERT_TRUE(cache);
1139
1140 EXPECT_NE(0, cache->partitions);
1141 }
1142 cpuinfo_deinitialize();
1143 }
1144
TEST(L2_CACHE,non_zero_line_size)1145 TEST(L2_CACHE, non_zero_line_size) {
1146 ASSERT_TRUE(cpuinfo_initialize());
1147 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1148 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1149 ASSERT_TRUE(cache);
1150
1151 EXPECT_NE(0, cache->line_size);
1152 }
1153 cpuinfo_deinitialize();
1154 }
1155
TEST(L2_CACHE,power_of_2_line_size)1156 TEST(L2_CACHE, power_of_2_line_size) {
1157 ASSERT_TRUE(cpuinfo_initialize());
1158 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1159 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1160 ASSERT_TRUE(cache);
1161
1162 const uint32_t line_size = cache->line_size;
1163 EXPECT_NE(0, line_size);
1164 EXPECT_EQ(0, line_size & (line_size - 1));
1165 }
1166 cpuinfo_deinitialize();
1167 }
1168
TEST(L2_CACHE,reasonable_line_size)1169 TEST(L2_CACHE, reasonable_line_size) {
1170 ASSERT_TRUE(cpuinfo_initialize());
1171 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1172 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1173 ASSERT_TRUE(cache);
1174
1175 EXPECT_GE(cache->line_size, 16);
1176 EXPECT_LE(cache->line_size, 128);
1177 }
1178 cpuinfo_deinitialize();
1179 }
1180
TEST(L2_CACHE,valid_flags)1181 TEST(L2_CACHE, valid_flags) {
1182 ASSERT_TRUE(cpuinfo_initialize());
1183
1184 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
1185 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1186 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1187 ASSERT_TRUE(cache);
1188
1189 EXPECT_EQ(0, cache->flags & ~valid_flags);
1190 }
1191 cpuinfo_deinitialize();
1192 }
1193
TEST(L2_CACHE,non_zero_processors)1194 TEST(L2_CACHE, non_zero_processors) {
1195 ASSERT_TRUE(cpuinfo_initialize());
1196 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1197 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1198 ASSERT_TRUE(cache);
1199
1200 EXPECT_NE(0, cache->processor_count);
1201 }
1202 cpuinfo_deinitialize();
1203 }
1204
TEST(L2_CACHE,valid_processors)1205 TEST(L2_CACHE, valid_processors) {
1206 ASSERT_TRUE(cpuinfo_initialize());
1207 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1208 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1209 ASSERT_TRUE(cache);
1210
1211 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
1212 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
1213 }
1214 cpuinfo_deinitialize();
1215 }
1216
TEST(L2_CACHE,consistent_processors)1217 TEST(L2_CACHE, consistent_processors) {
1218 ASSERT_TRUE(cpuinfo_initialize());
1219 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
1220 const cpuinfo_cache* cache = cpuinfo_get_l2_cache(i);
1221 ASSERT_TRUE(cache);
1222
1223 for (uint32_t j = 0; j < cache->processor_count; j++) {
1224 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
1225 ASSERT_TRUE(processor);
1226
1227 EXPECT_EQ(cache, processor->cache.l2);
1228 }
1229 }
1230 cpuinfo_deinitialize();
1231 }
1232
TEST(L3_CACHES_COUNT,within_bounds)1233 TEST(L3_CACHES_COUNT, within_bounds) {
1234 ASSERT_TRUE(cpuinfo_initialize());
1235 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_processors_count());
1236 EXPECT_LE(cpuinfo_get_l3_caches_count(), cpuinfo_get_l2_caches_count());
1237 cpuinfo_deinitialize();
1238 }
1239
TEST(L3_CACHE,non_null)1240 TEST(L3_CACHE, non_null) {
1241 ASSERT_TRUE(cpuinfo_initialize());
1242 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1243 EXPECT_TRUE(cpuinfo_get_l3_cache(i));
1244 }
1245 cpuinfo_deinitialize();
1246 }
1247
TEST(L3_CACHE,non_zero_size)1248 TEST(L3_CACHE, non_zero_size) {
1249 ASSERT_TRUE(cpuinfo_initialize());
1250 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1251 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1252 ASSERT_TRUE(cache);
1253
1254 EXPECT_NE(0, cache->size);
1255 }
1256 cpuinfo_deinitialize();
1257 }
1258
TEST(L3_CACHE,valid_size)1259 TEST(L3_CACHE, valid_size) {
1260 ASSERT_TRUE(cpuinfo_initialize());
1261 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1262 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1263 ASSERT_TRUE(cache);
1264
1265 EXPECT_EQ(cache->size,
1266 cache->associativity * cache->sets * cache->partitions * cache->line_size);
1267 }
1268 cpuinfo_deinitialize();
1269 }
1270
TEST(L3_CACHE,non_zero_associativity)1271 TEST(L3_CACHE, non_zero_associativity) {
1272 ASSERT_TRUE(cpuinfo_initialize());
1273 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1274 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1275 ASSERT_TRUE(cache);
1276
1277 EXPECT_NE(0, cache->associativity);
1278 }
1279 cpuinfo_deinitialize();
1280 }
1281
TEST(L3_CACHE,non_zero_partitions)1282 TEST(L3_CACHE, non_zero_partitions) {
1283 ASSERT_TRUE(cpuinfo_initialize());
1284 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1285 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1286 ASSERT_TRUE(cache);
1287
1288 EXPECT_NE(0, cache->partitions);
1289 }
1290 cpuinfo_deinitialize();
1291 }
1292
TEST(L3_CACHE,non_zero_line_size)1293 TEST(L3_CACHE, non_zero_line_size) {
1294 ASSERT_TRUE(cpuinfo_initialize());
1295 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1296 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1297 ASSERT_TRUE(cache);
1298
1299 EXPECT_NE(0, cache->line_size);
1300 }
1301 cpuinfo_deinitialize();
1302 }
1303
TEST(L3_CACHE,power_of_2_line_size)1304 TEST(L3_CACHE, power_of_2_line_size) {
1305 ASSERT_TRUE(cpuinfo_initialize());
1306 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1307 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1308 ASSERT_TRUE(cache);
1309
1310 const uint32_t line_size = cache->line_size;
1311 EXPECT_NE(0, line_size);
1312 EXPECT_EQ(0, line_size & (line_size - 1));
1313 }
1314 cpuinfo_deinitialize();
1315 }
1316
TEST(L3_CACHE,reasonable_line_size)1317 TEST(L3_CACHE, reasonable_line_size) {
1318 ASSERT_TRUE(cpuinfo_initialize());
1319 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1320 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1321 ASSERT_TRUE(cache);
1322
1323 EXPECT_GE(cache->line_size, 16);
1324 EXPECT_LE(cache->line_size, 128);
1325 }
1326 cpuinfo_deinitialize();
1327 }
1328
TEST(L3_CACHE,valid_flags)1329 TEST(L3_CACHE, valid_flags) {
1330 ASSERT_TRUE(cpuinfo_initialize());
1331
1332 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
1333 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1334 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1335 ASSERT_TRUE(cache);
1336
1337 EXPECT_EQ(0, cache->flags & ~valid_flags);
1338 }
1339 cpuinfo_deinitialize();
1340 }
1341
TEST(L3_CACHE,non_zero_processors)1342 TEST(L3_CACHE, non_zero_processors) {
1343 ASSERT_TRUE(cpuinfo_initialize());
1344 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1345 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1346 ASSERT_TRUE(cache);
1347
1348 EXPECT_NE(0, cache->processor_count);
1349 }
1350 cpuinfo_deinitialize();
1351 }
1352
TEST(L3_CACHE,valid_processors)1353 TEST(L3_CACHE, valid_processors) {
1354 ASSERT_TRUE(cpuinfo_initialize());
1355 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1356 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1357 ASSERT_TRUE(cache);
1358
1359 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
1360 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
1361 }
1362 cpuinfo_deinitialize();
1363 }
1364
TEST(L3_CACHE,consistent_processors)1365 TEST(L3_CACHE, consistent_processors) {
1366 ASSERT_TRUE(cpuinfo_initialize());
1367 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
1368 const cpuinfo_cache* cache = cpuinfo_get_l3_cache(i);
1369 ASSERT_TRUE(cache);
1370
1371 for (uint32_t j = 0; j < cache->processor_count; j++) {
1372 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
1373 ASSERT_TRUE(processor);
1374
1375 EXPECT_EQ(cache, processor->cache.l3);
1376 }
1377 }
1378 cpuinfo_deinitialize();
1379 }
1380
TEST(L4_CACHES_COUNT,within_bounds)1381 TEST(L4_CACHES_COUNT, within_bounds) {
1382 ASSERT_TRUE(cpuinfo_initialize());
1383 EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_processors_count());
1384 EXPECT_LE(cpuinfo_get_l4_caches_count(), cpuinfo_get_l3_caches_count());
1385 cpuinfo_deinitialize();
1386 }
1387
TEST(L4_CACHE,non_null)1388 TEST(L4_CACHE, non_null) {
1389 ASSERT_TRUE(cpuinfo_initialize());
1390 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1391 EXPECT_TRUE(cpuinfo_get_l4_cache(i));
1392 }
1393 cpuinfo_deinitialize();
1394 }
1395
TEST(L4_CACHE,non_zero_size)1396 TEST(L4_CACHE, non_zero_size) {
1397 ASSERT_TRUE(cpuinfo_initialize());
1398 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1399 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1400 ASSERT_TRUE(cache);
1401
1402 EXPECT_NE(0, cache->size);
1403 }
1404 cpuinfo_deinitialize();
1405 }
1406
TEST(L4_CACHE,valid_size)1407 TEST(L4_CACHE, valid_size) {
1408 ASSERT_TRUE(cpuinfo_initialize());
1409 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1410 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1411 ASSERT_TRUE(cache);
1412
1413 EXPECT_EQ(cache->size,
1414 cache->associativity * cache->sets * cache->partitions * cache->line_size);
1415 }
1416 cpuinfo_deinitialize();
1417 }
1418
TEST(L4_CACHE,non_zero_associativity)1419 TEST(L4_CACHE, non_zero_associativity) {
1420 ASSERT_TRUE(cpuinfo_initialize());
1421 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1422 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1423 ASSERT_TRUE(cache);
1424
1425 EXPECT_NE(0, cache->associativity);
1426 }
1427 cpuinfo_deinitialize();
1428 }
1429
TEST(L4_CACHE,non_zero_partitions)1430 TEST(L4_CACHE, non_zero_partitions) {
1431 ASSERT_TRUE(cpuinfo_initialize());
1432 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1433 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1434 ASSERT_TRUE(cache);
1435
1436 EXPECT_NE(0, cache->partitions);
1437 }
1438 cpuinfo_deinitialize();
1439 }
1440
TEST(L4_CACHE,non_zero_line_size)1441 TEST(L4_CACHE, non_zero_line_size) {
1442 ASSERT_TRUE(cpuinfo_initialize());
1443 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1444 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1445 ASSERT_TRUE(cache);
1446
1447 EXPECT_NE(0, cache->line_size);
1448 }
1449 cpuinfo_deinitialize();
1450 }
1451
TEST(L4_CACHE,power_of_2_line_size)1452 TEST(L4_CACHE, power_of_2_line_size) {
1453 ASSERT_TRUE(cpuinfo_initialize());
1454 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1455 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1456 ASSERT_TRUE(cache);
1457
1458 const uint32_t line_size = cache->line_size;
1459 EXPECT_NE(0, line_size);
1460 EXPECT_EQ(0, line_size & (line_size - 1));
1461 }
1462 cpuinfo_deinitialize();
1463 }
1464
TEST(L4_CACHE,reasonable_line_size)1465 TEST(L4_CACHE, reasonable_line_size) {
1466 ASSERT_TRUE(cpuinfo_initialize());
1467 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1468 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1469 ASSERT_TRUE(cache);
1470
1471 EXPECT_GE(cache->line_size, 16);
1472 EXPECT_LE(cache->line_size, 128);
1473 }
1474 cpuinfo_deinitialize();
1475 }
1476
TEST(L4_CACHE,valid_flags)1477 TEST(L4_CACHE, valid_flags) {
1478 ASSERT_TRUE(cpuinfo_initialize());
1479
1480 const uint32_t valid_flags = CPUINFO_CACHE_UNIFIED | CPUINFO_CACHE_INCLUSIVE | CPUINFO_CACHE_COMPLEX_INDEXING;
1481 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1482 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1483 ASSERT_TRUE(cache);
1484
1485 EXPECT_EQ(0, cache->flags & ~valid_flags);
1486 }
1487 cpuinfo_deinitialize();
1488 }
1489
TEST(L4_CACHE,non_zero_processors)1490 TEST(L4_CACHE, non_zero_processors) {
1491 ASSERT_TRUE(cpuinfo_initialize());
1492 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1493 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1494 ASSERT_TRUE(cache);
1495
1496 EXPECT_NE(0, cache->processor_count);
1497 }
1498 cpuinfo_deinitialize();
1499 }
1500
TEST(L4_CACHE,valid_processors)1501 TEST(L4_CACHE, valid_processors) {
1502 ASSERT_TRUE(cpuinfo_initialize());
1503 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1504 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1505 ASSERT_TRUE(cache);
1506
1507 EXPECT_LT(cache->processor_start, cpuinfo_get_processors_count());
1508 EXPECT_LE(cache->processor_start + cache->processor_count, cpuinfo_get_processors_count());
1509 }
1510 cpuinfo_deinitialize();
1511 }
1512
TEST(L4_CACHE,consistent_processors)1513 TEST(L4_CACHE, consistent_processors) {
1514 ASSERT_TRUE(cpuinfo_initialize());
1515 for (uint32_t i = 0; i < cpuinfo_get_l4_caches_count(); i++) {
1516 const cpuinfo_cache* cache = cpuinfo_get_l4_cache(i);
1517 ASSERT_TRUE(cache);
1518
1519 for (uint32_t j = 0; j < cache->processor_count; j++) {
1520 const cpuinfo_processor* processor = cpuinfo_get_processor(cache->processor_start + j);
1521 ASSERT_TRUE(processor);
1522
1523 EXPECT_EQ(cache, processor->cache.l4);
1524 }
1525 }
1526 cpuinfo_deinitialize();
1527 }
1528