xref: /aosp_15_r20/external/cpuinfo/src/arm/windows/init-by-logical-sys-info.c (revision 2b54f0db79fd8303838913b20ff3780cddaa909f)
1*2b54f0dbSXin Li #include <stdio.h>
2*2b54f0dbSXin Li #include <stdint.h>
3*2b54f0dbSXin Li #include <stdlib.h>
4*2b54f0dbSXin Li #include <string.h>
5*2b54f0dbSXin Li #include <malloc.h>
6*2b54f0dbSXin Li #include <errno.h>
7*2b54f0dbSXin Li #include <sys/types.h>
8*2b54f0dbSXin Li 
9*2b54f0dbSXin Li #include <cpuinfo.h>
10*2b54f0dbSXin Li #include <cpuinfo/internal-api.h>
11*2b54f0dbSXin Li #include <cpuinfo/log.h>
12*2b54f0dbSXin Li 
13*2b54f0dbSXin Li #include "windows-arm-init.h"
14*2b54f0dbSXin Li 
15*2b54f0dbSXin Li #define MAX_NR_OF_CACHES	(cpuinfo_cache_level_max - 1)
16*2b54f0dbSXin Li 
17*2b54f0dbSXin Li /* Call chain:
18*2b54f0dbSXin Li  * cpu_info_init_by_logical_sys_info
19*2b54f0dbSXin Li  * 		read_packages_for_processors
20*2b54f0dbSXin Li  * 		read_cores_for_processors
21*2b54f0dbSXin Li  * 		read_caches_for_processors
22*2b54f0dbSXin Li  * 			read_all_logical_processor_info_of_relation
23*2b54f0dbSXin Li  * 				parse_relation_processor_info
24*2b54f0dbSXin Li  * 					store_package_info_per_processor
25*2b54f0dbSXin Li  * 					store_core_info_per_processor
26*2b54f0dbSXin Li  * 				parse_relation_cache_info
27*2b54f0dbSXin Li  * 					store_cache_info_per_processor
28*2b54f0dbSXin Li  */
29*2b54f0dbSXin Li 
30*2b54f0dbSXin Li static uint32_t count_logical_processors(
31*2b54f0dbSXin Li 	const uint32_t max_group_count,
32*2b54f0dbSXin Li 	uint32_t* global_proc_index_per_group);
33*2b54f0dbSXin Li 
34*2b54f0dbSXin Li static uint32_t read_packages_for_processors(
35*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
36*2b54f0dbSXin Li 	const uint32_t number_of_processors,
37*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
38*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
39*2b54f0dbSXin Li 
40*2b54f0dbSXin Li static uint32_t read_cores_for_processors(
41*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
42*2b54f0dbSXin Li 	const uint32_t number_of_processors,
43*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
44*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
45*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
46*2b54f0dbSXin Li 
47*2b54f0dbSXin Li static uint32_t read_caches_for_processors(
48*2b54f0dbSXin Li 	struct cpuinfo_processor *processors,
49*2b54f0dbSXin Li 	const uint32_t number_of_processors,
50*2b54f0dbSXin Li 	struct cpuinfo_cache *caches,
51*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
52*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
53*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
54*2b54f0dbSXin Li 
55*2b54f0dbSXin Li static uint32_t read_all_logical_processor_info_of_relation(
56*2b54f0dbSXin Li 	LOGICAL_PROCESSOR_RELATIONSHIP info_type,
57*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
58*2b54f0dbSXin Li 	const uint32_t number_of_processors,
59*2b54f0dbSXin Li 	struct cpuinfo_cache* caches,
60*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
61*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
62*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
63*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
64*2b54f0dbSXin Li 
65*2b54f0dbSXin Li static bool parse_relation_processor_info(
66*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
67*2b54f0dbSXin Li 	uint32_t nr_of_processors,
68*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
69*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,
70*2b54f0dbSXin Li 	const uint32_t info_id,
71*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
72*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
73*2b54f0dbSXin Li 
74*2b54f0dbSXin Li static bool parse_relation_cache_info(
75*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
76*2b54f0dbSXin Li 	struct cpuinfo_cache* caches,
77*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
78*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
79*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info);
80*2b54f0dbSXin Li 
81*2b54f0dbSXin Li static void store_package_info_per_processor(
82*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
83*2b54f0dbSXin Li 	const uint32_t processor_global_index,
84*2b54f0dbSXin Li 	const uint32_t package_id,
85*2b54f0dbSXin Li 	const uint32_t group_id,
86*2b54f0dbSXin Li 	const uint32_t processor_id_in_group);
87*2b54f0dbSXin Li 
88*2b54f0dbSXin Li static void store_core_info_per_processor(
89*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
90*2b54f0dbSXin Li 	const uint32_t processor_global_index,
91*2b54f0dbSXin Li 	const uint32_t core_id,
92*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX core_info,
93*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
94*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info);
95*2b54f0dbSXin Li 
96*2b54f0dbSXin Li static void store_cache_info_per_processor(
97*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
98*2b54f0dbSXin Li 	const uint32_t processor_global_index,
99*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,
100*2b54f0dbSXin Li 	struct cpuinfo_cache* current_cache);
101*2b54f0dbSXin Li 
102*2b54f0dbSXin Li static bool connect_packages_cores_clusters_by_processors(
103*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
104*2b54f0dbSXin Li 	const uint32_t nr_of_processors,
105*2b54f0dbSXin Li 	struct cpuinfo_package* packages,
106*2b54f0dbSXin Li 	const uint32_t nr_of_packages,
107*2b54f0dbSXin Li 	struct cpuinfo_cluster* clusters,
108*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
109*2b54f0dbSXin Li 	const uint32_t nr_of_cores,
110*2b54f0dbSXin Li 	const struct woa_chip_info* chip_info,
111*2b54f0dbSXin Li 	enum cpuinfo_vendor vendor);
112*2b54f0dbSXin Li 
113*2b54f0dbSXin Li static inline uint32_t low_index_from_kaffinity(KAFFINITY kaffinity);
114*2b54f0dbSXin Li 
115*2b54f0dbSXin Li 
cpu_info_init_by_logical_sys_info(const struct woa_chip_info * chip_info,const enum cpuinfo_vendor vendor)116*2b54f0dbSXin Li bool cpu_info_init_by_logical_sys_info(
117*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info,
118*2b54f0dbSXin Li 	const enum cpuinfo_vendor vendor)
119*2b54f0dbSXin Li {
120*2b54f0dbSXin Li 	struct cpuinfo_processor* processors = NULL;
121*2b54f0dbSXin Li 	struct cpuinfo_package* packages = NULL;
122*2b54f0dbSXin Li 	struct cpuinfo_cluster* clusters = NULL;
123*2b54f0dbSXin Li 	struct cpuinfo_core* cores = NULL;
124*2b54f0dbSXin Li 	struct cpuinfo_cache* caches = NULL;
125*2b54f0dbSXin Li 	struct cpuinfo_uarch_info* uarchs = NULL;
126*2b54f0dbSXin Li 
127*2b54f0dbSXin Li 	uint32_t nr_of_packages = 0;
128*2b54f0dbSXin Li 	uint32_t nr_of_cores = 0;
129*2b54f0dbSXin Li 	uint32_t nr_of_all_caches = 0;
130*2b54f0dbSXin Li 	uint32_t numbers_of_caches[MAX_NR_OF_CACHES] = {0};
131*2b54f0dbSXin Li 
132*2b54f0dbSXin Li 	uint32_t nr_of_uarchs = 0;
133*2b54f0dbSXin Li 	bool result = false;
134*2b54f0dbSXin Li 
135*2b54f0dbSXin Li 	HANDLE heap = GetProcessHeap();
136*2b54f0dbSXin Li 
137*2b54f0dbSXin Li 	/* 1. Count available logical processor groups and processors */
138*2b54f0dbSXin Li 	const uint32_t max_group_count = (uint32_t) GetMaximumProcessorGroupCount();
139*2b54f0dbSXin Li 	cpuinfo_log_debug("detected %"PRIu32" processor group(s)", max_group_count);
140*2b54f0dbSXin Li 	/* We need to store the absolute processor ID offsets for every groups, because
141*2b54f0dbSXin Li 	 *  1. We can't assume every processor groups include the same number of
142*2b54f0dbSXin Li 	 *     logical processors.
143*2b54f0dbSXin Li 	 *  2. Every processor groups know its group number and processor IDs within
144*2b54f0dbSXin Li 	 *     the group, but not the global processor IDs.
145*2b54f0dbSXin Li 	 *  3. We need to list every logical processors by global IDs.
146*2b54f0dbSXin Li 	*/
147*2b54f0dbSXin Li 	uint32_t* global_proc_index_per_group =
148*2b54f0dbSXin Li 		(uint32_t*) HeapAlloc(heap, 0, max_group_count * sizeof(uint32_t));
149*2b54f0dbSXin Li 	if (global_proc_index_per_group == NULL) {
150*2b54f0dbSXin Li 		cpuinfo_log_error(
151*2b54f0dbSXin Li 			"failed to allocate %zu bytes for descriptions of %"PRIu32" processor groups",
152*2b54f0dbSXin Li 			max_group_count * sizeof(struct cpuinfo_processor), max_group_count);
153*2b54f0dbSXin Li 		goto clean_up;
154*2b54f0dbSXin Li 	}
155*2b54f0dbSXin Li 
156*2b54f0dbSXin Li 	uint32_t nr_of_processors =
157*2b54f0dbSXin Li 		count_logical_processors(max_group_count, global_proc_index_per_group);
158*2b54f0dbSXin Li 	processors = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_processors * sizeof(struct cpuinfo_processor));
159*2b54f0dbSXin Li 	if (processors == NULL) {
160*2b54f0dbSXin Li 		cpuinfo_log_error(
161*2b54f0dbSXin Li 			"failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors",
162*2b54f0dbSXin Li 			nr_of_processors * sizeof(struct cpuinfo_processor), nr_of_processors);
163*2b54f0dbSXin Li 		goto clean_up;
164*2b54f0dbSXin Li 	}
165*2b54f0dbSXin Li 
166*2b54f0dbSXin Li 	/* 2. Read topology information via MSDN API: packages, cores and caches*/
167*2b54f0dbSXin Li 	nr_of_packages = read_packages_for_processors(
168*2b54f0dbSXin Li 						processors, nr_of_processors,
169*2b54f0dbSXin Li 						global_proc_index_per_group,
170*2b54f0dbSXin Li 						chip_info);
171*2b54f0dbSXin Li 	if (!nr_of_packages) {
172*2b54f0dbSXin Li 		cpuinfo_log_error("error in reading package information");
173*2b54f0dbSXin Li 		goto clean_up;
174*2b54f0dbSXin Li 	}
175*2b54f0dbSXin Li 	cpuinfo_log_debug("detected %"PRIu32" processor package(s)", nr_of_packages);
176*2b54f0dbSXin Li 
177*2b54f0dbSXin Li 	/* We need the EfficiencyClass to parse uarch from the core information,
178*2b54f0dbSXin Li 	 * but we need to iterate first to count cores and allocate memory then
179*2b54f0dbSXin Li 	 * we will iterate again to read and store data to cpuinfo_core structures.
180*2b54f0dbSXin Li 	 */
181*2b54f0dbSXin Li 	nr_of_cores = read_cores_for_processors(
182*2b54f0dbSXin Li 					processors, nr_of_processors,
183*2b54f0dbSXin Li 					global_proc_index_per_group, NULL,
184*2b54f0dbSXin Li 					chip_info);
185*2b54f0dbSXin Li 	if (!nr_of_cores) {
186*2b54f0dbSXin Li 		cpuinfo_log_error("error in reading core information");
187*2b54f0dbSXin Li 		goto clean_up;
188*2b54f0dbSXin Li 	}
189*2b54f0dbSXin Li 	cpuinfo_log_debug("detected %"PRIu32" processor core(s)", nr_of_cores);
190*2b54f0dbSXin Li 
191*2b54f0dbSXin Li 	/* There is no API to read number of caches, so we need to iterate twice on caches:
192*2b54f0dbSXin Li 		1. Count all type of caches -> allocate memory
193*2b54f0dbSXin Li 		2. Read out cache data and store to allocated memory
194*2b54f0dbSXin Li 	 */
195*2b54f0dbSXin Li 	nr_of_all_caches = read_caches_for_processors(
196*2b54f0dbSXin Li 						processors, nr_of_processors,
197*2b54f0dbSXin Li 						caches, numbers_of_caches,
198*2b54f0dbSXin Li 						global_proc_index_per_group, chip_info);
199*2b54f0dbSXin Li 	if (!nr_of_all_caches) {
200*2b54f0dbSXin Li 		cpuinfo_log_error("error in reading cache information");
201*2b54f0dbSXin Li 		goto clean_up;
202*2b54f0dbSXin Li 	}
203*2b54f0dbSXin Li 	cpuinfo_log_debug("detected %"PRIu32" processor cache(s)", nr_of_all_caches);
204*2b54f0dbSXin Li 
205*2b54f0dbSXin Li 	/* 3. Allocate memory for package, cluster, core and cache structures */
206*2b54f0dbSXin Li 	packages = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_packages * sizeof(struct cpuinfo_package));
207*2b54f0dbSXin Li 	if (packages == NULL) {
208*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" physical packages",
209*2b54f0dbSXin Li 			nr_of_packages * sizeof(struct cpuinfo_package), nr_of_packages);
210*2b54f0dbSXin Li 		goto clean_up;
211*2b54f0dbSXin Li 	}
212*2b54f0dbSXin Li 
213*2b54f0dbSXin Li 	/* We don't have cluster information so we explicitly set clusters to equal to cores. */
214*2b54f0dbSXin Li 	clusters = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_cores * sizeof(struct cpuinfo_cluster));
215*2b54f0dbSXin Li 	if (clusters == NULL) {
216*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" core clusters",
217*2b54f0dbSXin Li 			nr_of_cores * sizeof(struct cpuinfo_cluster), nr_of_cores);
218*2b54f0dbSXin Li 		goto clean_up;
219*2b54f0dbSXin Li 	}
220*2b54f0dbSXin Li 
221*2b54f0dbSXin Li 	cores = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_cores * sizeof(struct cpuinfo_core));
222*2b54f0dbSXin Li 	if (cores == NULL) {
223*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" cores",
224*2b54f0dbSXin Li 			nr_of_cores * sizeof(struct cpuinfo_core), nr_of_cores);
225*2b54f0dbSXin Li 		goto clean_up;
226*2b54f0dbSXin Li 	}
227*2b54f0dbSXin Li 
228*2b54f0dbSXin Li 	/* We allocate one contiguous cache array for all caches, then use offsets per cache type. */
229*2b54f0dbSXin Li 	caches = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_all_caches * sizeof(struct cpuinfo_cache));
230*2b54f0dbSXin Li 	if (caches == NULL) {
231*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" caches",
232*2b54f0dbSXin Li 			nr_of_all_caches * sizeof(struct cpuinfo_cache), nr_of_all_caches);
233*2b54f0dbSXin Li 		goto clean_up;
234*2b54f0dbSXin Li 	}
235*2b54f0dbSXin Li 
236*2b54f0dbSXin Li 	/* 4.Read missing topology information that can't be saved without counted
237*2b54f0dbSXin Li 	 *   allocate structures in the first round.
238*2b54f0dbSXin Li 	 */
239*2b54f0dbSXin Li 	nr_of_all_caches = read_caches_for_processors(
240*2b54f0dbSXin Li 						processors, nr_of_processors,
241*2b54f0dbSXin Li 						caches, numbers_of_caches, global_proc_index_per_group, chip_info);
242*2b54f0dbSXin Li 	if (!nr_of_all_caches) {
243*2b54f0dbSXin Li 		cpuinfo_log_error("error in reading cache information");
244*2b54f0dbSXin Li 		goto clean_up;
245*2b54f0dbSXin Li 	}
246*2b54f0dbSXin Li 
247*2b54f0dbSXin Li 	nr_of_cores = read_cores_for_processors(
248*2b54f0dbSXin Li 		processors, nr_of_processors,
249*2b54f0dbSXin Li 		global_proc_index_per_group, cores,
250*2b54f0dbSXin Li 		chip_info);
251*2b54f0dbSXin Li 	if (!nr_of_cores) {
252*2b54f0dbSXin Li 		cpuinfo_log_error("error in reading core information");
253*2b54f0dbSXin Li 		goto clean_up;
254*2b54f0dbSXin Li 	}
255*2b54f0dbSXin Li 
256*2b54f0dbSXin Li 	/* 5. Now that we read out everything from the system we can, fill the package, cluster
257*2b54f0dbSXin Li 	 *    and core structures respectively.
258*2b54f0dbSXin Li 	 */
259*2b54f0dbSXin Li 	result = connect_packages_cores_clusters_by_processors(
260*2b54f0dbSXin Li 				processors, nr_of_processors,
261*2b54f0dbSXin Li 				packages, nr_of_packages,
262*2b54f0dbSXin Li 				clusters,
263*2b54f0dbSXin Li 				cores, nr_of_cores,
264*2b54f0dbSXin Li 				chip_info,
265*2b54f0dbSXin Li 				vendor);
266*2b54f0dbSXin Li 	if(!result) {
267*2b54f0dbSXin Li 		cpuinfo_log_error("error in connecting information");
268*2b54f0dbSXin Li 		goto clean_up;
269*2b54f0dbSXin Li 	}
270*2b54f0dbSXin Li 
271*2b54f0dbSXin Li 	/* 6. Count and store uarchs of cores, assuming same uarchs are neighbors */
272*2b54f0dbSXin Li 	enum cpuinfo_uarch prev_uarch = cpuinfo_uarch_unknown;
273*2b54f0dbSXin Li 	for (uint32_t i = 0; i < nr_of_cores; i++) {
274*2b54f0dbSXin Li 		if (prev_uarch != cores[i].uarch) {
275*2b54f0dbSXin Li 			nr_of_uarchs++;
276*2b54f0dbSXin Li 			prev_uarch = cores[i].uarch;
277*2b54f0dbSXin Li 		}
278*2b54f0dbSXin Li 	}
279*2b54f0dbSXin Li 	uarchs = HeapAlloc(heap, HEAP_ZERO_MEMORY, nr_of_uarchs * sizeof(struct cpuinfo_uarch_info));
280*2b54f0dbSXin Li 	if (uarchs == NULL) {
281*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" uarchs",
282*2b54f0dbSXin Li 			nr_of_uarchs * sizeof(struct cpuinfo_uarch_info), nr_of_uarchs);
283*2b54f0dbSXin Li 		goto clean_up;
284*2b54f0dbSXin Li 	}
285*2b54f0dbSXin Li 	prev_uarch = cpuinfo_uarch_unknown;
286*2b54f0dbSXin Li 	for (uint32_t i = 0, uarch_counter = 0; i < nr_of_cores; i++) {
287*2b54f0dbSXin Li 		if (prev_uarch != cores[i].uarch) {
288*2b54f0dbSXin Li 			prev_uarch = cores[i].uarch;
289*2b54f0dbSXin Li 			uarchs[uarch_counter].uarch = cores[i].uarch;
290*2b54f0dbSXin Li 			uarchs[uarch_counter].core_count = 1;
291*2b54f0dbSXin Li 			uarchs[uarch_counter].processor_count = cores[i].processor_count;
292*2b54f0dbSXin Li 			uarch_counter++;
293*2b54f0dbSXin Li 		} else if (prev_uarch != cpuinfo_uarch_unknown) {
294*2b54f0dbSXin Li 			uarchs[uarch_counter].core_count++;
295*2b54f0dbSXin Li 			uarchs[uarch_counter].processor_count += cores[i].processor_count;
296*2b54f0dbSXin Li 		}
297*2b54f0dbSXin Li 	}
298*2b54f0dbSXin Li 
299*2b54f0dbSXin Li 	/* 7. Commit changes */
300*2b54f0dbSXin Li 	cpuinfo_processors = processors;
301*2b54f0dbSXin Li 	cpuinfo_packages = packages;
302*2b54f0dbSXin Li 	cpuinfo_clusters = clusters;
303*2b54f0dbSXin Li 	cpuinfo_cores = cores;
304*2b54f0dbSXin Li 	cpuinfo_uarchs = uarchs;
305*2b54f0dbSXin Li 
306*2b54f0dbSXin Li 	cpuinfo_processors_count = nr_of_processors;
307*2b54f0dbSXin Li 	cpuinfo_packages_count = nr_of_packages;
308*2b54f0dbSXin Li 	cpuinfo_clusters_count = nr_of_cores;
309*2b54f0dbSXin Li 	cpuinfo_cores_count = nr_of_cores;
310*2b54f0dbSXin Li 	cpuinfo_uarchs_count = nr_of_uarchs;
311*2b54f0dbSXin Li 
312*2b54f0dbSXin Li 	for (uint32_t i = 0; i < MAX_NR_OF_CACHES; i++) {
313*2b54f0dbSXin Li 		cpuinfo_cache_count[i] = numbers_of_caches[i];
314*2b54f0dbSXin Li 	}
315*2b54f0dbSXin Li 	cpuinfo_cache[cpuinfo_cache_level_1i] = caches;
316*2b54f0dbSXin Li 	cpuinfo_cache[cpuinfo_cache_level_1d] = cpuinfo_cache[cpuinfo_cache_level_1i] + cpuinfo_cache_count[cpuinfo_cache_level_1i];
317*2b54f0dbSXin Li 	cpuinfo_cache[cpuinfo_cache_level_2]  = cpuinfo_cache[cpuinfo_cache_level_1d] + cpuinfo_cache_count[cpuinfo_cache_level_1d];
318*2b54f0dbSXin Li 	cpuinfo_cache[cpuinfo_cache_level_3]  = cpuinfo_cache[cpuinfo_cache_level_2]  + cpuinfo_cache_count[cpuinfo_cache_level_2];
319*2b54f0dbSXin Li 	cpuinfo_cache[cpuinfo_cache_level_4]  = cpuinfo_cache[cpuinfo_cache_level_3]  + cpuinfo_cache_count[cpuinfo_cache_level_3];
320*2b54f0dbSXin Li 	cpuinfo_max_cache_size = cpuinfo_compute_max_cache_size(&processors[0]);
321*2b54f0dbSXin Li 
322*2b54f0dbSXin Li 	result = true;
323*2b54f0dbSXin Li 	MemoryBarrier();
324*2b54f0dbSXin Li 
325*2b54f0dbSXin Li 	processors = NULL;
326*2b54f0dbSXin Li 	packages = NULL;
327*2b54f0dbSXin Li 	clusters = NULL;
328*2b54f0dbSXin Li 	cores = NULL;
329*2b54f0dbSXin Li 	caches = NULL;
330*2b54f0dbSXin Li 	uarchs = NULL;
331*2b54f0dbSXin Li 
332*2b54f0dbSXin Li clean_up:
333*2b54f0dbSXin Li 	/* The propagated pointers, shouldn't be freed, only in case of error
334*2b54f0dbSXin Li 	 * and unfinished init.
335*2b54f0dbSXin Li 	 */
336*2b54f0dbSXin Li 	if (processors != NULL) {
337*2b54f0dbSXin Li 		HeapFree(heap, 0, processors);
338*2b54f0dbSXin Li 	}
339*2b54f0dbSXin Li 	if (packages != NULL) {
340*2b54f0dbSXin Li 		HeapFree(heap, 0, packages);
341*2b54f0dbSXin Li 	}
342*2b54f0dbSXin Li 	if (clusters != NULL) {
343*2b54f0dbSXin Li 		HeapFree(heap, 0, clusters);
344*2b54f0dbSXin Li 	}
345*2b54f0dbSXin Li 	if (cores != NULL) {
346*2b54f0dbSXin Li 		HeapFree(heap, 0, cores);
347*2b54f0dbSXin Li 	}
348*2b54f0dbSXin Li 	if (caches != NULL) {
349*2b54f0dbSXin Li 		HeapFree(heap, 0, caches);
350*2b54f0dbSXin Li 	}
351*2b54f0dbSXin Li 	if (uarchs != NULL) {
352*2b54f0dbSXin Li 		HeapFree(heap, 0, uarchs);
353*2b54f0dbSXin Li 	}
354*2b54f0dbSXin Li 
355*2b54f0dbSXin Li 	/* Free the locally used temporary pointers */
356*2b54f0dbSXin Li 	HeapFree(heap, 0, global_proc_index_per_group);
357*2b54f0dbSXin Li 	global_proc_index_per_group = NULL;
358*2b54f0dbSXin Li 	return result;
359*2b54f0dbSXin Li }
360*2b54f0dbSXin Li 
count_logical_processors(const uint32_t max_group_count,uint32_t * global_proc_index_per_group)361*2b54f0dbSXin Li static uint32_t count_logical_processors(
362*2b54f0dbSXin Li 	const uint32_t max_group_count,
363*2b54f0dbSXin Li 	uint32_t* global_proc_index_per_group)
364*2b54f0dbSXin Li {
365*2b54f0dbSXin Li 	uint32_t nr_of_processors = 0;
366*2b54f0dbSXin Li 
367*2b54f0dbSXin Li 	for (uint32_t i = 0; i < max_group_count; i++) {
368*2b54f0dbSXin Li 		uint32_t nr_of_processors_per_group = GetMaximumProcessorCount((WORD) i);
369*2b54f0dbSXin Li 		cpuinfo_log_debug("detected %"PRIu32" processor(s) in group %"PRIu32"",
370*2b54f0dbSXin Li 			nr_of_processors_per_group, i);
371*2b54f0dbSXin Li 		global_proc_index_per_group[i] = nr_of_processors;
372*2b54f0dbSXin Li 		nr_of_processors += nr_of_processors_per_group;
373*2b54f0dbSXin Li 	}
374*2b54f0dbSXin Li 	return nr_of_processors;
375*2b54f0dbSXin Li }
376*2b54f0dbSXin Li 
read_packages_for_processors(struct cpuinfo_processor * processors,const uint32_t number_of_processors,const uint32_t * global_proc_index_per_group,const struct woa_chip_info * chip_info)377*2b54f0dbSXin Li static uint32_t read_packages_for_processors(
378*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
379*2b54f0dbSXin Li 	const uint32_t number_of_processors,
380*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
381*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info)
382*2b54f0dbSXin Li {
383*2b54f0dbSXin Li 	return read_all_logical_processor_info_of_relation(
384*2b54f0dbSXin Li 		RelationProcessorPackage,
385*2b54f0dbSXin Li 		processors,
386*2b54f0dbSXin Li 		number_of_processors,
387*2b54f0dbSXin Li 		NULL,
388*2b54f0dbSXin Li 		NULL,
389*2b54f0dbSXin Li 		NULL,
390*2b54f0dbSXin Li 		global_proc_index_per_group,
391*2b54f0dbSXin Li 		chip_info);
392*2b54f0dbSXin Li }
393*2b54f0dbSXin Li 
read_cores_for_processors(struct cpuinfo_processor * processors,const uint32_t number_of_processors,const uint32_t * global_proc_index_per_group,struct cpuinfo_core * cores,const struct woa_chip_info * chip_info)394*2b54f0dbSXin Li uint32_t read_cores_for_processors(
395*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
396*2b54f0dbSXin Li 	const uint32_t number_of_processors,
397*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
398*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
399*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info)
400*2b54f0dbSXin Li {
401*2b54f0dbSXin Li 	return read_all_logical_processor_info_of_relation(
402*2b54f0dbSXin Li 		RelationProcessorCore,
403*2b54f0dbSXin Li 		processors,
404*2b54f0dbSXin Li 		number_of_processors,
405*2b54f0dbSXin Li 		NULL,
406*2b54f0dbSXin Li 		NULL,
407*2b54f0dbSXin Li 		cores,
408*2b54f0dbSXin Li 		global_proc_index_per_group,
409*2b54f0dbSXin Li 		chip_info);
410*2b54f0dbSXin Li }
411*2b54f0dbSXin Li 
read_caches_for_processors(struct cpuinfo_processor * processors,const uint32_t number_of_processors,struct cpuinfo_cache * caches,uint32_t * numbers_of_caches,const uint32_t * global_proc_index_per_group,const struct woa_chip_info * chip_info)412*2b54f0dbSXin Li static uint32_t read_caches_for_processors(
413*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
414*2b54f0dbSXin Li 	const uint32_t number_of_processors,
415*2b54f0dbSXin Li 	struct cpuinfo_cache* caches,
416*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
417*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
418*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info)
419*2b54f0dbSXin Li {
420*2b54f0dbSXin Li 	/* Reset processor start indexes */
421*2b54f0dbSXin Li 	if (caches) {
422*2b54f0dbSXin Li 		uint32_t cache_offset = 0;
423*2b54f0dbSXin Li 		for (uint32_t i = 0; i < MAX_NR_OF_CACHES; i++) {
424*2b54f0dbSXin Li 			for (uint32_t j = 0; j < numbers_of_caches[i]; j++) {
425*2b54f0dbSXin Li 				caches[cache_offset + j].processor_start = UINT32_MAX;
426*2b54f0dbSXin Li 			}
427*2b54f0dbSXin Li 			cache_offset += numbers_of_caches[i];
428*2b54f0dbSXin Li 		}
429*2b54f0dbSXin Li 	}
430*2b54f0dbSXin Li 
431*2b54f0dbSXin Li 	return read_all_logical_processor_info_of_relation(
432*2b54f0dbSXin Li 		RelationCache,
433*2b54f0dbSXin Li 		processors,
434*2b54f0dbSXin Li 		number_of_processors,
435*2b54f0dbSXin Li 		caches,
436*2b54f0dbSXin Li 		numbers_of_caches,
437*2b54f0dbSXin Li 		NULL,
438*2b54f0dbSXin Li 		global_proc_index_per_group,
439*2b54f0dbSXin Li 		chip_info);
440*2b54f0dbSXin Li }
441*2b54f0dbSXin Li 
read_all_logical_processor_info_of_relation(LOGICAL_PROCESSOR_RELATIONSHIP info_type,struct cpuinfo_processor * processors,const uint32_t number_of_processors,struct cpuinfo_cache * caches,uint32_t * numbers_of_caches,struct cpuinfo_core * cores,const uint32_t * global_proc_index_per_group,const struct woa_chip_info * chip_info)442*2b54f0dbSXin Li static uint32_t read_all_logical_processor_info_of_relation(
443*2b54f0dbSXin Li 	LOGICAL_PROCESSOR_RELATIONSHIP info_type,
444*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
445*2b54f0dbSXin Li 	const uint32_t number_of_processors,
446*2b54f0dbSXin Li 	struct cpuinfo_cache* caches,
447*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
448*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
449*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
450*2b54f0dbSXin Li 	const struct woa_chip_info* chip_info)
451*2b54f0dbSXin Li {
452*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX infos = NULL;
453*2b54f0dbSXin Li 	uint32_t nr_of_structs = 0;
454*2b54f0dbSXin Li 	DWORD info_size = 0;
455*2b54f0dbSXin Li 	bool result = false;
456*2b54f0dbSXin Li 	HANDLE heap = GetProcessHeap();
457*2b54f0dbSXin Li 
458*2b54f0dbSXin Li 	/* 1. Query the size of the information structure first */
459*2b54f0dbSXin Li 	if (GetLogicalProcessorInformationEx(info_type, NULL, &info_size) == FALSE) {
460*2b54f0dbSXin Li 		const DWORD last_error = GetLastError();
461*2b54f0dbSXin Li 		if (last_error != ERROR_INSUFFICIENT_BUFFER) {
462*2b54f0dbSXin Li 			cpuinfo_log_error(
463*2b54f0dbSXin Li 				"failed to query size of processor %"PRIu32" information information: error %"PRIu32"",
464*2b54f0dbSXin Li 				(uint32_t)info_type, (uint32_t) last_error);
465*2b54f0dbSXin Li 			goto clean_up;
466*2b54f0dbSXin Li 		}
467*2b54f0dbSXin Li 	}
468*2b54f0dbSXin Li 	/* 2. Allocate memory for the information structure */
469*2b54f0dbSXin Li 	infos = HeapAlloc(heap, 0, info_size);
470*2b54f0dbSXin Li 	if (infos == NULL) {
471*2b54f0dbSXin Li 		cpuinfo_log_error("failed to allocate %"PRIu32" bytes for logical processor information",
472*2b54f0dbSXin Li 			(uint32_t) info_size);
473*2b54f0dbSXin Li 		goto clean_up;
474*2b54f0dbSXin Li 	}
475*2b54f0dbSXin Li 	/* 3. Read the information structure */
476*2b54f0dbSXin Li 	if (GetLogicalProcessorInformationEx(info_type, infos, &info_size) == FALSE) {
477*2b54f0dbSXin Li 		cpuinfo_log_error("failed to query processor %"PRIu32" information: error %"PRIu32"",
478*2b54f0dbSXin Li 			(uint32_t)info_type, (uint32_t) GetLastError());
479*2b54f0dbSXin Li 		goto clean_up;
480*2b54f0dbSXin Li 	}
481*2b54f0dbSXin Li 
482*2b54f0dbSXin Li 	/* 4. Parse the structure and store relevant data */
483*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info_end =
484*2b54f0dbSXin Li 		(PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) infos + info_size);
485*2b54f0dbSXin Li 	for (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info = infos;
486*2b54f0dbSXin Li 		info < info_end;
487*2b54f0dbSXin Li 		info = (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) info + info->Size))
488*2b54f0dbSXin Li 	{
489*2b54f0dbSXin Li 		if (info->Relationship != info_type) {
490*2b54f0dbSXin Li 			cpuinfo_log_warning(
491*2b54f0dbSXin Li 				"unexpected processor info type (%"PRIu32") for processor information",
492*2b54f0dbSXin Li 				(uint32_t) info->Relationship);
493*2b54f0dbSXin Li 			continue;
494*2b54f0dbSXin Li 		}
495*2b54f0dbSXin Li 
496*2b54f0dbSXin Li 		const uint32_t info_id = nr_of_structs++;
497*2b54f0dbSXin Li 
498*2b54f0dbSXin Li 		switch(info_type) {
499*2b54f0dbSXin Li 			case RelationProcessorPackage:
500*2b54f0dbSXin Li 				result = parse_relation_processor_info(
501*2b54f0dbSXin Li 							processors,
502*2b54f0dbSXin Li 							number_of_processors,
503*2b54f0dbSXin Li 							global_proc_index_per_group,
504*2b54f0dbSXin Li 							info,
505*2b54f0dbSXin Li 							info_id,
506*2b54f0dbSXin Li 							cores,
507*2b54f0dbSXin Li 							chip_info);
508*2b54f0dbSXin Li 			break;
509*2b54f0dbSXin Li 			case RelationProcessorCore:
510*2b54f0dbSXin Li 				result = parse_relation_processor_info(
511*2b54f0dbSXin Li 							processors,
512*2b54f0dbSXin Li 							number_of_processors,
513*2b54f0dbSXin Li 							global_proc_index_per_group,
514*2b54f0dbSXin Li 							info,
515*2b54f0dbSXin Li 							info_id,
516*2b54f0dbSXin Li 							cores,
517*2b54f0dbSXin Li 							chip_info);
518*2b54f0dbSXin Li 			break;
519*2b54f0dbSXin Li 			case RelationCache:
520*2b54f0dbSXin Li 				result = parse_relation_cache_info(
521*2b54f0dbSXin Li 							processors,
522*2b54f0dbSXin Li 							caches,
523*2b54f0dbSXin Li 							numbers_of_caches,
524*2b54f0dbSXin Li 							global_proc_index_per_group,
525*2b54f0dbSXin Li 							info);
526*2b54f0dbSXin Li 			break;
527*2b54f0dbSXin Li 			default:
528*2b54f0dbSXin Li 				cpuinfo_log_error(
529*2b54f0dbSXin Li 					"unexpected processor info type (%"PRIu32") for processor information",
530*2b54f0dbSXin Li 					(uint32_t) info->Relationship);
531*2b54f0dbSXin Li 				result = false;
532*2b54f0dbSXin Li 			break;
533*2b54f0dbSXin Li 		}
534*2b54f0dbSXin Li 		if (!result) {
535*2b54f0dbSXin Li 			nr_of_structs = 0;
536*2b54f0dbSXin Li 			goto clean_up;
537*2b54f0dbSXin Li 		}
538*2b54f0dbSXin Li 	}
539*2b54f0dbSXin Li clean_up:
540*2b54f0dbSXin Li 	/* 5. Release dynamically allocated info structure. */
541*2b54f0dbSXin Li 	HeapFree(heap, 0, infos);
542*2b54f0dbSXin Li 	infos = NULL;
543*2b54f0dbSXin Li 	return nr_of_structs;
544*2b54f0dbSXin Li }
545*2b54f0dbSXin Li 
parse_relation_processor_info(struct cpuinfo_processor * processors,uint32_t nr_of_processors,const uint32_t * global_proc_index_per_group,PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,const uint32_t info_id,struct cpuinfo_core * cores,const struct woa_chip_info * chip_info)546*2b54f0dbSXin Li static bool parse_relation_processor_info(
547*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
548*2b54f0dbSXin Li 	uint32_t nr_of_processors,
549*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
550*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,
551*2b54f0dbSXin Li 	const uint32_t info_id,
552*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
553*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info)
554*2b54f0dbSXin Li {
555*2b54f0dbSXin Li 	for (uint32_t i = 0; i < info->Processor.GroupCount; i++) {
556*2b54f0dbSXin Li 		const uint32_t group_id = info->Processor.GroupMask[i].Group;
557*2b54f0dbSXin Li 		/* Bitmask representing processors in this group belonging to this package */
558*2b54f0dbSXin Li 		KAFFINITY group_processors_mask = info->Processor.GroupMask[i].Mask;
559*2b54f0dbSXin Li 		while (group_processors_mask != 0) {
560*2b54f0dbSXin Li 			const uint32_t processor_id_in_group =
561*2b54f0dbSXin Li 				low_index_from_kaffinity(group_processors_mask);
562*2b54f0dbSXin Li 			const uint32_t processor_global_index =
563*2b54f0dbSXin Li 				global_proc_index_per_group[group_id] + processor_id_in_group;
564*2b54f0dbSXin Li 
565*2b54f0dbSXin Li 			if(processor_global_index >= nr_of_processors) {
566*2b54f0dbSXin Li 				cpuinfo_log_error("unexpected processor index %"PRIu32"",
567*2b54f0dbSXin Li 					processor_global_index);
568*2b54f0dbSXin Li 				return false;
569*2b54f0dbSXin Li 			}
570*2b54f0dbSXin Li 
571*2b54f0dbSXin Li 			switch(info->Relationship) {
572*2b54f0dbSXin Li 				case RelationProcessorPackage:
573*2b54f0dbSXin Li 					store_package_info_per_processor(
574*2b54f0dbSXin Li 						processors, processor_global_index, info_id,
575*2b54f0dbSXin Li 						group_id, processor_id_in_group);
576*2b54f0dbSXin Li 				break;
577*2b54f0dbSXin Li 				case RelationProcessorCore:
578*2b54f0dbSXin Li 					store_core_info_per_processor(
579*2b54f0dbSXin Li 						processors, processor_global_index,
580*2b54f0dbSXin Li 						info_id, info,
581*2b54f0dbSXin Li 						cores, chip_info);
582*2b54f0dbSXin Li 				break;
583*2b54f0dbSXin Li 				default:
584*2b54f0dbSXin Li 					cpuinfo_log_error(
585*2b54f0dbSXin Li 						"unexpected processor info type (%"PRIu32") for processor information",
586*2b54f0dbSXin Li 						(uint32_t) info->Relationship);
587*2b54f0dbSXin Li 				break;
588*2b54f0dbSXin Li 			}
589*2b54f0dbSXin Li 			/* Clear the bits in affinity mask, lower the least set bit. */
590*2b54f0dbSXin Li 			group_processors_mask &= (group_processors_mask - 1);
591*2b54f0dbSXin Li 		}
592*2b54f0dbSXin Li 	}
593*2b54f0dbSXin Li 	return true;
594*2b54f0dbSXin Li }
595*2b54f0dbSXin Li 
parse_relation_cache_info(struct cpuinfo_processor * processors,struct cpuinfo_cache * caches,uint32_t * numbers_of_caches,const uint32_t * global_proc_index_per_group,PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info)596*2b54f0dbSXin Li static bool parse_relation_cache_info(
597*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
598*2b54f0dbSXin Li 	struct cpuinfo_cache* caches,
599*2b54f0dbSXin Li 	uint32_t* numbers_of_caches,
600*2b54f0dbSXin Li 	const uint32_t* global_proc_index_per_group,
601*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info)
602*2b54f0dbSXin Li {
603*2b54f0dbSXin Li 	static uint32_t l1i_counter = 0;
604*2b54f0dbSXin Li 	static uint32_t l1d_counter = 0;
605*2b54f0dbSXin Li 	static uint32_t l2_counter = 0;
606*2b54f0dbSXin Li 	static uint32_t l3_counter = 0;
607*2b54f0dbSXin Li 
608*2b54f0dbSXin Li 	/* Count cache types for allocation at first. */
609*2b54f0dbSXin Li 	if (caches == NULL) {
610*2b54f0dbSXin Li 		switch(info->Cache.Level) {
611*2b54f0dbSXin Li 			case 1:
612*2b54f0dbSXin Li 				switch (info->Cache.Type) {
613*2b54f0dbSXin Li 					case CacheInstruction:
614*2b54f0dbSXin Li 						numbers_of_caches[cpuinfo_cache_level_1i]++;
615*2b54f0dbSXin Li 					break;
616*2b54f0dbSXin Li 					case CacheData:
617*2b54f0dbSXin Li 						numbers_of_caches[cpuinfo_cache_level_1d]++;
618*2b54f0dbSXin Li 					break;
619*2b54f0dbSXin Li 					case CacheUnified:
620*2b54f0dbSXin Li 					break;
621*2b54f0dbSXin Li 					case CacheTrace:
622*2b54f0dbSXin Li 					break;
623*2b54f0dbSXin Li 					default:
624*2b54f0dbSXin Li 					break;
625*2b54f0dbSXin Li 				}
626*2b54f0dbSXin Li 			break;
627*2b54f0dbSXin Li 			case 2:
628*2b54f0dbSXin Li 				numbers_of_caches[cpuinfo_cache_level_2]++;
629*2b54f0dbSXin Li 			break;
630*2b54f0dbSXin Li 			case 3:
631*2b54f0dbSXin Li 				numbers_of_caches[cpuinfo_cache_level_3]++;
632*2b54f0dbSXin Li 			break;
633*2b54f0dbSXin Li 		}
634*2b54f0dbSXin Li 		return true;
635*2b54f0dbSXin Li 	}
636*2b54f0dbSXin Li 	struct cpuinfo_cache* l1i_base = caches;
637*2b54f0dbSXin Li 	struct cpuinfo_cache* l1d_base = l1i_base + numbers_of_caches[cpuinfo_cache_level_1i];
638*2b54f0dbSXin Li 	struct cpuinfo_cache* l2_base  = l1d_base + numbers_of_caches[cpuinfo_cache_level_1d];
639*2b54f0dbSXin Li 	struct cpuinfo_cache* l3_base  = l2_base  + numbers_of_caches[cpuinfo_cache_level_2];
640*2b54f0dbSXin Li 
641*2b54f0dbSXin Li 	cpuinfo_log_debug(
642*2b54f0dbSXin Li 		"info->Cache.GroupCount:%"PRIu32", info->Cache.GroupMask:%"PRIu32","
643*2b54f0dbSXin Li 		"info->Cache.Level:%"PRIu32", info->Cache.Associativity:%"PRIu32","
644*2b54f0dbSXin Li 		"info->Cache.LineSize:%"PRIu32","
645*2b54f0dbSXin Li 		"info->Cache.CacheSize:%"PRIu32", info->Cache.Type:%"PRIu32"",
646*2b54f0dbSXin Li 		info->Cache.GroupCount, (unsigned int)info->Cache.GroupMask.Mask,
647*2b54f0dbSXin Li 		info->Cache.Level, info->Cache.Associativity, info->Cache.LineSize,
648*2b54f0dbSXin Li 		info->Cache.CacheSize, info->Cache.Type);
649*2b54f0dbSXin Li 
650*2b54f0dbSXin Li 	struct cpuinfo_cache* current_cache = NULL;
651*2b54f0dbSXin Li 	switch (info->Cache.Level) {
652*2b54f0dbSXin Li 		case 1:
653*2b54f0dbSXin Li 			switch (info->Cache.Type) {
654*2b54f0dbSXin Li 				case CacheInstruction:
655*2b54f0dbSXin Li 					current_cache = l1i_base + l1i_counter;
656*2b54f0dbSXin Li 					l1i_counter++;
657*2b54f0dbSXin Li 				break;
658*2b54f0dbSXin Li 				case CacheData:
659*2b54f0dbSXin Li 					current_cache = l1d_base + l1d_counter;
660*2b54f0dbSXin Li 					l1d_counter++;
661*2b54f0dbSXin Li 				break;
662*2b54f0dbSXin Li 				case CacheUnified:
663*2b54f0dbSXin Li 				break;
664*2b54f0dbSXin Li 				case CacheTrace:
665*2b54f0dbSXin Li 				break;
666*2b54f0dbSXin Li 				default:
667*2b54f0dbSXin Li 				break;
668*2b54f0dbSXin Li 			}
669*2b54f0dbSXin Li 		break;
670*2b54f0dbSXin Li 		case 2:
671*2b54f0dbSXin Li 			current_cache = l2_base + l2_counter;
672*2b54f0dbSXin Li 			l2_counter++;
673*2b54f0dbSXin Li 		break;
674*2b54f0dbSXin Li 		case 3:
675*2b54f0dbSXin Li 			current_cache = l3_base + l3_counter;
676*2b54f0dbSXin Li 			l3_counter++;
677*2b54f0dbSXin Li 		break;
678*2b54f0dbSXin Li 	}
679*2b54f0dbSXin Li 	current_cache->size = info->Cache.CacheSize;
680*2b54f0dbSXin Li 	current_cache->line_size = info->Cache.LineSize;
681*2b54f0dbSXin Li 	current_cache->associativity = info->Cache.Associativity;
682*2b54f0dbSXin Li 	/* We don't have partition and set information of caches on Windows,
683*2b54f0dbSXin Li 	 * so we set partitions to 1 and calculate the expected sets.
684*2b54f0dbSXin Li 	 */
685*2b54f0dbSXin Li 	current_cache->partitions = 1;
686*2b54f0dbSXin Li 	current_cache->sets =
687*2b54f0dbSXin Li 		current_cache->size / current_cache->line_size / current_cache->associativity;
688*2b54f0dbSXin Li 	if (info->Cache.Type == CacheUnified) {
689*2b54f0dbSXin Li 		current_cache->flags = CPUINFO_CACHE_UNIFIED;
690*2b54f0dbSXin Li 	}
691*2b54f0dbSXin Li 
692*2b54f0dbSXin Li 	for (uint32_t i = 0; i <= info->Cache.GroupCount; i++) {
693*2b54f0dbSXin Li 	/* Zero GroupCount is valid, GroupMask still can store bits set. */
694*2b54f0dbSXin Li 		const uint32_t group_id = info->Cache.GroupMasks[i].Group;
695*2b54f0dbSXin Li 		/* Bitmask representing processors in this group belonging to this package */
696*2b54f0dbSXin Li 		KAFFINITY group_processors_mask = info->Cache.GroupMasks[i].Mask;
697*2b54f0dbSXin Li 		while (group_processors_mask != 0) {
698*2b54f0dbSXin Li 			const uint32_t processor_id_in_group =
699*2b54f0dbSXin Li 				low_index_from_kaffinity(group_processors_mask);
700*2b54f0dbSXin Li 			const uint32_t processor_global_index =
701*2b54f0dbSXin Li 				global_proc_index_per_group[group_id] + processor_id_in_group;
702*2b54f0dbSXin Li 
703*2b54f0dbSXin Li 			store_cache_info_per_processor(
704*2b54f0dbSXin Li 				processors, processor_global_index,
705*2b54f0dbSXin Li 				info, current_cache);
706*2b54f0dbSXin Li 
707*2b54f0dbSXin Li 			/* Clear the bits in affinity mask, lower the least set bit. */
708*2b54f0dbSXin Li 			group_processors_mask &= (group_processors_mask - 1);
709*2b54f0dbSXin Li 		}
710*2b54f0dbSXin Li 	}
711*2b54f0dbSXin Li 	return true;
712*2b54f0dbSXin Li }
713*2b54f0dbSXin Li 
store_package_info_per_processor(struct cpuinfo_processor * processors,const uint32_t processor_global_index,const uint32_t package_id,const uint32_t group_id,const uint32_t processor_id_in_group)714*2b54f0dbSXin Li static void store_package_info_per_processor(
715*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
716*2b54f0dbSXin Li 	const uint32_t processor_global_index,
717*2b54f0dbSXin Li 	const uint32_t package_id,
718*2b54f0dbSXin Li 	const uint32_t group_id,
719*2b54f0dbSXin Li 	const uint32_t processor_id_in_group)
720*2b54f0dbSXin Li {
721*2b54f0dbSXin Li 	processors[processor_global_index].windows_group_id =
722*2b54f0dbSXin Li 		(uint16_t) group_id;
723*2b54f0dbSXin Li 	processors[processor_global_index].windows_processor_id =
724*2b54f0dbSXin Li 		(uint16_t) processor_id_in_group;
725*2b54f0dbSXin Li 
726*2b54f0dbSXin Li 	/* As we're counting the number of packages now, we haven't allocated memory for
727*2b54f0dbSXin Li 	 * cpuinfo_packages yet, so we only set the package pointer's offset now.
728*2b54f0dbSXin Li 	 */
729*2b54f0dbSXin Li 	processors[processor_global_index].package =
730*2b54f0dbSXin Li 		(const struct cpuinfo_package*) NULL + package_id;
731*2b54f0dbSXin Li }
732*2b54f0dbSXin Li 
store_core_info_per_processor(struct cpuinfo_processor * processors,const uint32_t processor_global_index,const uint32_t core_id,PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX core_info,struct cpuinfo_core * cores,const struct woa_chip_info * chip_info)733*2b54f0dbSXin Li void store_core_info_per_processor(
734*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
735*2b54f0dbSXin Li 	const uint32_t processor_global_index,
736*2b54f0dbSXin Li 	const uint32_t core_id,
737*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX core_info,
738*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
739*2b54f0dbSXin Li 	const struct woa_chip_info *chip_info)
740*2b54f0dbSXin Li {
741*2b54f0dbSXin Li 	if (cores) {
742*2b54f0dbSXin Li 		processors[processor_global_index].core = cores + core_id;
743*2b54f0dbSXin Li 		cores[core_id].core_id = core_id;
744*2b54f0dbSXin Li 		get_core_uarch_for_efficiency(
745*2b54f0dbSXin Li 			chip_info->chip_name, core_info->Processor.EfficiencyClass,
746*2b54f0dbSXin Li 			&(cores[core_id].uarch), &(cores[core_id].frequency));
747*2b54f0dbSXin Li 
748*2b54f0dbSXin Li 		/* We don't have cluster information, so we handle it as
749*2b54f0dbSXin Li 		 * fixed 1 to (cluster / cores).
750*2b54f0dbSXin Li 		 * Set the cluster offset ID now, as soon as we have the
751*2b54f0dbSXin Li 		 * cluster base address, we'll set the absolute address.
752*2b54f0dbSXin Li 		 */
753*2b54f0dbSXin Li 		processors[processor_global_index].cluster =
754*2b54f0dbSXin Li 			(const struct cpuinfo_cluster*) NULL + core_id;
755*2b54f0dbSXin Li 	}
756*2b54f0dbSXin Li }
757*2b54f0dbSXin Li 
store_cache_info_per_processor(struct cpuinfo_processor * processors,const uint32_t processor_global_index,PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,struct cpuinfo_cache * current_cache)758*2b54f0dbSXin Li static void store_cache_info_per_processor(
759*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
760*2b54f0dbSXin Li 	const uint32_t processor_global_index,
761*2b54f0dbSXin Li 	PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX info,
762*2b54f0dbSXin Li 	struct cpuinfo_cache* current_cache)
763*2b54f0dbSXin Li {
764*2b54f0dbSXin Li 	if (current_cache->processor_start > processor_global_index) {
765*2b54f0dbSXin Li 		current_cache->processor_start = processor_global_index;
766*2b54f0dbSXin Li 	}
767*2b54f0dbSXin Li 	current_cache->processor_count++;
768*2b54f0dbSXin Li 
769*2b54f0dbSXin Li 	switch(info->Cache.Level) {
770*2b54f0dbSXin Li 		case 1:
771*2b54f0dbSXin Li 			switch (info->Cache.Type) {
772*2b54f0dbSXin Li 				case CacheInstruction:
773*2b54f0dbSXin Li 					processors[processor_global_index].cache.l1i = current_cache;
774*2b54f0dbSXin Li 				break;
775*2b54f0dbSXin Li 				case CacheData:
776*2b54f0dbSXin Li 					processors[processor_global_index].cache.l1d = current_cache;
777*2b54f0dbSXin Li 				break;
778*2b54f0dbSXin Li 				case CacheUnified:
779*2b54f0dbSXin Li 				break;
780*2b54f0dbSXin Li 				case CacheTrace:
781*2b54f0dbSXin Li 				break;
782*2b54f0dbSXin Li 				default:
783*2b54f0dbSXin Li 				break;
784*2b54f0dbSXin Li 			}
785*2b54f0dbSXin Li 		break;
786*2b54f0dbSXin Li 		case 2:
787*2b54f0dbSXin Li 			processors[processor_global_index].cache.l2 = current_cache;
788*2b54f0dbSXin Li 		break;
789*2b54f0dbSXin Li 		case 3:
790*2b54f0dbSXin Li 			processors[processor_global_index].cache.l3 = current_cache;
791*2b54f0dbSXin Li 		break;
792*2b54f0dbSXin Li 	}
793*2b54f0dbSXin Li }
794*2b54f0dbSXin Li 
connect_packages_cores_clusters_by_processors(struct cpuinfo_processor * processors,const uint32_t nr_of_processors,struct cpuinfo_package * packages,const uint32_t nr_of_packages,struct cpuinfo_cluster * clusters,struct cpuinfo_core * cores,const uint32_t nr_of_cores,const struct woa_chip_info * chip_info,enum cpuinfo_vendor vendor)795*2b54f0dbSXin Li static bool connect_packages_cores_clusters_by_processors(
796*2b54f0dbSXin Li 	struct cpuinfo_processor* processors,
797*2b54f0dbSXin Li 	const uint32_t nr_of_processors,
798*2b54f0dbSXin Li 	struct cpuinfo_package* packages,
799*2b54f0dbSXin Li 	const uint32_t nr_of_packages,
800*2b54f0dbSXin Li 	struct cpuinfo_cluster* clusters,
801*2b54f0dbSXin Li 	struct cpuinfo_core* cores,
802*2b54f0dbSXin Li 	const uint32_t nr_of_cores,
803*2b54f0dbSXin Li 	const struct woa_chip_info* chip_info,
804*2b54f0dbSXin Li 	enum cpuinfo_vendor vendor)
805*2b54f0dbSXin Li {
806*2b54f0dbSXin Li 	/* Adjust core and package pointers for all logical processors. */
807*2b54f0dbSXin Li 	for (uint32_t i = nr_of_processors; i != 0; i--) {
808*2b54f0dbSXin Li 		const uint32_t processor_id = i - 1;
809*2b54f0dbSXin Li 		struct cpuinfo_processor* processor = processors + processor_id;
810*2b54f0dbSXin Li 
811*2b54f0dbSXin Li 		struct cpuinfo_core* core = (struct cpuinfo_core*)processor->core;
812*2b54f0dbSXin Li 
813*2b54f0dbSXin Li 		/* We stored the offset of pointers when we haven't allocated memory
814*2b54f0dbSXin Li 		 * for packages and clusters, so now add offsets to base addresses.
815*2b54f0dbSXin Li 		 */
816*2b54f0dbSXin Li 		struct cpuinfo_package* package =
817*2b54f0dbSXin Li 			(struct cpuinfo_package*) ((uintptr_t) packages + (uintptr_t) processor->package);
818*2b54f0dbSXin Li 		if (package < packages ||
819*2b54f0dbSXin Li 			package >= (packages + nr_of_packages)) {
820*2b54f0dbSXin Li 			cpuinfo_log_error("invalid package indexing");
821*2b54f0dbSXin Li 			return false;
822*2b54f0dbSXin Li 		}
823*2b54f0dbSXin Li 		processor->package = package;
824*2b54f0dbSXin Li 
825*2b54f0dbSXin Li 		struct cpuinfo_cluster* cluster =
826*2b54f0dbSXin Li 			(struct cpuinfo_cluster*) ((uintptr_t) clusters + (uintptr_t) processor->cluster);
827*2b54f0dbSXin Li 		if (cluster < clusters ||
828*2b54f0dbSXin Li 			cluster >= (clusters + nr_of_cores)) {
829*2b54f0dbSXin Li 			cpuinfo_log_error("invalid cluster indexing");
830*2b54f0dbSXin Li 			return false;
831*2b54f0dbSXin Li 		}
832*2b54f0dbSXin Li 		processor->cluster = cluster;
833*2b54f0dbSXin Li 
834*2b54f0dbSXin Li 		if (chip_info) {
835*2b54f0dbSXin Li 			strncpy_s(package->name, CPUINFO_PACKAGE_NAME_MAX, chip_info->chip_name_string,
836*2b54f0dbSXin Li 				strnlen(chip_info->chip_name_string, CPUINFO_PACKAGE_NAME_MAX));
837*2b54f0dbSXin Li 		}
838*2b54f0dbSXin Li 
839*2b54f0dbSXin Li 		/* Set start indexes and counts per packages / clusters / cores - going backwards */
840*2b54f0dbSXin Li 
841*2b54f0dbSXin Li 		/* This can be overwritten by lower-index processors on the same package. */
842*2b54f0dbSXin Li 		package->processor_start = processor_id;
843*2b54f0dbSXin Li 		package->processor_count++;
844*2b54f0dbSXin Li 
845*2b54f0dbSXin Li 		/* This can be overwritten by lower-index processors on the same cluster. */
846*2b54f0dbSXin Li 		cluster->processor_start = processor_id;
847*2b54f0dbSXin Li 		cluster->processor_count++;
848*2b54f0dbSXin Li 
849*2b54f0dbSXin Li 		/* This can be overwritten by lower-index processors on the same core. */
850*2b54f0dbSXin Li 		core->processor_start = processor_id;
851*2b54f0dbSXin Li 		core->processor_count++;
852*2b54f0dbSXin Li 	}
853*2b54f0dbSXin Li 	/* Fill cores */
854*2b54f0dbSXin Li 	for (uint32_t i = nr_of_cores; i != 0; i--) {
855*2b54f0dbSXin Li 		const uint32_t global_core_id = i - 1;
856*2b54f0dbSXin Li 		struct cpuinfo_core* core = cores + global_core_id;
857*2b54f0dbSXin Li 		const struct cpuinfo_processor* processor = processors + core->processor_start;
858*2b54f0dbSXin Li 		struct cpuinfo_package* package = (struct cpuinfo_package*) processor->package;
859*2b54f0dbSXin Li 		struct cpuinfo_cluster* cluster = (struct cpuinfo_cluster*) processor->cluster;
860*2b54f0dbSXin Li 
861*2b54f0dbSXin Li 		core->package = package;
862*2b54f0dbSXin Li 		core->cluster = cluster;
863*2b54f0dbSXin Li 		core->vendor = vendor;
864*2b54f0dbSXin Li 
865*2b54f0dbSXin Li 		/* This can be overwritten by lower-index cores on the same cluster/package. */
866*2b54f0dbSXin Li 		cluster->core_start = global_core_id;
867*2b54f0dbSXin Li 		cluster->core_count++;
868*2b54f0dbSXin Li 		package->core_start = global_core_id;
869*2b54f0dbSXin Li 		package->core_count++;
870*2b54f0dbSXin Li 		package->cluster_start = global_core_id;
871*2b54f0dbSXin Li 		package->cluster_count = package->core_count;
872*2b54f0dbSXin Li 
873*2b54f0dbSXin Li 		cluster->package = package;
874*2b54f0dbSXin Li 		cluster->vendor = cores[cluster->core_start].vendor;
875*2b54f0dbSXin Li 		cluster->uarch = cores[cluster->core_start].uarch;
876*2b54f0dbSXin Li 		cluster->frequency = cores[cluster->core_start].frequency;
877*2b54f0dbSXin Li 	}
878*2b54f0dbSXin Li 	return true;
879*2b54f0dbSXin Li }
880*2b54f0dbSXin Li 
low_index_from_kaffinity(KAFFINITY kaffinity)881*2b54f0dbSXin Li static inline uint32_t low_index_from_kaffinity(KAFFINITY kaffinity) {
882*2b54f0dbSXin Li 	unsigned long index;
883*2b54f0dbSXin Li 	_BitScanForward64(&index, (unsigned __int64) kaffinity);
884*2b54f0dbSXin Li 	return (uint32_t) index;
885*2b54f0dbSXin Li }
886