1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 #ifndef __DEVICE_XHCI_H__
4 #define __DEVICE_XHCI_H__
5
6 #include <types.h>
7 #include <device/device.h>
8
9 #define XHCI_HCCPARAMS1_XECP 0x12
10
11 #define XHCI_ECP_CAP_ID_LEGACY 1
12 #define XHCI_ECP_CAP_ID_SUPP 2
13
14 /* Status flags */
15 /* Wake on disconnect enable */
16 #define XHCI_STATUS_WDE BIT(26)
17 /* Wake on connect enable */
18 #define XHCI_STATUS_WCE BIT(25)
19 /* Port link status change */
20 #define XHCI_STATUS_PLC BIT(22)
21 /* Connect status change */
22 #define XHCI_STATUS_CSC BIT(17)
23 /* Port link status */
24 #define XHCI_STATUS_PLS_SHIFT 5
25 #define XHCI_STATUS_PLS_MASK (0xf << XHCI_STATUS_PLS_SHIFT)
26 #define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT)
27
xhci_portsc_csc(uint32_t port_status)28 static inline bool xhci_portsc_csc(uint32_t port_status)
29 {
30 return port_status & XHCI_STATUS_CSC;
31 }
32
xhci_portsc_wake_capable(uint32_t port_status)33 static inline bool xhci_portsc_wake_capable(uint32_t port_status)
34 {
35 return (port_status & XHCI_STATUS_WCE) |
36 (port_status & XHCI_STATUS_WDE);
37 }
38
xhci_portsc_plc(uint32_t port_status)39 static inline bool xhci_portsc_plc(uint32_t port_status)
40 {
41 return port_status & XHCI_STATUS_PLC;
42 }
43
xhci_portsc_resume(uint32_t port_status)44 static inline bool xhci_portsc_resume(uint32_t port_status)
45 {
46 return (port_status & XHCI_STATUS_PLS_MASK) == XHCI_STATUS_PLS_RESUME;
47 }
48
49
50 struct xhci_supported_protocol {
51 union {
52 uint32_t reg0;
53 struct {
54 uint32_t cap_id : 8;
55 uint32_t next_ptr : 8;
56 uint32_t minor_rev : 8;
57 uint32_t major_rev : 8;
58 };
59 };
60 union {
61 uint32_t reg1;
62 char name[4];
63 };
64 union {
65 uint32_t reg2;
66 struct {
67 uint32_t port_offset : 8;
68 uint32_t port_count : 8;
69 uint32_t reserved : 12;
70 uint32_t protocol_speed_id_count : 4;
71 };
72 };
73 };
74
75 struct xhci_ext_cap {
76 uint32_t cap_id;
77 /* cap_id is used to select the correct struct in the union. */
78 union {
79 struct xhci_supported_protocol supported_protocol;
80 };
81 };
82
83 /*
84 * struct xhci_usb_info - Data containing number of USB ports & offset.
85 * @usb2_port_status_reg: Offset to USB2 port status register.
86 * @num_usb2_ports: Number of USB2 ports.
87 * @usb3_port_status_reg: Offset to USB3 port status register.
88 * @num_usb3_ports: Number of USB3 ports.
89 */
90 struct xhci_usb_info {
91 uint32_t usb2_port_status_reg;
92 uint32_t num_usb2_ports;
93 uint32_t usb3_port_status_reg;
94 uint32_t num_usb3_ports;
95 };
96
97 struct xhci_capability_regs {
98 uint8_t caplength;
99 uint8_t reserved0;
100 uint16_t hciversion;
101 uint32_t hcsparams1;
102 uint32_t hcsparams2;
103 uint32_t hcsparams3;
104 uint32_t hccparams1;
105 uint32_t dboff;
106 uint32_t rtsoff;
107 uint32_t hccparams2;
108 } __packed;
109
110 /**
111 * Iterates over the xHCI Extended Capabilities List.
112 */
113 enum cb_err xhci_resource_for_each_ext_cap(const struct resource *res, void *context,
114 void (*callback)(void *context,
115 const struct xhci_ext_cap *cap));
116 enum cb_err xhci_for_each_ext_cap(const struct device *device, void *context,
117 void (*callback)(void *context,
118 const struct xhci_ext_cap *cap));
119
120 /**
121 * Helper method that iterates over only the USB supported capabilities structures in the
122 * xHCI Extended Capabilities List.
123 */
124 enum cb_err xhci_for_each_supported_usb_cap(
125 const struct device *device, void *context,
126 void (*callback)(void *context, const struct xhci_supported_protocol *data));
127 enum cb_err xhci_resource_for_each_supported_usb_cap(
128 const struct resource *res, void *context,
129 void (*callback)(void *context, const struct xhci_supported_protocol *data));
130
131 void xhci_print_supported_protocol(const struct xhci_supported_protocol *supported_protocol);
132
133 #endif /* __DEVICE_XHCI_H__ */
134