1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3#include <memlayout.h> 4#include <arch/header.ld> 5 6/* 7 * The bootblock linker script should be included before the Cache-As-RAM linker 8 * script. Indeed, if it is included after and Cache-As-RAM .data section 9 * support is enabled, the definition order of the sections makes the linker 10 * create an image with an almost 4 GB hole. 11 */ 12#if ENV_BOOTBLOCK 13INCLUDE "bootblock/arch/x86/bootblock.ld" 14#endif /* ENV_BOOTBLOCK */ 15 16SECTIONS 17{ 18 /* 19 * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively 20 * like other architectures/chipsets it's not possible because of 21 * the linking games played during romstage creation by trying 22 * to find the final landing place in CBFS for XIP. Therefore, 23 * conditionalize with macros. 24 */ 25#if ENV_RAMSTAGE 26 /* Relocated at runtime in cbmem so the address does not matter. */ 27 RAMSTAGE(64M, 8M) 28 29#elif ENV_SEPARATE_ROMSTAGE 30 /* The 1M size is not allocated. It's just for basic size checking. 31 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ 32 ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M) 33 34 INCLUDE "romstage/arch/x86/car.ld" 35#elif ENV_SEPARATE_VERSTAGE 36 /* The 1M size is not allocated. It's just for basic size checking. 37 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ 38 VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M) 39 40 INCLUDE "verstage/arch/x86/car.ld" 41#elif ENV_BOOTBLOCK 42 43 INCLUDE "bootblock/arch/x86/car.ld" 44 45#elif ENV_POSTCAR 46 POSTCAR(32M, 1M) 47#endif 48} 49