1## SPDX-License-Identifier: GPL-2.0-only 2 3config ARCH_ARM64 4 bool 5 6config ARCH_BOOTBLOCK_ARM64 7 bool 8 select ARCH_ARM64 9 10config ARCH_VERSTAGE_ARM64 11 bool 12 select ARCH_ARM64 13 14config ARCH_ROMSTAGE_ARM64 15 bool 16 select ARCH_ARM64 17 18config ARCH_RAMSTAGE_ARM64 19 bool 20 select ARCH_ARM64 21 22source "src/arch/arm64/armv8/Kconfig" 23 24if ARCH_ARM64 25 26config ARM64_CURRENT_EL 27 int 28 default 3 29 range 1 3 30 help 31 The exception level on which coreboot is started. Accepted 32 values are: 1 (EL1), 2 (EL2) and 3 (EL3). This option can be 33 used to restrict access to available control registers in case 34 prior firmware already dropped to a lower exception level. By default, 35 coreboot is the first firmware that runs on the system and should thus 36 always run on EL3. This option is only provided for edge-case platforms 37 that require running a different firmware before coreboot which drops 38 to a lower exception level. 39 40config ARM64_USE_ARCH_TIMER 41 bool 42 default n 43 44config ARM64_USE_ARM_TRUSTED_FIRMWARE 45 bool 46 default n 47 depends on ARCH_RAMSTAGE_ARM64 && ARM64_CURRENT_EL = 3 48 49config ARM64_BL31_OPTEE_WITH_SMC 50 bool "Build OP-TEE dispatcher for BL31 and allow loading via an SMC" 51 default n 52 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE 53 help 54 This option adds support for building the OP-TEE Secure Payload Dispatcher 55 (SPD) for BL31, and allows loading the OP-TEE image via a Secure Monitor Call 56 (SMC). 57 58config ARM64_BL31_EXTERNAL_FILE 59 string "Path to external BL31.ELF (leave empty to build from source)" 60 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE 61 help 62 The blob to use instead of building the Arm Trusted Firmware 63 from tree. It is discouraged as compatibility with out-of-tree 64 blobs may break anytime. 65 66config ARM64_USE_SECURE_OS 67 bool 68 default n 69 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE 70 71config ARM64_SECURE_OS_FILE 72 string "Secure OS binary file" 73 depends on ARM64_USE_SECURE_OS 74 help 75 Secure OS binary file. 76 77config ARM64_A53_ERRATUM_843419 78 bool 79 default n 80 help 81 Some early Cortex-A53 revisions had a hardware bug that results in 82 incorrect address calculations in rare cases. This option enables a 83 linker workaround to avoid those cases if your toolchain supports it. 84 Should be selected automatically by SoCs that are affected. 85 86endif # if ARCH_ARM64 87