xref: /aosp_15_r20/external/coreboot/src/acpi/dsdt_top.asl (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <acpi/acpigen_extern.asl>
4
5#if CONFIG(CHROMEOS_NVS)
6/* ChromeOS specific */
7#include <vendorcode/google/chromeos/acpi/chromeos.asl>
8#endif
9
10/* Operating system enumeration. */
11Name (OSYS, 0)
12
13/* 0 => PIC mode, 1 => APIC Mode */
14Name (PICM, 0)
15
16/* Power state (AC = 1) */
17Name (PWRS, 1)
18
19/*
20 * The _PIC method is called by the OS to choose between interrupt
21 * routing via the i8259 interrupt controller or the APIC.
22 *
23 * _PIC is called with a parameter of 0 for i8259 configuration and
24 * with a parameter of 1 for Local Apic/IOAPIC configuration.
25 */
26
27Method (_PIC, 1)
28{
29	/* Remember the OS' IRQ routing choice. */
30	PICM = Arg0
31}
32
33#if CONFIG(ECAM_MMCONF_SUPPORT)
34Scope(\_SB) {
35	/* Base address of PCIe config space */
36	Name(PCBA, CONFIG_ECAM_MMCONF_BASE_ADDRESS)
37
38	/* Length of PCIe config space, 1MB each bus */
39	Name(PCLN, CONFIG_ECAM_MMCONF_LENGTH)
40
41	/* PCIe Configuration Space */
42	OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */
43
44	/* From the Linux documentation (Documentation/PCI/acpi-info.rst):
45	 * [6] PCI Firmware 3.2, sec 4.1.2:
46	 *     If the operating system does not natively comprehend reserving the
47	 *     MMCFG region, the MMCFG region must be reserved by firmware.  The
48	 *     address range reported in the MCFG table or by _CBA method (see Section
49	 *     4.1.3) must be reserved by declaring a motherboard resource.  For most
50	 *     systems, the motherboard resource would appear at the root of the ACPI
51	 *     namespace (under \_SB) in a node with a _HID of EISAID (PNP0C02), and
52	 *     the resources in this case should not be claimed in the root PCI bus's
53	 *     _CRS.  The resources can optionally be returned in Int15 E820 or
54	 *     EFIGetMemoryMap as reserved memory but must always be reported through
55	 *     ACPI as a motherboard resource.
56	 */
57	Device (PERC)	// PCI ECAM Resource Consumption
58	{
59		Name (_HID, EisaId("PNP0C02"))
60		Method (_CRS, 0, Serialized)
61		{
62			Name (RBUF, ResourceTemplate ()
63			{
64				QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed,
65				    NonCacheable, ReadWrite,
66				    0x0000000000000000, // Granularity
67				    0x0000000000000000, // _MIN
68				    0x0000000000000001, // _MAX
69				    0x0000000000000000, // Translation
70				    0x0000000000000002, // _Len
71				    ,, _Y00, AddressRangeMemory, TypeStatic)
72			})
73			CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MIN, MIN1)
74			CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MAX, MAX1)
75			CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._LEN, LEN1)
76			MIN1 = CONFIG_ECAM_MMCONF_BASE_ADDRESS
77			MAX1 = (MIN1 + CONFIG_ECAM_MMCONF_LENGTH -1)
78			LEN1 = CONFIG_ECAM_MMCONF_LENGTH
79			Return (RBUF)
80		}
81	}
82}
83#endif
84