1coreboot 4.2 release notes 2========================== 3 4Halloween 2015 release - just as scary as that sounds 5 6Dear coreboot community, 7today marks the release of coreboot 4.2, the second release on our time 8based release schedule. Since 4.1 there were 936 commits by 90 authors, 9increasing the code base by approximately 17000 lines of code. We saw 35 10new contributors - welcome to coreboot! More than 34 developers were 11active as reviewers in that period. Thanks go to all contributors who 12helped shape this release. 13 14As with 4.1, the release tarballs are available at 15http://www.coreboot.org/releases/. There's also a 4.2 tag and branch in 16the git repository. 17 18This marks the first release that features a changelog comparing it to 19the previous release. There was some limited testing to make sure that 20the code is usable, and it boots on some devices. A structured test plan 21will only become part of the release procedure of future versions. I'm 22grateful to Martin for assembling this release's changelog. 23 24This is also the first release that will be followed by the removal of 25old, unused code. There will be a policy on how to announce deprecation 26and removal of mainboard and chipset code for future releases. 27 28Regards, 29Patrick 30 31Log of commit d5e6618a4f076610e683b174c4dd5108d960c785 to 32commit 439a527014fa0cb3e4ef60ba59e5c57c737b4444 33 34Changes between 4.1 and 4.2 35--------------------------- 36 37### Build system: 38* Store a minimized coreboot config file in cbfs instead of the full 39 config 40* Store the payload config and revision in CBFS when that info is 41 available 42* Add -compression option for cbfs-files-y. Valid entries are now -file, 43 -type, -align, and -compression 44* Change Microcode inclusion method from building .h files to pre-built 45 binaries 46* Update Builder tests for each commit to test utilities and run lint 47 tools 48* Many other small makefile and build changes and fixes 49* Remove expert mode as a Kconfig option 50 51### Utilities: 52* Many fixes and updates to many utilities (158 total commits) 53* ifdtool: Update for skylake, handle region masks correctly 54* crossgcc: Update to gcc 5.2.0 55* kconfig: Add strict mode to fail on kconfig errors and warnings 56* vgabios: Significant fixes to remove issues in linking into coreboot 57 code 58* Add script to parse MAINTAINERS file 59* Add Kconfig lint tool 60* Create a common library to share coreboot routines with utilities 61 62#### Significant changes and cleanup to cbfstool (81 commits) 63* Update cbfstool to change the internal location of FSP binaries when 64 adding them 65* Decompress stage files on extraction and turn them into ELF binaries 66* Header sizes are now variable, containing extended attributes 67* Add compression tags to all cbfs headers so all cbfs files can be 68 compressed 69* Add and align CBFS components in one pass instead of two 70* Add XIP support for X86 to relocate the romstage when it'™s added 71* Removed locate command as it'™s no longer needed 72* Add bootblock and cbfs_header file types so the master header knows 73 about them 74* Prefer FMAP data to CBFS master header if FMAP data exists 75* Add hashes to cbfs file metadata for verification of images 76 77### Payloads: 78* SeaBIOS: update stable release from 1.7.5 to 1.8.2 79* Libpayload had some significant changes (61 commits). Major changes: 80* Add support for fmap tables 81* Add support for SuperSpeed (3.0) USB hubs 82* Updates and bugfixes for DesignWare OTG controller (DWC2) 83* Add video_printf to print text with specified foreground & background 84 colors 85* Updates to match changes to cbfs/cbfstool 86* Add cbgfx, a library to show graphics and text on a display 87* Read cbfs offset and size from sysinfo when available 88 89### Vendorcode: 90* fsp_baytrail: Support Baytrail FSP Gold 4 release 91* AMD binary PI: add support for fan control 92* Work to get AMD AGESA to compile correctly as 64-bit code 93* Add standalone (XIP) verstage support for x86 to verify romstage 94 95### Mainboards: 96* New Mainboards: 97* apple/macbookair4_2 * Sandy/Ivy Bridge with Panther / Cougar point 98chipset 99* asus/kgpe-d16 - AMD Family 10, SB700/SR5650 platform 100* emulation/spike-riscv - RISCV virtualized platform 101* google/chell - Intel Skylake chrome platform 102* google/cyan - Intel Braswell chrome platform 103* google/glados - Intel Skylake chrome platform 104* google/lars - Intel Skylake chrome platform 105* intel/kunimitsu - Intel Skylake chrome platform 106* intel/sklrvp - Intel Skylake reference platform 107* intel/strago - Intel Braswell chrome platform 108* Cleanups of many mainboards - several patches each for: 109* amd/bettong 110* getac/p470 111* google/auron, google/smaug and google/veyron_rialto 112* pcengines/apu1 113* siemens/mc_tcu3 114* Combine the google/veyron_(jerry, mighty, minnie, pinkie, shark & 115 speedy) mainboards into the single google/veyron mainboard directory 116 117### Console: 118* Add EM100 ˜hyper term" spi console support in ramstage & smm 119* Add console support for verstage 120 121### ARM: 122* armv7: use asm coded memory operations for 32/16 bit read/write 123* Many cleanups to the nvidia tegra chips (40 patches) 124 125### RISC-V: 126* Add trap handling 127* Add virtual Memory setup 128 129### X86: 130* Remove and re-add Rangeley and Ivy Bridge / panther point FSP 131 platforms 132* Update microcode update parser to use stock AMD microcode blobs from 133 CBFS 134* ACPI: Align FACS to 64 byte boundary. Fixes FWTS error 135* AMD/SB700: Init devices in early boot, restore power state after power 136 failure. Add IDE/SATA asl code 137* Add initial support for AMD Socket G34 processors 138* Add tick frequency to timestamp table to calculate boot times more 139 accurately 140* Unify X86 romstage / ramstage linking to match other platforms 141* Start preparing X86 bootblock for non-memory-mapped BIOS media 142* cpu/amd/car: Add Suspend to RAM (S3) support 143* Native VGA init fixes on several platforms 144* Significant updates to FSP 1.1 code for cleanup and cbfstool changes 145* SMMhandler: on i945..nehalem, crash if LAPIC overlaps with ASEG to 146 prevent the memory sinkhole smm hack 147 148### Drivers: 149* Add native text mode support for the Aspeed AST2050 150* w83795: Add support for for fan control and voltage monitoring 151* Intel GMA ACPI consolidation and improvements 152* Set up the 8254 timer before running option ROMs 153* Resource allocator: Page align memory mapped PCI resources 154 155### Lib: 156* Derive fmap name from offset/size 157* Several edid fixes 158* Updates to cbfs matching changes in cbfstool 159 160Submodules: 161---------- 162### 3rdparty/blobs: 163Total commits: 16 164Log of commit 61d663e3 to commit aab093f0 165* AMD Merlin Falcon: Update to CarrizoPI 1.1.0.0 (Binary PI 1.4) 166* AMD Steppe Eagle: Update to MullinsPI 1.0.0.A (Binary PI 1.1) 167* Update microcode to binary blobs. Remove old .h microcode files 168 169### 3rdparty/arm-trusted-firmware: 170* No Changes 171 172### 3rdparty/vboot: 173Total commits: 41 174Log of commit fbf631c8 to commit d6723ed1 175* Update the code to determine the write protect line gpio value 176* Several updates to futility and image_signing scripts 177* Update crossystem to accommodate Android mosys location 178* Support reboot requested by secdata 179* Add NV flag to default boot legacy OS 180 181### util/nvidia/cbootimage: 182* No Changes 183